Lines Matching +full:dma +full:- +full:masters
1 // SPDX-License-Identifier: GPL-2.0-or-later
65 struct fake_master_window masters[FAKE_MAX_MASTER]; member
99 bridge = fake_bridge->driver_priv; in fake_VIRQ_tasklet()
101 vme_irq_handler(fake_bridge, bridge->int_level, bridge->int_statid); in fake_VIRQ_tasklet()
132 bridge = fake_bridge->driver_priv; in fake_irq_generate()
134 mutex_lock(&bridge->vme_int); in fake_irq_generate()
136 bridge->int_level = level; in fake_irq_generate()
138 bridge->int_statid = statid; in fake_irq_generate()
144 tasklet_schedule(&bridge->int_tasklet); in fake_irq_generate()
146 mutex_unlock(&bridge->vme_int); in fake_irq_generate()
163 fake_bridge = image->parent; in fake_slave_set()
164 bridge = fake_bridge->driver_priv; in fake_slave_set()
166 i = image->number; in fake_slave_set()
188 return -EINVAL; in fake_slave_set()
195 vme_bound = vme_base + size - granularity; in fake_slave_set()
197 if (vme_base & (granularity - 1)) { in fake_slave_set()
199 return -EINVAL; in fake_slave_set()
201 if (vme_bound & (granularity - 1)) { in fake_slave_set()
203 return -EINVAL; in fake_slave_set()
206 mutex_lock(&image->mtx); in fake_slave_set()
208 bridge->slaves[i].enabled = enabled; in fake_slave_set()
209 bridge->slaves[i].vme_base = vme_base; in fake_slave_set()
210 bridge->slaves[i].size = size; in fake_slave_set()
211 bridge->slaves[i].buf_base = fake_pci_to_ptr(buf_base); in fake_slave_set()
212 bridge->slaves[i].aspace = aspace; in fake_slave_set()
213 bridge->slaves[i].cycle = cycle; in fake_slave_set()
215 mutex_unlock(&image->mtx); in fake_slave_set()
230 bridge = image->parent->driver_priv; in fake_slave_get()
232 i = image->number; in fake_slave_get()
234 mutex_lock(&image->mtx); in fake_slave_get()
236 *enabled = bridge->slaves[i].enabled; in fake_slave_get()
237 *vme_base = bridge->slaves[i].vme_base; in fake_slave_get()
238 *size = bridge->slaves[i].size; in fake_slave_get()
239 *buf_base = fake_ptr_to_pci(bridge->slaves[i].buf_base); in fake_slave_get()
240 *aspace = bridge->slaves[i].aspace; in fake_slave_get()
241 *cycle = bridge->slaves[i].cycle; in fake_slave_get()
243 mutex_unlock(&image->mtx); in fake_slave_get()
260 fake_bridge = image->parent; in fake_master_set()
262 bridge = fake_bridge->driver_priv; in fake_master_set()
267 retval = -EINVAL; in fake_master_set()
273 retval = -EINVAL; in fake_master_set()
278 pr_err("Size must be non-zero for enabled windows\n"); in fake_master_set()
279 retval = -EINVAL; in fake_master_set()
291 retval = -EINVAL; in fake_master_set()
309 retval = -EINVAL; in fake_master_set()
313 spin_lock(&image->lock); in fake_master_set()
315 i = image->number; in fake_master_set()
317 bridge->masters[i].enabled = enabled; in fake_master_set()
318 bridge->masters[i].vme_base = vme_base; in fake_master_set()
319 bridge->masters[i].size = size; in fake_master_set()
320 bridge->masters[i].aspace = aspace; in fake_master_set()
321 bridge->masters[i].cycle = cycle; in fake_master_set()
322 bridge->masters[i].dwidth = dwidth; in fake_master_set()
324 spin_unlock(&image->lock); in fake_master_set()
345 bridge = image->parent->driver_priv; in __fake_master_get()
347 i = image->number; in __fake_master_get()
349 *enabled = bridge->masters[i].enabled; in __fake_master_get()
350 *vme_base = bridge->masters[i].vme_base; in __fake_master_get()
351 *size = bridge->masters[i].size; in __fake_master_get()
352 *aspace = bridge->masters[i].aspace; in __fake_master_get()
353 *cycle = bridge->masters[i].cycle; in __fake_master_get()
354 *dwidth = bridge->masters[i].dwidth; in __fake_master_get()
366 spin_lock(&image->lock); in fake_master_get()
371 spin_unlock(&image->lock); in fake_master_get()
388 fake_bridge = bridge->parent; in fake_lm_check()
391 list_for_each_safe(pos, n, &fake_bridge->lm_resources) { in fake_lm_check()
395 if (bridge->lm_enabled == 0) in fake_lm_check()
398 lm_base = bridge->lm_base; in fake_lm_check()
399 lm_aspace = bridge->lm_aspace; in fake_lm_check()
400 lm_cycle = bridge->lm_cycle; in fake_lm_check()
404 for (i = 0; i < lm->monitors; i++) { in fake_lm_check()
408 if (bridge->lm_callback[i]) in fake_lm_check()
409 bridge->lm_callback[i]( in fake_lm_check()
410 bridge->lm_data[i]); in fake_lm_check()
427 start = bridge->slaves[i].vme_base; in fake_vmeread8()
428 end = bridge->slaves[i].vme_base + bridge->slaves[i].size; in fake_vmeread8()
430 if (aspace != bridge->slaves[i].aspace) in fake_vmeread8()
433 if (cycle != bridge->slaves[i].cycle) in fake_vmeread8()
437 offset = addr - bridge->slaves[i].vme_base; in fake_vmeread8()
438 loc = (u8 *)(bridge->slaves[i].buf_base + offset); in fake_vmeread8()
460 if (aspace != bridge->slaves[i].aspace) in fake_vmeread16()
463 if (cycle != bridge->slaves[i].cycle) in fake_vmeread16()
466 start = bridge->slaves[i].vme_base; in fake_vmeread16()
467 end = bridge->slaves[i].vme_base + bridge->slaves[i].size; in fake_vmeread16()
470 offset = addr - bridge->slaves[i].vme_base; in fake_vmeread16()
471 loc = (u16 *)(bridge->slaves[i].buf_base + offset); in fake_vmeread16()
493 if (aspace != bridge->slaves[i].aspace) in fake_vmeread32()
496 if (cycle != bridge->slaves[i].cycle) in fake_vmeread32()
499 start = bridge->slaves[i].vme_base; in fake_vmeread32()
500 end = bridge->slaves[i].vme_base + bridge->slaves[i].size; in fake_vmeread32()
503 offset = addr - bridge->slaves[i].vme_base; in fake_vmeread32()
504 loc = (u32 *)(bridge->slaves[i].buf_base + offset); in fake_vmeread32()
528 fake_bridge = image->parent; in fake_master_read()
530 priv = fake_bridge->driver_priv; in fake_master_read()
532 i = image->number; in fake_master_read()
534 addr = (unsigned long long)priv->masters[i].vme_base + offset; in fake_master_read()
535 aspace = priv->masters[i].aspace; in fake_master_read()
536 cycle = priv->masters[i].cycle; in fake_master_read()
537 dwidth = priv->masters[i].dwidth; in fake_master_read()
539 spin_lock(&image->lock); in fake_master_read()
542 * memcpy_xxx here because it may cut data transfers in to 8-bit in fake_master_read()
546 * automatically for non-aligned addresses, so we don't want the in fake_master_read()
557 if ((count - done) < 2) { in fake_master_read()
571 count32 = (count - done) & ~0x3; in fake_master_read()
578 count32 = (count - done) & ~0x3; in fake_master_read()
585 count32 = (count - done); in fake_master_read()
595 if ((count - done) & 0x2) { in fake_master_read()
601 if ((count - done) & 0x1) { in fake_master_read()
610 spin_unlock(&image->lock); in fake_master_read()
624 if (aspace != bridge->slaves[i].aspace) in fake_vmewrite8()
627 if (cycle != bridge->slaves[i].cycle) in fake_vmewrite8()
630 start = bridge->slaves[i].vme_base; in fake_vmewrite8()
631 end = bridge->slaves[i].vme_base + bridge->slaves[i].size; in fake_vmewrite8()
634 offset = addr - bridge->slaves[i].vme_base; in fake_vmewrite8()
635 loc = (u8 *)((void *)bridge->slaves[i].buf_base + offset); in fake_vmewrite8()
655 if (aspace != bridge->slaves[i].aspace) in fake_vmewrite16()
658 if (cycle != bridge->slaves[i].cycle) in fake_vmewrite16()
661 start = bridge->slaves[i].vme_base; in fake_vmewrite16()
662 end = bridge->slaves[i].vme_base + bridge->slaves[i].size; in fake_vmewrite16()
665 offset = addr - bridge->slaves[i].vme_base; in fake_vmewrite16()
666 loc = (u16 *)((void *)bridge->slaves[i].buf_base + offset); in fake_vmewrite16()
686 if (aspace != bridge->slaves[i].aspace) in fake_vmewrite32()
689 if (cycle != bridge->slaves[i].cycle) in fake_vmewrite32()
692 start = bridge->slaves[i].vme_base; in fake_vmewrite32()
693 end = bridge->slaves[i].vme_base + bridge->slaves[i].size; in fake_vmewrite32()
696 offset = addr - bridge->slaves[i].vme_base; in fake_vmewrite32()
697 loc = (u32 *)((void *)bridge->slaves[i].buf_base + offset); in fake_vmewrite32()
721 fake_bridge = image->parent; in fake_master_write()
723 bridge = fake_bridge->driver_priv; in fake_master_write()
725 i = image->number; in fake_master_write()
727 addr = bridge->masters[i].vme_base + offset; in fake_master_write()
728 aspace = bridge->masters[i].aspace; in fake_master_write()
729 cycle = bridge->masters[i].cycle; in fake_master_write()
730 dwidth = bridge->masters[i].dwidth; in fake_master_write()
732 spin_lock(&image->lock); in fake_master_write()
746 if ((count - done) < 2) { in fake_master_write()
760 count32 = (count - done) & ~0x3; in fake_master_write()
767 count32 = (count - done) & ~0x3; in fake_master_write()
774 count32 = (count - done); in fake_master_write()
784 if ((count - done) & 0x2) { in fake_master_write()
791 if ((count - done) & 0x1) { in fake_master_write()
800 spin_unlock(&image->lock); in fake_master_write()
819 bridge = image->parent->driver_priv; in fake_master_rmw()
822 i = image->number; in fake_master_rmw()
824 base = bridge->masters[i].vme_base; in fake_master_rmw()
825 aspace = bridge->masters[i].aspace; in fake_master_rmw()
826 cycle = bridge->masters[i].cycle; in fake_master_rmw()
829 spin_lock(&image->lock); in fake_master_rmw()
844 spin_unlock(&image->lock); in fake_master_rmw()
850 * All 4 location monitors reside at the same base - this is therefore a
853 * This does not enable the LM monitor - that should be done when the first
863 fake_bridge = lm->parent; in fake_lm_set()
865 bridge = fake_bridge->driver_priv; in fake_lm_set()
867 mutex_lock(&lm->mtx); in fake_lm_set()
870 for (i = 0; i < lm->monitors; i++) { in fake_lm_set()
871 if (bridge->lm_callback[i]) { in fake_lm_set()
872 mutex_unlock(&lm->mtx); in fake_lm_set()
874 return -EBUSY; in fake_lm_set()
885 mutex_unlock(&lm->mtx); in fake_lm_set()
887 return -EINVAL; in fake_lm_set()
890 bridge->lm_base = lm_base; in fake_lm_set()
891 bridge->lm_aspace = aspace; in fake_lm_set()
892 bridge->lm_cycle = cycle; in fake_lm_set()
894 mutex_unlock(&lm->mtx); in fake_lm_set()
907 bridge = lm->parent->driver_priv; in fake_lm_get()
909 mutex_lock(&lm->mtx); in fake_lm_get()
911 *lm_base = bridge->lm_base; in fake_lm_get()
912 *aspace = bridge->lm_aspace; in fake_lm_get()
913 *cycle = bridge->lm_cycle; in fake_lm_get()
915 mutex_unlock(&lm->mtx); in fake_lm_get()
917 return bridge->lm_enabled; in fake_lm_get()
931 fake_bridge = lm->parent; in fake_lm_attach()
933 bridge = fake_bridge->driver_priv; in fake_lm_attach()
935 mutex_lock(&lm->mtx); in fake_lm_attach()
937 /* Ensure that the location monitor is configured - need PGM or DATA */ in fake_lm_attach()
938 if (bridge->lm_cycle == 0) { in fake_lm_attach()
939 mutex_unlock(&lm->mtx); in fake_lm_attach()
941 return -EINVAL; in fake_lm_attach()
945 if (bridge->lm_callback[monitor]) { in fake_lm_attach()
946 mutex_unlock(&lm->mtx); in fake_lm_attach()
948 return -EBUSY; in fake_lm_attach()
952 bridge->lm_callback[monitor] = callback; in fake_lm_attach()
953 bridge->lm_data[monitor] = data; in fake_lm_attach()
956 bridge->lm_enabled = 1; in fake_lm_attach()
958 mutex_unlock(&lm->mtx); in fake_lm_attach()
972 bridge = lm->parent->driver_priv; in fake_lm_detach()
974 mutex_lock(&lm->mtx); in fake_lm_detach()
977 bridge->lm_callback[monitor] = NULL; in fake_lm_detach()
978 bridge->lm_data[monitor] = NULL; in fake_lm_detach()
982 for (i = 0; i < lm->monitors; i++) { in fake_lm_detach()
983 if (bridge->lm_callback[i]) in fake_lm_detach()
988 bridge->lm_enabled = 0; in fake_lm_detach()
990 mutex_unlock(&lm->mtx); in fake_lm_detach()
1004 dma_addr_t *dma) in fake_alloc_consistent() argument
1009 *dma = fake_ptr_to_pci(alloc); in fake_alloc_consistent()
1015 void *vaddr, dma_addr_t dma) in fake_free_consistent() argument
1019 dma_free_coherent(parent, size, vaddr, dma); in fake_free_consistent()
1026 * Access to the CR/CSR can be configured at power-up. The location of the
1039 bridge = fake_bridge->driver_priv; in fake_crcsr_init()
1042 bridge->crcsr_kernel = kzalloc(VME_CRCSR_BUF_SIZE, GFP_KERNEL); in fake_crcsr_init()
1043 bridge->crcsr_bus = fake_ptr_to_pci(bridge->crcsr_kernel); in fake_crcsr_init()
1044 if (!bridge->crcsr_kernel) in fake_crcsr_init()
1045 return -ENOMEM; in fake_crcsr_init()
1058 bridge = fake_bridge->driver_priv; in fake_crcsr_exit()
1060 kfree(bridge->crcsr_kernel); in fake_crcsr_exit()
1082 retval = -ENOMEM; in fake_init()
1088 retval = -ENOMEM; in fake_init()
1092 fake_bridge->driver_priv = fake_device; in fake_init()
1094 fake_bridge->parent = vme_root; in fake_init()
1096 fake_device->parent = fake_bridge; in fake_init()
1099 mutex_init(&fake_device->vme_int); in fake_init()
1100 mutex_init(&fake_bridge->irq_mtx); in fake_init()
1101 tasklet_init(&fake_device->int_tasklet, fake_VIRQ_tasklet, in fake_init()
1104 strcpy(fake_bridge->name, driver_name); in fake_init()
1107 INIT_LIST_HEAD(&fake_bridge->master_resources); in fake_init()
1111 retval = -ENOMEM; in fake_init()
1114 master_image->parent = fake_bridge; in fake_init()
1115 spin_lock_init(&master_image->lock); in fake_init()
1116 master_image->locked = 0; in fake_init()
1117 master_image->number = i; in fake_init()
1118 master_image->address_attr = VME_A16 | VME_A24 | VME_A32 | in fake_init()
1120 master_image->cycle_attr = VME_SCT | VME_BLT | VME_MBLT | in fake_init()
1124 master_image->width_attr = VME_D16 | VME_D32; in fake_init()
1125 memset(&master_image->bus_resource, 0, in fake_init()
1127 master_image->kern_base = NULL; in fake_init()
1128 list_add_tail(&master_image->list, in fake_init()
1129 &fake_bridge->master_resources); in fake_init()
1133 INIT_LIST_HEAD(&fake_bridge->slave_resources); in fake_init()
1137 retval = -ENOMEM; in fake_init()
1140 slave_image->parent = fake_bridge; in fake_init()
1141 mutex_init(&slave_image->mtx); in fake_init()
1142 slave_image->locked = 0; in fake_init()
1143 slave_image->number = i; in fake_init()
1144 slave_image->address_attr = VME_A16 | VME_A24 | VME_A32 | in fake_init()
1147 slave_image->cycle_attr = VME_SCT | VME_BLT | VME_MBLT | in fake_init()
1151 list_add_tail(&slave_image->list, in fake_init()
1152 &fake_bridge->slave_resources); in fake_init()
1156 INIT_LIST_HEAD(&fake_bridge->lm_resources); in fake_init()
1159 retval = -ENOMEM; in fake_init()
1162 lm->parent = fake_bridge; in fake_init()
1163 mutex_init(&lm->mtx); in fake_init()
1164 lm->locked = 0; in fake_init()
1165 lm->number = 1; in fake_init()
1166 lm->monitors = 4; in fake_init()
1167 list_add_tail(&lm->list, &fake_bridge->lm_resources); in fake_init()
1169 fake_bridge->slave_get = fake_slave_get; in fake_init()
1170 fake_bridge->slave_set = fake_slave_set; in fake_init()
1171 fake_bridge->master_get = fake_master_get; in fake_init()
1172 fake_bridge->master_set = fake_master_set; in fake_init()
1173 fake_bridge->master_read = fake_master_read; in fake_init()
1174 fake_bridge->master_write = fake_master_write; in fake_init()
1175 fake_bridge->master_rmw = fake_master_rmw; in fake_init()
1176 fake_bridge->irq_set = fake_irq_set; in fake_init()
1177 fake_bridge->irq_generate = fake_irq_generate; in fake_init()
1178 fake_bridge->lm_set = fake_lm_set; in fake_init()
1179 fake_bridge->lm_get = fake_lm_get; in fake_init()
1180 fake_bridge->lm_attach = fake_lm_attach; in fake_init()
1181 fake_bridge->lm_detach = fake_lm_detach; in fake_init()
1182 fake_bridge->slot_get = fake_slot_get; in fake_init()
1183 fake_bridge->alloc_consistent = fake_alloc_consistent; in fake_init()
1184 fake_bridge->free_consistent = fake_free_consistent; in fake_init()
1212 list_for_each_safe(pos, n, &fake_bridge->lm_resources) { in fake_init()
1219 list_for_each_safe(pos, n, &fake_bridge->slave_resources) { in fake_init()
1226 list_for_each_safe(pos, n, &fake_bridge->master_resources) { in fake_init()
1254 bridge = fake_bridge->driver_priv; in fake_exit()
1262 bridge->masters[i].enabled = 0; in fake_exit()
1265 bridge->slaves[i].enabled = 0; in fake_exit()
1270 bridge->lm_enabled = 0; in fake_exit()
1276 list_for_each_safe(pos, tmplist, &fake_bridge->slave_resources) { in fake_exit()
1283 list_for_each_safe(pos, tmplist, &fake_bridge->master_resources) { in fake_exit()
1290 kfree(fake_bridge->driver_priv); in fake_exit()