Lines Matching +full:clk +full:- +full:mgr
1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/clk.h>
206 struct omap_overlay_manager *mgr);
208 struct omap_overlay_manager *mgr);
302 struct clk *dss_clk;
407 return to_platform_device(dssdev->dev); in dsi_get_dsidev_from_dssdev()
428 return out ? to_platform_device(out->dev) : NULL; in dsi_get_dsidev_from_id()
438 case DSI_PROTO: base = dsi->proto_base; break; in dsi_write_reg()
439 case DSI_PHY: base = dsi->phy_base; break; in dsi_write_reg()
440 case DSI_PLL: base = dsi->pll_base; break; in dsi_write_reg()
454 case DSI_PROTO: base = dsi->proto_base; break; in dsi_read_reg()
455 case DSI_PHY: base = dsi->phy_base; break; in dsi_read_reg()
456 case DSI_PLL: base = dsi->pll_base; break; in dsi_read_reg()
468 down(&dsi->bus_lock); in dsi_bus_lock()
476 up(&dsi->bus_lock); in dsi_bus_unlock()
483 return dsi->bus_lock.count == 0; in dsi_bus_is_locked()
500 while (t-- > 0) { in wait_for_bit_change()
539 dsi->perf_setup_time = ktime_get(); in dsi_perf_mark_setup()
545 dsi->perf_start_time = ktime_get(); in dsi_perf_mark_start()
560 setup_time = ktime_sub(dsi->perf_start_time, dsi->perf_setup_time); in dsi_perf_show()
565 trans_time = ktime_sub(t, dsi->perf_start_time); in dsi_perf_show()
572 total_bytes = dsi->update_bytes; in dsi_perf_show()
697 spin_lock(&dsi->irq_stats_lock); in dsi_collect_irq_stats()
699 dsi->irq_stats.irq_count++; in dsi_collect_irq_stats()
700 dss_collect_irq_stats(irqstatus, dsi->irq_stats.dsi_irqs); in dsi_collect_irq_stats()
703 dss_collect_irq_stats(vcstatus[i], dsi->irq_stats.vc_irqs[i]); in dsi_collect_irq_stats()
705 dss_collect_irq_stats(ciostatus, dsi->irq_stats.cio_irqs); in dsi_collect_irq_stats()
707 spin_unlock(&dsi->irq_stats_lock); in dsi_collect_irq_stats()
724 spin_lock(&dsi->errors_lock); in dsi_handle_irq_errors()
725 dsi->errors |= irqstatus & DSI_IRQ_ERROR_MASK; in dsi_handle_irq_errors()
726 spin_unlock(&dsi->errors_lock); in dsi_handle_irq_errors()
757 if (isr_data->isr && isr_data->mask & irqstatus) in dsi_call_isrs()
758 isr_data->isr(isr_data->arg, irqstatus); in dsi_call_isrs()
767 dsi_call_isrs(isr_tables->isr_table, in dsi_handle_isrs()
768 ARRAY_SIZE(isr_tables->isr_table), in dsi_handle_isrs()
774 dsi_call_isrs(isr_tables->isr_table_vc[i], in dsi_handle_isrs()
775 ARRAY_SIZE(isr_tables->isr_table_vc[i]), in dsi_handle_isrs()
780 dsi_call_isrs(isr_tables->isr_table_cio, in dsi_handle_isrs()
781 ARRAY_SIZE(isr_tables->isr_table_cio), in dsi_handle_isrs()
795 if (!dsi->is_enabled) in omap_dsi_irq_handler()
798 spin_lock(&dsi->irq_lock); in omap_dsi_irq_handler()
804 spin_unlock(&dsi->irq_lock); in omap_dsi_irq_handler()
837 del_timer(&dsi->te_timer); in omap_dsi_irq_handler()
842 memcpy(&dsi->isr_tables_copy, &dsi->isr_tables, in omap_dsi_irq_handler()
843 sizeof(dsi->isr_tables)); in omap_dsi_irq_handler()
845 spin_unlock(&dsi->irq_lock); in omap_dsi_irq_handler()
847 dsi_handle_isrs(&dsi->isr_tables_copy, irqstatus, vcstatus, ciostatus); in omap_dsi_irq_handler()
856 /* dsi->irq_lock has to be locked by the caller */
873 if (isr_data->isr == NULL) in _omap_dsi_configure_irqs()
876 mask |= isr_data->mask; in _omap_dsi_configure_irqs()
889 /* dsi->irq_lock has to be locked by the caller */
897 _omap_dsi_configure_irqs(dsidev, dsi->isr_tables.isr_table, in _omap_dsi_set_irqs()
898 ARRAY_SIZE(dsi->isr_tables.isr_table), mask, in _omap_dsi_set_irqs()
902 /* dsi->irq_lock has to be locked by the caller */
907 _omap_dsi_configure_irqs(dsidev, dsi->isr_tables.isr_table_vc[vc], in _omap_dsi_set_irqs_vc()
908 ARRAY_SIZE(dsi->isr_tables.isr_table_vc[vc]), in _omap_dsi_set_irqs_vc()
913 /* dsi->irq_lock has to be locked by the caller */
918 _omap_dsi_configure_irqs(dsidev, dsi->isr_tables.isr_table_cio, in _omap_dsi_set_irqs_cio()
919 ARRAY_SIZE(dsi->isr_tables.isr_table_cio), in _omap_dsi_set_irqs_cio()
930 spin_lock_irqsave(&dsi->irq_lock, flags); in _dsi_initialize_irq()
932 memset(&dsi->isr_tables, 0, sizeof(dsi->isr_tables)); in _dsi_initialize_irq()
939 spin_unlock_irqrestore(&dsi->irq_lock, flags); in _dsi_initialize_irq()
952 free_idx = -1; in _dsi_register_isr()
956 if (isr_data->isr == isr && isr_data->arg == arg && in _dsi_register_isr()
957 isr_data->mask == mask) { in _dsi_register_isr()
958 return -EINVAL; in _dsi_register_isr()
961 if (isr_data->isr == NULL && free_idx == -1) in _dsi_register_isr()
965 if (free_idx == -1) in _dsi_register_isr()
966 return -EBUSY; in _dsi_register_isr()
969 isr_data->isr = isr; in _dsi_register_isr()
970 isr_data->arg = arg; in _dsi_register_isr()
971 isr_data->mask = mask; in _dsi_register_isr()
984 if (isr_data->isr != isr || isr_data->arg != arg || in _dsi_unregister_isr()
985 isr_data->mask != mask) in _dsi_unregister_isr()
988 isr_data->isr = NULL; in _dsi_unregister_isr()
989 isr_data->arg = NULL; in _dsi_unregister_isr()
990 isr_data->mask = 0; in _dsi_unregister_isr()
995 return -EINVAL; in _dsi_unregister_isr()
1005 spin_lock_irqsave(&dsi->irq_lock, flags); in dsi_register_isr()
1007 r = _dsi_register_isr(isr, arg, mask, dsi->isr_tables.isr_table, in dsi_register_isr()
1008 ARRAY_SIZE(dsi->isr_tables.isr_table)); in dsi_register_isr()
1013 spin_unlock_irqrestore(&dsi->irq_lock, flags); in dsi_register_isr()
1025 spin_lock_irqsave(&dsi->irq_lock, flags); in dsi_unregister_isr()
1027 r = _dsi_unregister_isr(isr, arg, mask, dsi->isr_tables.isr_table, in dsi_unregister_isr()
1028 ARRAY_SIZE(dsi->isr_tables.isr_table)); in dsi_unregister_isr()
1033 spin_unlock_irqrestore(&dsi->irq_lock, flags); in dsi_unregister_isr()
1045 spin_lock_irqsave(&dsi->irq_lock, flags); in dsi_register_isr_vc()
1048 dsi->isr_tables.isr_table_vc[channel], in dsi_register_isr_vc()
1049 ARRAY_SIZE(dsi->isr_tables.isr_table_vc[channel])); in dsi_register_isr_vc()
1054 spin_unlock_irqrestore(&dsi->irq_lock, flags); in dsi_register_isr_vc()
1066 spin_lock_irqsave(&dsi->irq_lock, flags); in dsi_unregister_isr_vc()
1069 dsi->isr_tables.isr_table_vc[channel], in dsi_unregister_isr_vc()
1070 ARRAY_SIZE(dsi->isr_tables.isr_table_vc[channel])); in dsi_unregister_isr_vc()
1075 spin_unlock_irqrestore(&dsi->irq_lock, flags); in dsi_unregister_isr_vc()
1087 spin_lock_irqsave(&dsi->irq_lock, flags); in dsi_register_isr_cio()
1089 r = _dsi_register_isr(isr, arg, mask, dsi->isr_tables.isr_table_cio, in dsi_register_isr_cio()
1090 ARRAY_SIZE(dsi->isr_tables.isr_table_cio)); in dsi_register_isr_cio()
1095 spin_unlock_irqrestore(&dsi->irq_lock, flags); in dsi_register_isr_cio()
1107 spin_lock_irqsave(&dsi->irq_lock, flags); in dsi_unregister_isr_cio()
1109 r = _dsi_unregister_isr(isr, arg, mask, dsi->isr_tables.isr_table_cio, in dsi_unregister_isr_cio()
1110 ARRAY_SIZE(dsi->isr_tables.isr_table_cio)); in dsi_unregister_isr_cio()
1115 spin_unlock_irqrestore(&dsi->irq_lock, flags); in dsi_unregister_isr_cio()
1125 spin_lock_irqsave(&dsi->errors_lock, flags); in dsi_get_errors()
1126 e = dsi->errors; in dsi_get_errors()
1127 dsi->errors = 0; in dsi_get_errors()
1128 spin_unlock_irqrestore(&dsi->errors_lock, flags); in dsi_get_errors()
1139 r = pm_runtime_get_sync(&dsi->pdev->dev); in dsi_runtime_get()
1141 pm_runtime_put_sync(&dsi->pdev->dev); in dsi_runtime_get()
1154 r = pm_runtime_put_sync(&dsi->pdev->dev); in dsi_runtime_put()
1155 WARN_ON(r < 0 && r != -ENOSYS); in dsi_runtime_put()
1163 if (dsi->vdds_dsi_reg != NULL) in dsi_regulator_init()
1166 vdds_dsi = devm_regulator_get(&dsi->pdev->dev, "vdd"); in dsi_regulator_init()
1169 if (PTR_ERR(vdds_dsi) != -EPROBE_DEFER) in dsi_regulator_init()
1174 dsi->vdds_dsi_reg = vdds_dsi; in dsi_regulator_init()
1223 return -EIO; in dsi_if_enable()
1233 return dsi->pll.cinfo.clkout[HSDIV_DISPC]; in dsi_get_pll_hsdiv_dispc_rate()
1240 return dsi->pll.cinfo.clkout[HSDIV_DSI]; in dsi_get_pll_hsdiv_dsi_rate()
1247 return dsi->pll.cinfo.clkdco / 16; in dsi_get_txbyteclkhs()
1255 if (dss_get_dsi_clk_source(dsi->module_id) == OMAP_DSS_CLK_SRC_FCK) { in dsi_fclk_rate()
1257 r = clk_get_rate(dsi->dss_clk); in dsi_fclk_rate()
1277 return -EINVAL; in dsi_lp_clock_calc()
1279 lp_cinfo->lp_clk_div = lp_clk_div; in dsi_lp_clock_calc()
1280 lp_cinfo->lp_clk = lp_clk; in dsi_lp_clock_calc()
1294 lp_clk_div = dsi->user_lp_cinfo.lp_clk_div; in dsi_set_lp_clk_divisor()
1297 return -EINVAL; in dsi_set_lp_clk_divisor()
1304 dsi->current_lp_cinfo.lp_clk = lp_clk; in dsi_set_lp_clk_divisor()
1305 dsi->current_lp_cinfo.lp_clk_div = lp_clk_div; in dsi_set_lp_clk_divisor()
1320 if (dsi->scp_clk_refcount++ == 0) in dsi_enable_scp_clk()
1328 WARN_ON(dsi->scp_clk_refcount == 0); in dsi_disable_scp_clk()
1329 if (--dsi->scp_clk_refcount == 0) in dsi_disable_scp_clk()
1345 /* DSI-PLL power command 0x3 is not working */ in dsi_pll_power()
1358 return -ENODEV; in dsi_pll_power()
1373 cinfo->mX[HSDIV_DSI] = DIV_ROUND_UP(cinfo->clkdco, max_dsi_fck); in dsi_pll_calc_dsi_fck()
1374 cinfo->clkout[HSDIV_DSI] = cinfo->clkdco / cinfo->mX[HSDIV_DSI]; in dsi_pll_calc_dsi_fck()
1380 struct platform_device *dsidev = dsi->pdev; in dsi_pll_enable()
1394 * Note: SCP CLK is not required on OMAP3, but it is required on OMAP4. in dsi_pll_enable()
1398 if (!dsi->vdds_dsi_enabled) { in dsi_pll_enable()
1399 r = regulator_enable(dsi->vdds_dsi_reg); in dsi_pll_enable()
1402 dsi->vdds_dsi_enabled = true; in dsi_pll_enable()
1410 r = -ENODEV; in dsi_pll_enable()
1428 if (dsi->vdds_dsi_enabled) { in dsi_pll_enable()
1429 regulator_disable(dsi->vdds_dsi_reg); in dsi_pll_enable()
1430 dsi->vdds_dsi_enabled = false; in dsi_pll_enable()
1444 WARN_ON(!dsi->vdds_dsi_enabled); in dsi_pll_uninit()
1445 regulator_disable(dsi->vdds_dsi_reg); in dsi_pll_uninit()
1446 dsi->vdds_dsi_enabled = false; in dsi_pll_uninit()
1458 struct platform_device *dsidev = dsi->pdev; in dsi_pll_disable()
1467 struct dss_pll_clock_info *cinfo = &dsi->pll.cinfo; in dsi_dump_dsidev_clocks()
1469 int dsi_module = dsi->module_id; in dsi_dump_dsidev_clocks()
1470 struct dss_pll *pll = &dsi->pll; in dsi_dump_dsidev_clocks()
1478 seq_printf(s, "- DSI%d PLL -\n", dsi_module + 1); in dsi_dump_dsidev_clocks()
1480 seq_printf(s, "dsi pll clkin\t%lu\n", clk_get_rate(pll->clkin)); in dsi_dump_dsidev_clocks()
1482 seq_printf(s, "Fint\t\t%-16lun %u\n", cinfo->fint, cinfo->n); in dsi_dump_dsidev_clocks()
1484 seq_printf(s, "CLKIN4DDR\t%-16lum %u\n", in dsi_dump_dsidev_clocks()
1485 cinfo->clkdco, cinfo->m); in dsi_dump_dsidev_clocks()
1487 seq_printf(s, "DSI_PLL_HSDIV_DISPC (%s)\t%-16lum_dispc %u\t(%s)\n", in dsi_dump_dsidev_clocks()
1491 cinfo->clkout[HSDIV_DISPC], in dsi_dump_dsidev_clocks()
1492 cinfo->mX[HSDIV_DISPC], in dsi_dump_dsidev_clocks()
1496 seq_printf(s, "DSI_PLL_HSDIV_DSI (%s)\t%-16lum_dsi %u\t(%s)\n", in dsi_dump_dsidev_clocks()
1500 cinfo->clkout[HSDIV_DSI], in dsi_dump_dsidev_clocks()
1501 cinfo->mX[HSDIV_DSI], in dsi_dump_dsidev_clocks()
1505 seq_printf(s, "- DSI%d -\n", dsi_module + 1); in dsi_dump_dsidev_clocks()
1514 cinfo->clkdco / 4); in dsi_dump_dsidev_clocks()
1518 seq_printf(s, "LP_CLK\t\t%lu\n", dsi->current_lp_cinfo.lp_clk); in dsi_dump_dsidev_clocks()
1543 spin_lock_irqsave(&dsi->irq_stats_lock, flags); in dsi_dump_dsidev_irqs()
1545 stats = dsi->irq_stats; in dsi_dump_dsidev_irqs()
1546 memset(&dsi->irq_stats, 0, sizeof(dsi->irq_stats)); in dsi_dump_dsidev_irqs()
1547 dsi->irq_stats.last_reset = jiffies; in dsi_dump_dsidev_irqs()
1549 spin_unlock_irqrestore(&dsi->irq_stats_lock, flags); in dsi_dump_dsidev_irqs()
1552 jiffies_to_msecs(jiffies - stats.last_reset)); in dsi_dump_dsidev_irqs()
1556 seq_printf(s, "%-20s %10d\n", #x, stats.dsi_irqs[ffs(DSI_IRQ_##x)-1]) in dsi_dump_dsidev_irqs()
1558 seq_printf(s, "-- DSI%d interrupts --\n", dsi->module_id + 1); in dsi_dump_dsidev_irqs()
1579 seq_printf(s, "%-20s %10d %10d %10d %10d\n", #x, \ in dsi_dump_dsidev_irqs()
1580 stats.vc_irqs[0][ffs(DSI_VC_IRQ_##x)-1], \ in dsi_dump_dsidev_irqs()
1581 stats.vc_irqs[1][ffs(DSI_VC_IRQ_##x)-1], \ in dsi_dump_dsidev_irqs()
1582 stats.vc_irqs[2][ffs(DSI_VC_IRQ_##x)-1], \ in dsi_dump_dsidev_irqs()
1583 stats.vc_irqs[3][ffs(DSI_VC_IRQ_##x)-1]); in dsi_dump_dsidev_irqs()
1585 seq_printf(s, "-- VC interrupts --\n"); in dsi_dump_dsidev_irqs()
1598 seq_printf(s, "%-20s %10d\n", #x, \ in dsi_dump_dsidev_irqs()
1599 stats.cio_irqs[ffs(DSI_CIO_IRQ_##x)-1]); in dsi_dump_dsidev_irqs()
1601 seq_printf(s, "-- CIO interrupts --\n"); in dsi_dump_dsidev_irqs()
1643 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dsi_read_reg(dsidev, r)) in dsi_dump_dsidev_regs()
1758 return -ENODEV; in dsi_cio_power()
1816 for (i = 0; i < dsi->num_lanes_used; ++i) { in dsi_set_lane_config()
1821 for (t = 0; t < dsi->num_lanes_supported; ++t) in dsi_set_lane_config()
1822 if (dsi->lanes[t].function == functions[i]) in dsi_set_lane_config()
1825 if (t == dsi->num_lanes_supported) in dsi_set_lane_config()
1826 return -EINVAL; in dsi_set_lane_config()
1829 polarity = dsi->lanes[t].polarity; in dsi_set_lane_config()
1836 for (; i < dsi->num_lanes_supported; ++i) { in dsi_set_lane_config()
1853 unsigned long ddr_clk = dsi->pll.cinfo.clkdco / 4; in ns2ddr()
1861 unsigned long ddr_clk = dsi->pll.cinfo.clkdco / 4; in ddr2ns()
1897 /* min tclk-prepare + tclk-zero = 300ns */ in dsi_cio_timings()
1949 u8 lptxscp_start = dsi->num_lanes_supported == 3 ? 22 : 26; in dsi_cio_enable_lane_override()
1953 for (i = 0; i < dsi->num_lanes_supported; ++i) { in dsi_cio_enable_lane_override()
1954 unsigned p = dsi->lanes[i].polarity; in dsi_cio_enable_lane_override()
2006 for (i = 0; i < dsi->num_lanes_supported; ++i) in dsi_cio_wait_tx_clk_esc_reset()
2007 in_use[i] = dsi->lanes[i].function != DSI_LANE_UNUSED; in dsi_cio_wait_tx_clk_esc_reset()
2017 for (i = 0; i < dsi->num_lanes_supported; ++i) { in dsi_cio_wait_tx_clk_esc_reset()
2022 if (ok == dsi->num_lanes_supported) in dsi_cio_wait_tx_clk_esc_reset()
2025 if (--t == 0) { in dsi_cio_wait_tx_clk_esc_reset()
2026 for (i = 0; i < dsi->num_lanes_supported; ++i) { in dsi_cio_wait_tx_clk_esc_reset()
2033 return -EIO; in dsi_cio_wait_tx_clk_esc_reset()
2047 for (i = 0; i < dsi->num_lanes_supported; ++i) { in dsi_get_lane_mask()
2048 if (dsi->lanes[i].function != DSI_LANE_UNUSED) in dsi_get_lane_mask()
2063 r = dss_dsi_enable_pads(dsi->module_id, dsi_get_lane_mask(dsidev)); in dsi_cio_init()
2076 r = -EIO; in dsi_cio_init()
2092 if (dsi->ulps_enabled) { in dsi_cio_init()
2098 /* ULPS is exited by Mark-1 state for 1ms, followed by in dsi_cio_init()
2109 for (i = 0; i < dsi->num_lanes_supported; ++i) { in dsi_cio_init()
2110 if (dsi->lanes[i].function == DSI_LANE_UNUSED) in dsi_cio_init()
2124 r = -ENODEV; in dsi_cio_init()
2136 if (dsi->ulps_enabled) { in dsi_cio_init()
2137 /* Keep Mark-1 state for 1ms (as per DSI spec) */ in dsi_cio_init()
2142 /* Disable the override. The lanes should be set to Mark-11 in dsi_cio_init()
2152 if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { in dsi_cio_init()
2155 dsi->vm_timings.ddr_clk_always_on, 13, 13); in dsi_cio_init()
2158 dsi->ulps_enabled = false; in dsi_cio_init()
2169 if (dsi->ulps_enabled) in dsi_cio_init()
2173 dss_dsi_disable_pads(dsi->module_id, dsi_get_lane_mask(dsidev)); in dsi_cio_init()
2186 dss_dsi_disable_pads(dsi->module_id, dsi_get_lane_mask(dsidev)); in dsi_cio_uninit()
2198 dsi->vc[0].tx_fifo_size = size1; in dsi_config_tx_fifo()
2199 dsi->vc[1].tx_fifo_size = size2; in dsi_config_tx_fifo()
2200 dsi->vc[2].tx_fifo_size = size3; in dsi_config_tx_fifo()
2201 dsi->vc[3].tx_fifo_size = size4; in dsi_config_tx_fifo()
2205 int size = dsi->vc[i].tx_fifo_size; in dsi_config_tx_fifo()
2231 dsi->vc[0].rx_fifo_size = size1; in dsi_config_rx_fifo()
2232 dsi->vc[1].rx_fifo_size = size2; in dsi_config_rx_fifo()
2233 dsi->vc[2].rx_fifo_size = size3; in dsi_config_rx_fifo()
2234 dsi->vc[3].rx_fifo_size = size4; in dsi_config_rx_fifo()
2238 int size = dsi->vc[i].rx_fifo_size; in dsi_config_rx_fifo()
2265 return -EIO; in dsi_force_tx_stop_mode_io()
2280 struct dsi_data *dsi = dsi_get_dsidrv_data(vp_data->dsidev); in dsi_packet_sent_handler_vp()
2281 const int channel = dsi->update_channel; in dsi_packet_sent_handler_vp()
2282 u8 bit = dsi->te_enabled ? 30 : 31; in dsi_packet_sent_handler_vp()
2284 if (REG_GET(vp_data->dsidev, DSI_VC_TE(channel), bit, bit) == 0) in dsi_packet_sent_handler_vp()
2285 complete(vp_data->completion); in dsi_packet_sent_handler_vp()
2299 bit = dsi->te_enabled ? 30 : 31; in dsi_sync_vc_vp()
2311 r = -EIO; in dsi_sync_vc_vp()
2331 struct dsi_data *dsi = dsi_get_dsidrv_data(l4_data->dsidev); in dsi_packet_sent_handler_l4()
2332 const int channel = dsi->update_channel; in dsi_packet_sent_handler_l4()
2334 if (REG_GET(l4_data->dsidev, DSI_VC_CTRL(channel), 5, 5) == 0) in dsi_packet_sent_handler_l4()
2335 complete(l4_data->completion); in dsi_packet_sent_handler_l4()
2357 r = -EIO; in dsi_sync_vc_l4()
2382 switch (dsi->vc[channel].source) { in dsi_sync_vc()
2389 return -EINVAL; in dsi_sync_vc()
2406 return -EIO; in dsi_vc_enable()
2440 dsi->vc[channel].source = DSI_VC_SOURCE_L4; in dsi_vc_initial_config()
2448 if (dsi->vc[channel].source == source) in dsi_vc_config_source()
2460 return -EIO; in dsi_vc_config_source()
2474 dsi->vc[channel].source = source; in dsi_vc_config_source()
2500 if (dsi->vm_timings.ddr_clk_always_on && enable) in dsi_vc_enable_hs()
2537 DSSERR("\t\tECC Error, single-bit (corrected)\n"); in dsi_show_rx_ack_with_err()
2539 DSSERR("\t\tECC Error, multi-bit (not corrected)\n"); in dsi_show_rx_ack_with_err()
2588 if (dsi->debug_write || dsi->debug_read) in dsi_vc_send_bta()
2631 r = -EIO; in dsi_vc_send_bta_sync()
2638 r = -EIO; in dsi_vc_send_bta_sync()
2660 data_id = data_type | dsi->vc[channel].vc_id << 6; in dsi_vc_write_long_header()
2691 if (dsi->debug_write) in dsi_vc_send_long()
2695 if (dsi->vc[channel].tx_fifo_size * 32 * 4 < len + 4) { in dsi_vc_send_long()
2697 return -EINVAL; in dsi_vc_send_long()
2706 if (dsi->debug_write) in dsi_vc_send_long()
2721 if (dsi->debug_write) in dsi_vc_send_long()
2754 if (dsi->debug_write) in dsi_vc_send_short()
2763 return -EINVAL; in dsi_vc_send_short()
2766 data_id = data_type | dsi->vc[channel].vc_id << 6; in dsi_vc_send_short()
2849 r = -EIO; in dsi_vc_write_common()
2880 if (dsi->debug_read) in dsi_vc_dcs_send_read_request()
2902 if (dsi->debug_read) in dsi_vc_generic_send_read_request()
2917 return -EINVAL; in dsi_vc_generic_send_read_request()
2941 r = -EIO; in dsi_vc_read_rx_fifo()
2946 if (dsi->debug_read) in dsi_vc_read_rx_fifo()
2952 r = -EIO; in dsi_vc_read_rx_fifo()
2959 if (dsi->debug_read) in dsi_vc_read_rx_fifo()
2965 r = -EIO; in dsi_vc_read_rx_fifo()
2976 if (dsi->debug_read) in dsi_vc_read_rx_fifo()
2982 r = -EIO; in dsi_vc_read_rx_fifo()
2995 if (dsi->debug_read) in dsi_vc_read_rx_fifo()
3001 r = -EIO; in dsi_vc_read_rx_fifo()
3010 if (dsi->debug_read) in dsi_vc_read_rx_fifo()
3028 r = -EIO; in dsi_vc_read_rx_fifo()
3059 r = -EIO; in dsi_vc_dcs_read()
3089 r = -EIO; in dsi_vc_generic_read()
3116 WARN_ON(dsi->ulps_enabled); in dsi_enter_ulps()
3118 if (dsi->ulps_enabled) in dsi_enter_ulps()
3142 return -EIO; in dsi_enter_ulps()
3147 return -EIO; in dsi_enter_ulps()
3157 for (i = 0; i < dsi->num_lanes_supported; ++i) { in dsi_enter_ulps()
3158 if (dsi->lanes[i].function == DSI_LANE_UNUSED) in dsi_enter_ulps()
3162 /* Assert TxRequestEsc for data lanes and TxUlpsClk for clk lane */ in dsi_enter_ulps()
3172 r = -EIO; in dsi_enter_ulps()
3189 dsi->ulps_enabled = true; in dsi_enter_ulps()
3312 if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { in dsi_config_vp_num_line_buffers()
3313 int bpp = dsi_get_pixel_size(dsi->pix_fmt); in dsi_config_vp_num_line_buffers()
3314 struct omap_video_timings *timings = &dsi->timings; in dsi_config_vp_num_line_buffers()
3319 if (dsi->line_buffer_size <= timings->x_res * bpp / 8) in dsi_config_vp_num_line_buffers()
3338 if (dsi->vm_timings.trans_mode == OMAP_DSS_DSI_PULSE_MODE) in dsi_config_vp_sync_events()
3357 int blanking_mode = dsi->vm_timings.blanking_mode; in dsi_config_blanking_modes()
3358 int hfp_blanking_mode = dsi->vm_timings.hfp_blanking_mode; in dsi_config_blanking_modes()
3359 int hbp_blanking_mode = dsi->vm_timings.hbp_blanking_mode; in dsi_config_blanking_modes()
3360 int hsa_blanking_mode = dsi->vm_timings.hsa_blanking_mode; in dsi_config_blanking_modes()
3404 return blank > transition ? blank - transition : 0; in dsi_compute_interleave_hs()
3427 tlp_avail = thsbyte_clk * (blank - trans_lp); in dsi_compute_interleave_lp()
3431 lp_inter = ((tlp_avail - 8 * thsbyte_clk - 5 * tdsi_fclk) / ttxclkesc - in dsi_compute_interleave_lp()
3446 struct omap_video_timings *timings = &dsi->timings; in dsi_config_cmd_mode_interleaving()
3447 int bpp = dsi_get_pixel_size(dsi->pix_fmt); in dsi_config_cmd_mode_interleaving()
3448 int ndl = dsi->num_lanes_used - 1; in dsi_config_cmd_mode_interleaving()
3449 int dsi_fclk_hsdiv = dsi->user_dsi_cinfo.mX[HSDIV_DSI] + 1; in dsi_config_cmd_mode_interleaving()
3487 width_bytes = DIV_ROUND_UP(timings->x_res * bpp, 8); in dsi_config_cmd_mode_interleaving()
3576 switch (dsi_get_pixel_size(dsi->pix_fmt)) { in dsi_proto_config()
3588 return -EINVAL; in dsi_proto_config()
3610 if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { in dsi_proto_config()
3634 int ndl = dsi->num_lanes_used - 1; in dsi_proto_timings()
3640 ths_zero = ths_prepare_ths_zero - ths_prepare; in dsi_proto_timings()
3687 if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { in dsi_proto_timings()
3689 int hsa = dsi->vm_timings.hsa; in dsi_proto_timings()
3690 int hfp = dsi->vm_timings.hfp; in dsi_proto_timings()
3691 int hbp = dsi->vm_timings.hbp; in dsi_proto_timings()
3692 int vsa = dsi->vm_timings.vsa; in dsi_proto_timings()
3693 int vfp = dsi->vm_timings.vfp; in dsi_proto_timings()
3694 int vbp = dsi->vm_timings.vbp; in dsi_proto_timings()
3695 int window_sync = dsi->vm_timings.window_sync; in dsi_proto_timings()
3697 struct omap_video_timings *timings = &dsi->timings; in dsi_proto_timings()
3698 int bpp = dsi_get_pixel_size(dsi->pix_fmt); in dsi_proto_timings()
3701 hsync_end = dsi->vm_timings.trans_mode == OMAP_DSS_DSI_PULSE_MODE; in dsi_proto_timings()
3705 width_bytes = DIV_ROUND_UP(timings->x_res * bpp, 8); in dsi_proto_timings()
3714 vsa, timings->y_res); in dsi_proto_timings()
3730 r = FLD_MOD(r, timings->y_res, 14, 0); /* VACT */ in dsi_proto_timings()
3755 num_pins = pin_cfg->num_pins; in dsi_configure_pins()
3756 pins = pin_cfg->pins; in dsi_configure_pins()
3758 if (num_pins < 4 || num_pins > dsi->num_lanes_supported * 2 in dsi_configure_pins()
3760 return -EINVAL; in dsi_configure_pins()
3774 if (dx < 0 || dx >= dsi->num_lanes_supported * 2) in dsi_configure_pins()
3775 return -EINVAL; in dsi_configure_pins()
3777 if (dy < 0 || dy >= dsi->num_lanes_supported * 2) in dsi_configure_pins()
3778 return -EINVAL; in dsi_configure_pins()
3781 if (dy != dx - 1) in dsi_configure_pins()
3782 return -EINVAL; in dsi_configure_pins()
3786 return -EINVAL; in dsi_configure_pins()
3797 memcpy(dsi->lanes, lanes, sizeof(dsi->lanes)); in dsi_configure_pins()
3798 dsi->num_lanes_used = num_lanes; in dsi_configure_pins()
3807 struct omap_overlay_manager *mgr = dsi->output.manager; in dsi_enable_video_output() local
3808 int bpp = dsi_get_pixel_size(dsi->pix_fmt); in dsi_enable_video_output()
3809 struct omap_dss_device *out = &dsi->output; in dsi_enable_video_output()
3814 if (out->manager == NULL) { in dsi_enable_video_output()
3816 return -ENODEV; in dsi_enable_video_output()
3819 r = dsi_display_init_dispc(dsidev, mgr); in dsi_enable_video_output()
3823 if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { in dsi_enable_video_output()
3824 switch (dsi->pix_fmt) { in dsi_enable_video_output()
3838 r = -EINVAL; in dsi_enable_video_output()
3848 word_count = DIV_ROUND_UP(dsi->timings.x_res * bpp, 8); in dsi_enable_video_output()
3857 r = dss_mgr_enable(mgr); in dsi_enable_video_output()
3864 if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { in dsi_enable_video_output()
3869 dsi_display_uninit_dispc(dsidev, mgr); in dsi_enable_video_output()
3878 struct omap_overlay_manager *mgr = dsi->output.manager; in dsi_disable_video_output() local
3880 if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { in dsi_disable_video_output()
3891 dss_mgr_disable(mgr); in dsi_disable_video_output()
3893 dsi_display_uninit_dispc(dsidev, mgr); in dsi_disable_video_output()
3899 struct omap_overlay_manager *mgr = dsi->output.manager; in dsi_update_screen_dispc() local
3908 const unsigned channel = dsi->update_channel; in dsi_update_screen_dispc()
3909 const unsigned line_buf_size = dsi->line_buffer_size; in dsi_update_screen_dispc()
3910 u16 w = dsi->timings.x_res; in dsi_update_screen_dispc()
3911 u16 h = dsi->timings.y_res; in dsi_update_screen_dispc()
3917 bytespp = dsi_get_pixel_size(dsi->pix_fmt) / 8; in dsi_update_screen_dispc()
3941 if (dsi->te_enabled) in dsi_update_screen_dispc()
3947 /* We put SIDLEMODE to no-idle for the duration of the transfer, in dsi_update_screen_dispc()
3957 r = schedule_delayed_work(&dsi->framedone_timeout_work, in dsi_update_screen_dispc()
3961 dss_mgr_set_timings(mgr, &dsi->timings); in dsi_update_screen_dispc()
3963 dss_mgr_start_update(mgr); in dsi_update_screen_dispc()
3965 if (dsi->te_enabled) { in dsi_update_screen_dispc()
3973 mod_timer(&dsi->te_timer, jiffies + msecs_to_jiffies(250)); in dsi_update_screen_dispc()
3989 /* SIDLEMODE back to smart-idle */ in dsi_handle_framedone()
3992 if (dsi->te_enabled) { in dsi_handle_framedone()
3997 dsi->framedone_callback(error, dsi->framedone_data); in dsi_handle_framedone()
4016 dsi_handle_framedone(dsi->pdev, -ETIMEDOUT); in dsi_framedone_timeout_work_callback()
4029 cancel_delayed_work(&dsi->framedone_timeout_work); in dsi_framedone_irq_callback()
4042 dsi->update_channel = channel; in dsi_update()
4044 dsi->framedone_callback = callback; in dsi_update()
4045 dsi->framedone_data = data; in dsi_update()
4048 dsi->update_bytes = dsi->timings.x_res * dsi->timings.y_res * in dsi_update()
4049 dsi_get_pixel_size(dsi->pix_fmt) / 8; in dsi_update()
4067 dispc_cinfo.lck_div = dsi->user_dispc_cinfo.lck_div; in dsi_configure_dispc_clocks()
4068 dispc_cinfo.pck_div = dsi->user_dispc_cinfo.pck_div; in dsi_configure_dispc_clocks()
4076 dsi->mgr_config.clock_info = dispc_cinfo; in dsi_configure_dispc_clocks()
4082 struct omap_overlay_manager *mgr) in dsi_display_init_dispc() argument
4087 dss_select_lcd_clk_source(mgr->id, dsi->module_id == 0 ? in dsi_display_init_dispc()
4091 if (dsi->mode == OMAP_DSS_DSI_CMD_MODE) { in dsi_display_init_dispc()
4092 r = dss_mgr_register_framedone_handler(mgr, in dsi_display_init_dispc()
4099 dsi->mgr_config.stallmode = true; in dsi_display_init_dispc()
4100 dsi->mgr_config.fifohandcheck = true; in dsi_display_init_dispc()
4102 dsi->mgr_config.stallmode = false; in dsi_display_init_dispc()
4103 dsi->mgr_config.fifohandcheck = false; in dsi_display_init_dispc()
4110 dsi->timings.interlace = false; in dsi_display_init_dispc()
4111 dsi->timings.hsync_level = OMAPDSS_SIG_ACTIVE_HIGH; in dsi_display_init_dispc()
4112 dsi->timings.vsync_level = OMAPDSS_SIG_ACTIVE_HIGH; in dsi_display_init_dispc()
4113 dsi->timings.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE; in dsi_display_init_dispc()
4114 dsi->timings.de_level = OMAPDSS_SIG_ACTIVE_HIGH; in dsi_display_init_dispc()
4115 dsi->timings.sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE; in dsi_display_init_dispc()
4117 dss_mgr_set_timings(mgr, &dsi->timings); in dsi_display_init_dispc()
4123 dsi->mgr_config.io_pad_mode = DSS_IO_PAD_MODE_BYPASS; in dsi_display_init_dispc()
4124 dsi->mgr_config.video_port_width = in dsi_display_init_dispc()
4125 dsi_get_pixel_size(dsi->pix_fmt); in dsi_display_init_dispc()
4126 dsi->mgr_config.lcden_sig_polarity = 0; in dsi_display_init_dispc()
4128 dss_mgr_set_lcd_config(mgr, &dsi->mgr_config); in dsi_display_init_dispc()
4132 if (dsi->mode == OMAP_DSS_DSI_CMD_MODE) in dsi_display_init_dispc()
4133 dss_mgr_unregister_framedone_handler(mgr, in dsi_display_init_dispc()
4136 dss_select_lcd_clk_source(mgr->id, OMAP_DSS_CLK_SRC_FCK); in dsi_display_init_dispc()
4141 struct omap_overlay_manager *mgr) in dsi_display_uninit_dispc() argument
4145 if (dsi->mode == OMAP_DSS_DSI_CMD_MODE) in dsi_display_uninit_dispc()
4146 dss_mgr_unregister_framedone_handler(mgr, in dsi_display_uninit_dispc()
4149 dss_select_lcd_clk_source(mgr->id, OMAP_DSS_CLK_SRC_FCK); in dsi_display_uninit_dispc()
4158 cinfo = dsi->user_dsi_cinfo; in dsi_configure_dsi_clocks()
4160 r = dss_pll_set_config(&dsi->pll, &cinfo); in dsi_configure_dsi_clocks()
4174 r = dss_pll_enable(&dsi->pll); in dsi_display_init_dsi()
4182 dss_select_dsi_clk_source(dsi->module_id, dsi->module_id == 0 ? in dsi_display_init_dsi()
4216 dss_select_dsi_clk_source(dsi->module_id, OMAP_DSS_CLK_SRC_FCK); in dsi_display_init_dsi()
4218 dss_pll_disable(&dsi->pll); in dsi_display_init_dsi()
4228 if (enter_ulps && !dsi->ulps_enabled) in dsi_display_uninit_dsi()
4238 dss_select_dsi_clk_source(dsi->module_id, OMAP_DSS_CLK_SRC_FCK); in dsi_display_uninit_dsi()
4253 mutex_lock(&dsi->lock); in dsi_display_enable()
4265 mutex_unlock(&dsi->lock); in dsi_display_enable()
4272 mutex_unlock(&dsi->lock); in dsi_display_enable()
4287 mutex_lock(&dsi->lock); in dsi_display_disable()
4298 mutex_unlock(&dsi->lock); in dsi_display_disable()
4306 dsi->te_enabled = enable; in dsi_enable_te()
4314 unsigned long byteclk = t->hsclk / 4; in print_dsi_vm()
4317 wc = DIV_ROUND_UP(t->hact * t->bitspp, 8); in print_dsi_vm()
4318 pps = DIV_ROUND_UP(wc + 6, t->ndl); /* pixel packet size */ in print_dsi_vm()
4319 bl = t->hss + t->hsa + t->hse + t->hbp + t->hfp; in print_dsi_vm()
4328 t->hss, t->hsa, t->hse, t->hbp, pps, t->hfp, in print_dsi_vm()
4330 TO_DSI_T(t->hss), in print_dsi_vm()
4331 TO_DSI_T(t->hsa), in print_dsi_vm()
4332 TO_DSI_T(t->hse), in print_dsi_vm()
4333 TO_DSI_T(t->hbp), in print_dsi_vm()
4335 TO_DSI_T(t->hfp), in print_dsi_vm()
4346 unsigned long pck = t->pixelclock; in print_dispc_vm()
4349 hact = t->x_res; in print_dispc_vm()
4350 bl = t->hsw + t->hbp + t->hfp; in print_dispc_vm()
4359 t->hsw, t->hbp, hact, t->hfp, in print_dispc_vm()
4361 TO_DISPC_T(t->hsw), in print_dispc_vm()
4362 TO_DISPC_T(t->hbp), in print_dispc_vm()
4364 TO_DISPC_T(t->hfp), in print_dispc_vm()
4376 unsigned long byteclk = t->hsclk / 4; in print_dsi_dispc_vm()
4381 dsi_tput = (u64)byteclk * t->ndl * 8; in print_dsi_dispc_vm()
4382 pck = (u32)div64_u64(dsi_tput, t->bitspp); in print_dsi_dispc_vm()
4383 dsi_hact = DIV_ROUND_UP(DIV_ROUND_UP(t->hact * t->bitspp, 8) + 6, t->ndl); in print_dsi_dispc_vm()
4384 dsi_htot = t->hss + t->hsa + t->hse + t->hbp + dsi_hact + t->hfp; in print_dsi_dispc_vm()
4387 vm.hsw = div64_u64((u64)(t->hsa + t->hse) * pck, byteclk); in print_dsi_dispc_vm()
4388 vm.hbp = div64_u64((u64)t->hbp * pck, byteclk); in print_dsi_dispc_vm()
4389 vm.hfp = div64_u64((u64)t->hfp * pck, byteclk); in print_dsi_dispc_vm()
4390 vm.x_res = t->hact; in print_dsi_dispc_vm()
4400 struct omap_video_timings *t = &ctx->dispc_vm; in dsi_cm_calc_dispc_cb()
4402 ctx->dispc_cinfo.lck_div = lckd; in dsi_cm_calc_dispc_cb()
4403 ctx->dispc_cinfo.pck_div = pckd; in dsi_cm_calc_dispc_cb()
4404 ctx->dispc_cinfo.lck = lck; in dsi_cm_calc_dispc_cb()
4405 ctx->dispc_cinfo.pck = pck; in dsi_cm_calc_dispc_cb()
4407 *t = *ctx->config->timings; in dsi_cm_calc_dispc_cb()
4408 t->pixelclock = pck; in dsi_cm_calc_dispc_cb()
4409 t->x_res = ctx->config->timings->x_res; in dsi_cm_calc_dispc_cb()
4410 t->y_res = ctx->config->timings->y_res; in dsi_cm_calc_dispc_cb()
4411 t->hsw = t->hfp = t->hbp = t->vsw = 1; in dsi_cm_calc_dispc_cb()
4412 t->vfp = t->vbp = 0; in dsi_cm_calc_dispc_cb()
4422 ctx->dsi_cinfo.mX[HSDIV_DISPC] = m_dispc; in dsi_cm_calc_hsdiv_cb()
4423 ctx->dsi_cinfo.clkout[HSDIV_DISPC] = dispc; in dsi_cm_calc_hsdiv_cb()
4425 return dispc_div_calc(dispc, ctx->req_pck_min, ctx->req_pck_max, in dsi_cm_calc_hsdiv_cb()
4434 ctx->dsi_cinfo.n = n; in dsi_cm_calc_pll_cb()
4435 ctx->dsi_cinfo.m = m; in dsi_cm_calc_pll_cb()
4436 ctx->dsi_cinfo.fint = fint; in dsi_cm_calc_pll_cb()
4437 ctx->dsi_cinfo.clkdco = clkdco; in dsi_cm_calc_pll_cb()
4439 return dss_pll_hsdiv_calc(ctx->pll, clkdco, ctx->req_pck_min, in dsi_cm_calc_pll_cb()
4453 clkin = clk_get_rate(dsi->pll.clkin); in dsi_cm_calc()
4454 bitspp = dsi_get_pixel_size(cfg->pixel_format); in dsi_cm_calc()
4455 ndl = dsi->num_lanes_used - 1; in dsi_cm_calc()
4463 pck = cfg->timings->pixelclock; in dsi_cm_calc()
4468 ctx->dsidev = dsi->pdev; in dsi_cm_calc()
4469 ctx->pll = &dsi->pll; in dsi_cm_calc()
4470 ctx->config = cfg; in dsi_cm_calc()
4471 ctx->req_pck_min = pck; in dsi_cm_calc()
4472 ctx->req_pck_nom = pck; in dsi_cm_calc()
4473 ctx->req_pck_max = pck * 3 / 2; in dsi_cm_calc()
4475 pll_min = max(cfg->hs_clk_min * 4, txbyteclk * 4 * 4); in dsi_cm_calc()
4476 pll_max = cfg->hs_clk_max * 4; in dsi_cm_calc()
4478 return dss_pll_calc(ctx->pll, clkin, in dsi_cm_calc()
4485 struct dsi_data *dsi = dsi_get_dsidrv_data(ctx->dsidev); in dsi_vm_calc_blanking()
4486 const struct omap_dss_dsi_config *cfg = ctx->config; in dsi_vm_calc_blanking()
4487 int bitspp = dsi_get_pixel_size(cfg->pixel_format); in dsi_vm_calc_blanking()
4488 int ndl = dsi->num_lanes_used - 1; in dsi_vm_calc_blanking()
4489 unsigned long hsclk = ctx->dsi_cinfo.clkdco / 4; in dsi_vm_calc_blanking()
4505 req_vm = cfg->timings; in dsi_vm_calc_blanking()
4506 req_pck_min = ctx->req_pck_min; in dsi_vm_calc_blanking()
4507 req_pck_max = ctx->req_pck_max; in dsi_vm_calc_blanking()
4508 req_pck_nom = ctx->req_pck_nom; in dsi_vm_calc_blanking()
4510 dispc_pck = ctx->dispc_cinfo.pck; in dsi_vm_calc_blanking()
4513 xres = req_vm->x_res; in dsi_vm_calc_blanking()
4515 panel_hbl = req_vm->hfp + req_vm->hbp + req_vm->hsw; in dsi_vm_calc_blanking()
4524 if (dsi->line_buffer_size < xres * bitspp / 8) { in dsi_vm_calc_blanking()
4536 /* When non-burst mode, DSI tput must be below max requirement. */ in dsi_vm_calc_blanking()
4537 if (cfg->trans_mode != OMAP_DSS_DSI_BURST_MODE) { in dsi_vm_calc_blanking()
4544 if (cfg->trans_mode == OMAP_DSS_DSI_PULSE_MODE) { in dsi_vm_calc_blanking()
4545 if (ndl == 3 && req_vm->hsw == 0) in dsi_vm_calc_blanking()
4561 dsi_hbl = dsi_htot - dsi_hact; in dsi_vm_calc_blanking()
4570 dispc_hbl = dispc_htot - xres; in dsi_vm_calc_blanking()
4574 dsi_vm = &ctx->dsi_vm; in dsi_vm_calc_blanking()
4577 dsi_vm->hsclk = hsclk; in dsi_vm_calc_blanking()
4579 dsi_vm->ndl = ndl; in dsi_vm_calc_blanking()
4580 dsi_vm->bitspp = bitspp; in dsi_vm_calc_blanking()
4582 if (cfg->trans_mode != OMAP_DSS_DSI_PULSE_MODE) { in dsi_vm_calc_blanking()
4584 } else if (ndl == 3 && req_vm->hsw == 0) { in dsi_vm_calc_blanking()
4587 hsa = div64_u64((u64)req_vm->hsw * byteclk, req_pck_nom); in dsi_vm_calc_blanking()
4588 hsa = max(hsa - hse, 1); in dsi_vm_calc_blanking()
4591 hbp = div64_u64((u64)req_vm->hbp * byteclk, req_pck_nom); in dsi_vm_calc_blanking()
4594 hfp = dsi_hbl - (hss + hsa + hse + hbp); in dsi_vm_calc_blanking()
4599 t = 1 - hfp; in dsi_vm_calc_blanking()
4600 hbp = max(hbp - t, 1); in dsi_vm_calc_blanking()
4601 hfp = dsi_hbl - (hss + hsa + hse + hbp); in dsi_vm_calc_blanking()
4605 t = 1 - hfp; in dsi_vm_calc_blanking()
4606 hsa = max(hsa - t, 1); in dsi_vm_calc_blanking()
4607 hfp = dsi_hbl - (hss + hsa + hse + hbp); in dsi_vm_calc_blanking()
4614 dsi_vm->hss = hss; in dsi_vm_calc_blanking()
4615 dsi_vm->hsa = hsa; in dsi_vm_calc_blanking()
4616 dsi_vm->hse = hse; in dsi_vm_calc_blanking()
4617 dsi_vm->hbp = hbp; in dsi_vm_calc_blanking()
4618 dsi_vm->hact = xres; in dsi_vm_calc_blanking()
4619 dsi_vm->hfp = hfp; in dsi_vm_calc_blanking()
4621 dsi_vm->vsa = req_vm->vsw; in dsi_vm_calc_blanking()
4622 dsi_vm->vbp = req_vm->vbp; in dsi_vm_calc_blanking()
4623 dsi_vm->vact = req_vm->y_res; in dsi_vm_calc_blanking()
4624 dsi_vm->vfp = req_vm->vfp; in dsi_vm_calc_blanking()
4626 dsi_vm->trans_mode = cfg->trans_mode; in dsi_vm_calc_blanking()
4628 dsi_vm->blanking_mode = 0; in dsi_vm_calc_blanking()
4629 dsi_vm->hsa_blanking_mode = 1; in dsi_vm_calc_blanking()
4630 dsi_vm->hfp_blanking_mode = 1; in dsi_vm_calc_blanking()
4631 dsi_vm->hbp_blanking_mode = 1; in dsi_vm_calc_blanking()
4633 dsi_vm->ddr_clk_always_on = cfg->ddr_clk_always_on; in dsi_vm_calc_blanking()
4634 dsi_vm->window_sync = 4; in dsi_vm_calc_blanking()
4638 dispc_vm = &ctx->dispc_vm; in dsi_vm_calc_blanking()
4640 dispc_vm->pixelclock = dispc_pck; in dsi_vm_calc_blanking()
4642 if (cfg->trans_mode == OMAP_DSS_DSI_PULSE_MODE) { in dsi_vm_calc_blanking()
4643 hsa = div64_u64((u64)req_vm->hsw * dispc_pck, in dsi_vm_calc_blanking()
4650 hbp = div64_u64((u64)req_vm->hbp * dispc_pck, req_pck_nom); in dsi_vm_calc_blanking()
4653 hfp = dispc_hbl - hsa - hbp; in dsi_vm_calc_blanking()
4658 t = 1 - hfp; in dsi_vm_calc_blanking()
4659 hbp = max(hbp - t, 1); in dsi_vm_calc_blanking()
4660 hfp = dispc_hbl - hsa - hbp; in dsi_vm_calc_blanking()
4664 t = 1 - hfp; in dsi_vm_calc_blanking()
4665 hsa = max(hsa - t, 1); in dsi_vm_calc_blanking()
4666 hfp = dispc_hbl - hsa - hbp; in dsi_vm_calc_blanking()
4673 dispc_vm->hfp = hfp; in dsi_vm_calc_blanking()
4674 dispc_vm->hsw = hsa; in dsi_vm_calc_blanking()
4675 dispc_vm->hbp = hbp; in dsi_vm_calc_blanking()
4686 ctx->dispc_cinfo.lck_div = lckd; in dsi_vm_calc_dispc_cb()
4687 ctx->dispc_cinfo.pck_div = pckd; in dsi_vm_calc_dispc_cb()
4688 ctx->dispc_cinfo.lck = lck; in dsi_vm_calc_dispc_cb()
4689 ctx->dispc_cinfo.pck = pck; in dsi_vm_calc_dispc_cb()
4695 print_dispc_vm("dispc", &ctx->dispc_vm); in dsi_vm_calc_dispc_cb()
4696 print_dsi_vm("dsi ", &ctx->dsi_vm); in dsi_vm_calc_dispc_cb()
4697 print_dispc_vm("req ", ctx->config->timings); in dsi_vm_calc_dispc_cb()
4698 print_dsi_dispc_vm("act ", &ctx->dsi_vm); in dsi_vm_calc_dispc_cb()
4710 ctx->dsi_cinfo.mX[HSDIV_DISPC] = m_dispc; in dsi_vm_calc_hsdiv_cb()
4711 ctx->dsi_cinfo.clkout[HSDIV_DISPC] = dispc; in dsi_vm_calc_hsdiv_cb()
4718 if (ctx->config->trans_mode == OMAP_DSS_DSI_BURST_MODE) in dsi_vm_calc_hsdiv_cb()
4719 pck_max = ctx->req_pck_max + 10000000; in dsi_vm_calc_hsdiv_cb()
4721 pck_max = ctx->req_pck_max; in dsi_vm_calc_hsdiv_cb()
4723 return dispc_div_calc(dispc, ctx->req_pck_min, pck_max, in dsi_vm_calc_hsdiv_cb()
4732 ctx->dsi_cinfo.n = n; in dsi_vm_calc_pll_cb()
4733 ctx->dsi_cinfo.m = m; in dsi_vm_calc_pll_cb()
4734 ctx->dsi_cinfo.fint = fint; in dsi_vm_calc_pll_cb()
4735 ctx->dsi_cinfo.clkdco = clkdco; in dsi_vm_calc_pll_cb()
4737 return dss_pll_hsdiv_calc(ctx->pll, clkdco, ctx->req_pck_min, in dsi_vm_calc_pll_cb()
4746 const struct omap_video_timings *t = cfg->timings; in dsi_vm_calc()
4750 int ndl = dsi->num_lanes_used - 1; in dsi_vm_calc()
4751 int bitspp = dsi_get_pixel_size(cfg->pixel_format); in dsi_vm_calc()
4754 clkin = clk_get_rate(dsi->pll.clkin); in dsi_vm_calc()
4757 ctx->dsidev = dsi->pdev; in dsi_vm_calc()
4758 ctx->pll = &dsi->pll; in dsi_vm_calc()
4759 ctx->config = cfg; in dsi_vm_calc()
4762 ctx->req_pck_min = t->pixelclock - 1000; in dsi_vm_calc()
4763 ctx->req_pck_nom = t->pixelclock; in dsi_vm_calc()
4764 ctx->req_pck_max = t->pixelclock + 1000; in dsi_vm_calc()
4766 byteclk_min = div64_u64((u64)ctx->req_pck_min * bitspp, ndl * 8); in dsi_vm_calc()
4767 pll_min = max(cfg->hs_clk_min * 4, byteclk_min * 4 * 4); in dsi_vm_calc()
4769 if (cfg->trans_mode == OMAP_DSS_DSI_BURST_MODE) { in dsi_vm_calc()
4770 pll_max = cfg->hs_clk_max * 4; in dsi_vm_calc()
4773 byteclk_max = div64_u64((u64)ctx->req_pck_max * bitspp, in dsi_vm_calc()
4779 return dss_pll_calc(ctx->pll, clkin, in dsi_vm_calc()
4793 mutex_lock(&dsi->lock); in dsi_set_config()
4795 dsi->pix_fmt = config->pixel_format; in dsi_set_config()
4796 dsi->mode = config->mode; in dsi_set_config()
4798 if (config->mode == OMAP_DSS_DSI_VIDEO_MODE) in dsi_set_config()
4805 r = -EINVAL; in dsi_set_config()
4812 config->lp_clk_min, config->lp_clk_max, &dsi->user_lp_cinfo); in dsi_set_config()
4818 dsi->user_dsi_cinfo = ctx.dsi_cinfo; in dsi_set_config()
4819 dsi->user_dispc_cinfo = ctx.dispc_cinfo; in dsi_set_config()
4821 dsi->timings = ctx.dispc_vm; in dsi_set_config()
4822 dsi->vm_timings = ctx.dsi_vm; in dsi_set_config()
4824 mutex_unlock(&dsi->lock); in dsi_set_config()
4828 mutex_unlock(&dsi->lock); in dsi_set_config()
4889 for (i = 0; i < ARRAY_SIZE(dsi->vc); i++) { in dsi_request_vc()
4890 if (!dsi->vc[i].dssdev) { in dsi_request_vc()
4891 dsi->vc[i].dssdev = dssdev; in dsi_request_vc()
4897 DSSERR("cannot get VC for display %s", dssdev->name); in dsi_request_vc()
4898 return -ENOSPC; in dsi_request_vc()
4908 return -EINVAL; in dsi_set_vc_id()
4913 return -EINVAL; in dsi_set_vc_id()
4916 if (dsi->vc[channel].dssdev != dssdev) { in dsi_set_vc_id()
4918 dssdev->name); in dsi_set_vc_id()
4919 return -EINVAL; in dsi_set_vc_id()
4922 dsi->vc[channel].vc_id = vc_id; in dsi_set_vc_id()
4933 dsi->vc[channel].dssdev == dssdev) { in dsi_release_vc()
4934 dsi->vc[channel].dssdev = NULL; in dsi_release_vc()
4935 dsi->vc[channel].vc_id = 0; in dsi_release_vc()
4943 struct clk *clk; in dsi_get_clocks() local
4945 clk = devm_clk_get(&dsidev->dev, "fck"); in dsi_get_clocks()
4946 if (IS_ERR(clk)) { in dsi_get_clocks()
4948 return PTR_ERR(clk); in dsi_get_clocks()
4951 dsi->dss_clk = clk; in dsi_get_clocks()
4960 struct omap_overlay_manager *mgr; in dsi_connect() local
4967 mgr = omap_dss_get_overlay_manager(dssdev->dispc_channel); in dsi_connect()
4968 if (!mgr) in dsi_connect()
4969 return -ENODEV; in dsi_connect()
4971 r = dss_mgr_connect(mgr, dssdev); in dsi_connect()
4978 dssdev->name); in dsi_connect()
4979 dss_mgr_disconnect(mgr, dssdev); in dsi_connect()
4989 WARN_ON(dst != dssdev->dst); in dsi_disconnect()
4991 if (dst != dssdev->dst) in dsi_disconnect()
4996 if (dssdev->manager) in dsi_disconnect()
4997 dss_mgr_disconnect(dssdev->manager, dssdev); in dsi_disconnect()
5042 struct omap_dss_device *out = &dsi->output; in dsi_init_output()
5044 out->dev = &dsidev->dev; in dsi_init_output()
5045 out->id = dsi->module_id == 0 ? in dsi_init_output()
5048 out->output_type = OMAP_DISPLAY_TYPE_DSI; in dsi_init_output()
5049 out->name = dsi->module_id == 0 ? "dsi.0" : "dsi.1"; in dsi_init_output()
5050 out->dispc_channel = dsi_get_channel(dsi->module_id); in dsi_init_output()
5051 out->ops.dsi = &dsi_ops; in dsi_init_output()
5052 out->owner = THIS_MODULE; in dsi_init_output()
5060 struct omap_dss_device *out = &dsi->output; in dsi_uninit_output()
5067 struct device_node *node = pdev->dev.of_node; in dsi_probe_of()
5082 dev_err(&pdev->dev, "failed to find lane data\n"); in dsi_probe_of()
5083 r = -EINVAL; in dsi_probe_of()
5090 num_pins > dsi->num_lanes_supported * 2) { in dsi_probe_of()
5091 dev_err(&pdev->dev, "bad number of lanes\n"); in dsi_probe_of()
5092 r = -EINVAL; in dsi_probe_of()
5098 dev_err(&pdev->dev, "failed to read lane data\n"); in dsi_probe_of()
5106 r = dsi_configure_pins(&dsi->output, &pin_cfg); in dsi_probe_of()
5108 dev_err(&pdev->dev, "failed to configure pins"); in dsi_probe_of()
5128 .n_max = (1 << 7) - 1,
5129 .m_max = (1 << 11) - 1,
5130 .mX_max = (1 << 4) - 1,
5153 .n_max = (1 << 8) - 1,
5154 .m_max = (1 << 12) - 1,
5155 .mX_max = (1 << 5) - 1,
5178 .n_max = (1 << 8) - 1,
5179 .m_max = (1 << 12) - 1,
5180 .mX_max = (1 << 5) - 1,
5205 struct dss_pll *pll = &dsi->pll; in dsi_init_pll_data()
5206 struct clk *clk; in dsi_init_pll_data() local
5209 clk = devm_clk_get(&dsidev->dev, "sys_clk"); in dsi_init_pll_data()
5210 if (IS_ERR(clk)) { in dsi_init_pll_data()
5212 return PTR_ERR(clk); in dsi_init_pll_data()
5215 pll->name = dsi->module_id == 0 ? "dsi0" : "dsi1"; in dsi_init_pll_data()
5216 pll->id = dsi->module_id == 0 ? DSS_PLL_DSI1 : DSS_PLL_DSI2; in dsi_init_pll_data()
5217 pll->clkin = clk; in dsi_init_pll_data()
5218 pll->base = dsi->pll_base; in dsi_init_pll_data()
5225 pll->hw = &dss_omap3_dsi_pll_hw; in dsi_init_pll_data()
5231 pll->hw = &dss_omap4_dsi_pll_hw; in dsi_init_pll_data()
5235 pll->hw = &dss_omap5_dsi_pll_hw; in dsi_init_pll_data()
5239 return -ENODEV; in dsi_init_pll_data()
5242 pll->ops = &dsi_pll_ops; in dsi_init_pll_data()
5262 dsi = devm_kzalloc(&dsidev->dev, sizeof(*dsi), GFP_KERNEL); in dsi_bind()
5264 return -ENOMEM; in dsi_bind()
5266 dsi->pdev = dsidev; in dsi_bind()
5269 spin_lock_init(&dsi->irq_lock); in dsi_bind()
5270 spin_lock_init(&dsi->errors_lock); in dsi_bind()
5271 dsi->errors = 0; in dsi_bind()
5274 spin_lock_init(&dsi->irq_stats_lock); in dsi_bind()
5275 dsi->irq_stats.last_reset = jiffies; in dsi_bind()
5278 mutex_init(&dsi->lock); in dsi_bind()
5279 sema_init(&dsi->bus_lock, 1); in dsi_bind()
5281 INIT_DEFERRABLE_WORK(&dsi->framedone_timeout_work, in dsi_bind()
5285 timer_setup(&dsi->te_timer, dsi_te_timeout, 0); in dsi_bind()
5293 return -EINVAL; in dsi_bind()
5296 temp_res.start = res->start; in dsi_bind()
5297 temp_res.end = temp_res.start + DSI_PROTO_SZ - 1; in dsi_bind()
5303 dsi->proto_base = devm_ioremap(&dsidev->dev, res->start, in dsi_bind()
5305 if (!dsi->proto_base) { in dsi_bind()
5307 return -ENOMEM; in dsi_bind()
5315 return -EINVAL; in dsi_bind()
5318 temp_res.start = res->start + DSI_PHY_OFFSET; in dsi_bind()
5319 temp_res.end = temp_res.start + DSI_PHY_SZ - 1; in dsi_bind()
5323 dsi->phy_base = devm_ioremap(&dsidev->dev, res->start, in dsi_bind()
5325 if (!dsi->phy_base) { in dsi_bind()
5327 return -ENOMEM; in dsi_bind()
5335 return -EINVAL; in dsi_bind()
5338 temp_res.start = res->start + DSI_PLL_OFFSET; in dsi_bind()
5339 temp_res.end = temp_res.start + DSI_PLL_SZ - 1; in dsi_bind()
5343 dsi->pll_base = devm_ioremap(&dsidev->dev, res->start, in dsi_bind()
5345 if (!dsi->pll_base) { in dsi_bind()
5347 return -ENOMEM; in dsi_bind()
5350 dsi->irq = platform_get_irq(dsi->pdev, 0); in dsi_bind()
5351 if (dsi->irq < 0) { in dsi_bind()
5353 return -ENODEV; in dsi_bind()
5356 r = devm_request_irq(&dsidev->dev, dsi->irq, omap_dsi_irq_handler, in dsi_bind()
5357 IRQF_SHARED, dev_name(&dsidev->dev), dsi->pdev); in dsi_bind()
5363 if (dsidev->dev.of_node) { in dsi_bind()
5367 match = of_match_node(dsi_of_match, dsidev->dev.of_node); in dsi_bind()
5370 return -ENODEV; in dsi_bind()
5373 d = match->data; in dsi_bind()
5375 while (d->address != 0 && d->address != dsi_mem->start) in dsi_bind()
5378 if (d->address == 0) { in dsi_bind()
5380 return -ENODEV; in dsi_bind()
5383 dsi->module_id = d->id; in dsi_bind()
5385 dsi->module_id = dsidev->id; in dsi_bind()
5389 for (i = 0; i < ARRAY_SIZE(dsi->vc); i++) { in dsi_bind()
5390 dsi->vc[i].source = DSI_VC_SOURCE_L4; in dsi_bind()
5391 dsi->vc[i].dssdev = NULL; in dsi_bind()
5392 dsi->vc[i].vc_id = 0; in dsi_bind()
5401 pm_runtime_enable(&dsidev->dev); in dsi_bind()
5408 dev_dbg(&dsidev->dev, "OMAP DSI rev %d.%d\n", in dsi_bind()
5415 dsi->num_lanes_supported = 1 + REG_GET(dsidev, DSI_GNQ, 11, 9); in dsi_bind()
5417 dsi->num_lanes_supported = 3; in dsi_bind()
5419 dsi->line_buffer_size = dsi_get_line_buf_size(dsidev); in dsi_bind()
5423 if (dsidev->dev.of_node) { in dsi_bind()
5430 r = of_platform_populate(dsidev->dev.of_node, NULL, NULL, in dsi_bind()
5431 &dsidev->dev); in dsi_bind()
5438 if (dsi->module_id == 0) in dsi_bind()
5440 else if (dsi->module_id == 1) in dsi_bind()
5444 if (dsi->module_id == 0) in dsi_bind()
5446 else if (dsi->module_id == 1) in dsi_bind()
5457 pm_runtime_disable(&dsidev->dev); in dsi_bind()
5466 of_platform_depopulate(&dsidev->dev); in dsi_unbind()
5468 WARN_ON(dsi->scp_clk_refcount > 0); in dsi_unbind()
5470 dss_pll_unregister(&dsi->pll); in dsi_unbind()
5474 pm_runtime_disable(&dsidev->dev); in dsi_unbind()
5476 if (dsi->vdds_dsi_reg != NULL && dsi->vdds_dsi_enabled) { in dsi_unbind()
5477 regulator_disable(dsi->vdds_dsi_reg); in dsi_unbind()
5478 dsi->vdds_dsi_enabled = false; in dsi_unbind()
5489 return component_add(&pdev->dev, &dsi_component_ops); in dsi_probe()
5494 component_del(&pdev->dev, &dsi_component_ops); in dsi_remove()
5503 dsi->is_enabled = false; in dsi_runtime_suspend()
5507 synchronize_irq(dsi->irq); in dsi_runtime_suspend()
5524 dsi->is_enabled = true; in dsi_runtime_resume()
5554 { .compatible = "ti,omap3-dsi", .data = dsi_of_data_omap3, },
5555 { .compatible = "ti,omap4-dsi", .data = dsi_of_data_omap4, },
5556 { .compatible = "ti,omap5-dsi", .data = dsi_of_data_omap5, },