Lines Matching +full:0 +full:xf3
44 S1SA = 0, /* 0x00 */
45 S2SA = 1, /* 0x04 */
46 SP = 2, /* 0x08 */
47 DSA = 3, /* 0x0C */
48 CNT = 4, /* 0x10 */
49 DP_OCTL = 5, /* 0x14 */
50 CLR = 6, /* 0x18 */
51 BI = 8, /* 0x20 */
52 MBC = 9, /* 0x24 */
53 BLTCTL = 10, /* 0x28 */
56 HES = 12, /* 0x30 */
57 HEB = 13, /* 0x34 */
58 HSB = 14, /* 0x38 */
59 HT = 15, /* 0x3C */
60 VES = 16, /* 0x40 */
61 VEB = 17, /* 0x44 */
62 VSB = 18, /* 0x48 */
63 VT = 19, /* 0x4C */
64 HCIV = 20, /* 0x50 */
65 VCIV = 21, /* 0x54 */
66 TCDR = 22, /* 0x58 */
67 VIL = 23, /* 0x5C */
68 STGCTL = 24, /* 0x60 */
71 SSR = 25, /* 0x64 */
72 HRIR = 26, /* 0x68 */
73 SPR = 27, /* 0x6C */
74 CMR = 28, /* 0x70 */
75 SRGCTL = 29, /* 0x74 */
78 RRCIV = 30, /* 0x78 */
79 RRSC = 31, /* 0x7C */
80 RRCR = 34, /* 0x88 */
83 GIOE = 32, /* 0x80 */
84 GIO = 33, /* 0x84 */
85 SCR = 35, /* 0x8C */
86 SSTATUS = 36, /* 0x90 */
87 PRC = 37, /* 0x94 */
89 #if 0
91 DVID = 0x00000000L,
92 SC = 0x00000004L,
93 CCR = 0x00000008L,
94 OG = 0x0000000CL,
95 BARM = 0x00000010L,
96 BARER = 0x00000030L,
102 PADDRW = 0x00,
103 PDATA = 0x04,
104 PPMASK = 0x08,
105 PADDRR = 0x0c,
106 PIDXLO = 0x10,
107 PIDXHI = 0x14,
108 PIDXDATA= 0x18,
109 PIDXCTL = 0x1c
114 CLKCTL = 0x02, /* (0x01) Miscellaneous Clock Control */
115 SYNCCTL = 0x03, /* (0x00) Sync Control */
116 HSYNCPOS = 0x04, /* (0x00) Horizontal Sync Position */
117 PWRMNGMT = 0x05, /* (0x00) Power Management */
118 DACOP = 0x06, /* (0x02) DAC Operation */
119 PALETCTL = 0x07, /* (0x00) Palette Control */
120 SYSCLKCTL = 0x08, /* (0x01) System Clock Control */
121 PIXFMT = 0x0a, /* () Pixel Format [bpp >> 3 + 2] */
122 BPP8 = 0x0b, /* () 8 Bits/Pixel Control */
123 BPP16 = 0x0c, /* () 16 Bits/Pixel Control [bit 1=1 for 565] */
124 BPP24 = 0x0d, /* () 24 Bits/Pixel Control */
125 BPP32 = 0x0e, /* () 32 Bits/Pixel Control */
126 PIXCTL1 = 0x10, /* (0x05) Pixel PLL Control 1 */
127 PIXCTL2 = 0x11, /* (0x00) Pixel PLL Control 2 */
128 SYSCLKN = 0x15, /* () System Clock N (System PLL Reference Divider) */
129 SYSCLKM = 0x16, /* () System Clock M (System PLL VCO Divider) */
130 SYSCLKP = 0x17, /* () System Clock P */
131 SYSCLKC = 0x18, /* () System Clock C */
136 PIXM0 = 0x20, /* () Pixel M 0 */
137 PIXN0 = 0x21, /* () Pixel N 0 */
138 PIXP0 = 0x22, /* () Pixel P 0 */
139 PIXC0 = 0x23, /* () Pixel C 0 */
140 CURSCTL = 0x30, /* (0x00) Cursor Control */
141 CURSXLO = 0x31, /* () Cursor X position, low 8 bits */
142 CURSXHI = 0x32, /* () Cursor X position, high 8 bits */
143 CURSYLO = 0x33, /* () Cursor Y position, low 8 bits */
144 CURSYHI = 0x34, /* () Cursor Y position, high 8 bits */
145 CURSHOTX = 0x35, /* () Cursor Hot Spot X */
146 CURSHOTY = 0x36, /* () Cursor Hot Spot Y */
147 CURSACCTL = 0x37, /* () Advanced Cursor Control Enable */
148 CURSACATTR = 0x38, /* () Advanced Cursor Attribute */
149 CURS1R = 0x40, /* () Cursor 1 Red */
150 CURS1G = 0x41, /* () Cursor 1 Green */
151 CURS1B = 0x42, /* () Cursor 1 Blue */
152 CURS2R = 0x43, /* () Cursor 2 Red */
153 CURS2G = 0x44, /* () Cursor 2 Green */
154 CURS2B = 0x45, /* () Cursor 2 Blue */
155 CURS3R = 0x46, /* () Cursor 3 Red */
156 CURS3G = 0x47, /* () Cursor 3 Green */
157 CURS3B = 0x48, /* () Cursor 3 Blue */
158 BORDR = 0x60, /* () Border Color Red */
159 BORDG = 0x61, /* () Border Color Green */
160 BORDB = 0x62, /* () Border Color Blue */
161 MISCTL1 = 0x70, /* (0x00) Miscellaneous Control 1 */
162 MISCTL2 = 0x71, /* (0x00) Miscellaneous Control 2 */
163 MISCTL3 = 0x72, /* (0x00) Miscellaneous Control 3 */
164 KEYCTL = 0x78 /* (0x00) Key Control/DB Operation */
169 TVPADDRW = 0x00, /* 0 Palette/Cursor RAM Write Address/Index */
170 TVPPDATA = 0x04, /* 1 Palette Data RAM Data */
171 TVPPMASK = 0x08, /* 2 Pixel Read-Mask */
172 TVPPADRR = 0x0c, /* 3 Palette/Cursor RAM Read Address */
173 TVPCADRW = 0x10, /* 4 Cursor/Overscan Color Write Address */
174 TVPCDATA = 0x14, /* 5 Cursor/Overscan Color Data */
176 TVPCADRR = 0x1c, /* 7 Cursor/Overscan Color Read Address */
178 TVPDCCTL = 0x24, /* 9 Direct Cursor Control */
179 TVPIDATA = 0x28, /* 10 Index Data */
180 TVPCRDAT = 0x2c, /* 11 Cursor RAM Data */
181 TVPCXPOL = 0x30, /* 12 Cursor-Position X LSB */
182 TVPCXPOH = 0x34, /* 13 Cursor-Position X MSB */
183 TVPCYPOL = 0x38, /* 14 Cursor-Position Y LSB */
184 TVPCYPOH = 0x3c, /* 15 Cursor-Position Y MSB */
189 TVPIRREV = 0x01, /* Silicon Revision [RO] */
190 TVPIRICC = 0x06, /* Indirect Cursor Control (0x00) */
191 TVPIRBRC = 0x07, /* Byte Router Control (0xe4) */
192 TVPIRLAC = 0x0f, /* Latch Control (0x06) */
193 TVPIRTCC = 0x18, /* True Color Control (0x80) */
194 TVPIRMXC = 0x19, /* Multiplex Control (0x98) */
195 TVPIRCLS = 0x1a, /* Clock Selection (0x07) */
196 TVPIRPPG = 0x1c, /* Palette Page (0x00) */
197 TVPIRGEC = 0x1d, /* General Control (0x00) */
198 TVPIRMIC = 0x1e, /* Miscellaneous Control (0x00) */
199 TVPIRPLA = 0x2c, /* PLL Address */
200 TVPIRPPD = 0x2d, /* Pixel Clock PLL Data */
201 TVPIRMPD = 0x2e, /* Memory Clock PLL Data */
202 TVPIRLPD = 0x2f, /* Loop Clock PLL Data */
203 TVPIRCKL = 0x30, /* Color-Key Overlay Low */
204 TVPIRCKH = 0x31, /* Color-Key Overlay High */
205 TVPIRCRL = 0x32, /* Color-Key Red Low */
206 TVPIRCRH = 0x33, /* Color-Key Red High */
207 TVPIRCGL = 0x34, /* Color-Key Green Low */
208 TVPIRCGH = 0x35, /* Color-Key Green High */
209 TVPIRCBL = 0x36, /* Color-Key Blue Low */
210 TVPIRCBH = 0x37, /* Color-Key Blue High */
211 TVPIRCKC = 0x38, /* Color-Key Control (0x00) */
212 TVPIRMLC = 0x39, /* MCLK/Loop Clock Control (0x18) */
213 TVPIRSEN = 0x3a, /* Sense Test (0x00) */
214 TVPIRTMD = 0x3b, /* Test Mode Data */
215 TVPIRRML = 0x3c, /* CRC Remainder LSB [RO] */
216 TVPIRRMM = 0x3d, /* CRC Remainder MSB [RO] */
217 TVPIRRMS = 0x3e, /* CRC Bit Select [WO] */
218 TVPIRDID = 0x3f, /* Device ID [RO] (0x30) */
219 TVPIRRES = 0xff /* Software Reset [WO] */
227 { CLKCTL, 0x21 },
228 { SYNCCTL, 0x00 },
229 { HSYNCPOS, 0x00 },
230 { PWRMNGMT, 0x00 },
231 { DACOP, 0x02 },
232 { PALETCTL, 0x00 },
233 { SYSCLKCTL, 0x01 },
241 { BPP8, 0x00 },
242 { BPP16, 0x01 },
243 { BPP24, 0x00 },
244 { BPP32, 0x00 },
246 { PIXCTL1, 0x05 },
247 { PIXCTL2, 0x00 },
248 { SYSCLKN, 0x08 },
249 { SYSCLKM, 0x4f },
250 { SYSCLKP, 0x00 },
251 { SYSCLKC, 0x00 },
252 { CURSCTL, 0x00 },
253 { CURSACCTL, 0x01 },
254 { CURSACATTR, 0xa8 },
255 { CURS1R, 0xff },
256 { CURS1G, 0xff },
257 { CURS1B, 0xff },
258 { CURS2R, 0xff },
259 { CURS2G, 0xff },
260 { CURS2B, 0xff },
261 { CURS3R, 0xff },
262 { CURS3G, 0xff },
263 { CURS3B, 0xff },
264 { BORDR, 0xff },
265 { BORDG, 0xff },
266 { BORDB, 0xff },
267 { MISCTL1, 0x01 },
268 { MISCTL2, 0x45 },
269 { MISCTL3, 0x00 },
270 { KEYCTL, 0x00 }
274 { TVPIRICC, 0x00 },
275 { TVPIRBRC, 0xe4 },
276 { TVPIRLAC, 0x06 },
277 { TVPIRTCC, 0x80 },
278 { TVPIRMXC, 0x4d },
279 { TVPIRCLS, 0x05 },
280 { TVPIRPPG, 0x00 },
281 { TVPIRGEC, 0x00 },
282 { TVPIRMIC, 0x08 },
283 { TVPIRCKL, 0xff },
284 { TVPIRCKH, 0xff },
285 { TVPIRCRL, 0xff },
286 { TVPIRCRH, 0xff },
287 { TVPIRCGL, 0xff },
288 { TVPIRCGH, 0xff },
289 { TVPIRCBL, 0xff },
290 { TVPIRCBH, 0xff },
291 { TVPIRCKC, 0x00 },
292 { TVPIRPLA, 0x00 },
293 { TVPIRPPD, 0xc0 },
294 { TVPIRPPD, 0xd5 },
295 { TVPIRPPD, 0xea },
296 { TVPIRPLA, 0x00 },
297 { TVPIRMPD, 0xb9 },
298 { TVPIRMPD, 0x3a },
299 { TVPIRMPD, 0xb1 },
300 { TVPIRPLA, 0x00 },
301 { TVPIRLPD, 0xc1 },
302 { TVPIRLPD, 0x3d },
303 { TVPIRLPD, 0xf3 },
311 __u8 mlc[3]; /* Memory Loop Config 0x39 */
325 IBM = 0,
333 static int inverse = 0;
334 static char fontname[40] __initdata = { 0 };
341 0x0002, 0x0006, 0x0026, 0x0028, 0x0003, 0x0016, 0x0196, 0x0197, 0x0196,
342 0xec, 0x2a, 0xf3,
343 { 0x3c, 0x3b, 0x39 }, { 0xf3, 0xf3, 0xf3 }
348 0x0004, 0x0009, 0x0031, 0x0036, 0x0003, 0x002a, 0x020a, 0x020d, 0x020a,
349 0xef, 0x2e, 0xb2,
350 { 0x39, 0x39, 0x38 }, { 0xf3, 0xf3, 0xf3 }
355 0x0005, 0x000e, 0x0040, 0x0042, 0x0003, 0x018, 0x270, 0x271, 0x270,
356 0xf6, 0x2e, 0xf2,
357 { 0x3a, 0x39, 0x38 }, { 0xf3, 0xf3, 0xf3 }
362 0x0004, 0x0011, 0x0045, 0x0048, 0x0003, 0x002a, 0x029a, 0x029b, 0x0000,
363 0xfe, 0x3e, 0xf1,
364 { 0x39, 0x38, 0x38 }, { 0xf3, 0xf3, 0xf2 }
369 0x0006, 0x0210, 0x0250, 0x0053, 0x1003, 0x0021, 0x0321, 0x0324, 0x0000,
370 0xfc, 0x3a, 0xf1,
371 { 0x39, 0x38, 0x38 }, { 0xf3, 0xf3, 0xf2 }
376 0x0009, 0x0011, 0x059, 0x5b, 0x0003, 0x0031, 0x0397, 0x039a, 0x0000,
377 0xfd, 0x3a, 0xf1,
378 { 0x39, 0x38, 0x38 }, { 0xf3, 0xf3, 0xf2 }
383 0x0009, 0x0016, 0x0066, 0x0069, 0x0003, 0x0027, 0x03e7, 0x03e8, 0x03e7,
384 0xf7, 0x36, 0xf0,
385 { 0x38, 0x38, 0x38 }, { 0xf3, 0xf2, 0xf1 }
390 0x0009, 0x0018, 0x0068, 0x006a, 0x0003, 0x0029, 0x0429, 0x042a, 0x0000,
391 0xf0, 0x2d, 0xf0,
392 { 0x38, 0x38, 0x38 }, { 0xf3, 0xf2, 0xf1 }
439 clk_m = clk_n = 0; in setclkMHz()
440 stage = spilled = 0; in setclkMHz()
443 case 0: in setclkMHz()
457 stage = 0; in setclkMHz()
463 par->init.pclk_p = 0; in setclkMHz()
474 hes = 0x0008; heb = 0x0012; veb = 0x002a; htp = 10; vtp = 2; in compute_imstt_regvals_ibm()
478 hes = 0x0005; heb = 0x0020; veb = 0x0028; htp = 8; vtp = 3; in compute_imstt_regvals_ibm()
482 hes = 0x000a; heb = 0x001c; veb = 0x0020; htp = 8; vtp = 3; in compute_imstt_regvals_ibm()
486 hes = 0x0012; heb = 0x0022; veb = 0x0031; htp = 4; vtp = 3; in compute_imstt_regvals_ibm()
490 hes = 0x0012; heb = 0x002f; veb = 0x0029; htp = 4; vtp = 1; in compute_imstt_regvals_ibm()
494 hes = 0x0018; heb = 0x0040; veb = 0x002a; htp = 4; vtp = 3; in compute_imstt_regvals_ibm()
507 init->ves = 0x0003; in compute_imstt_regvals_ibm()
566 par->cmap_regs[PIDXHI] = 0; eieio(); in set_imstt_regvals_ibm()
574 par->cmap_regs[PIDXDATA] = 0x02; eieio(); in set_imstt_regvals_ibm()
590 tcc = 0x80; in set_imstt_regvals_tvp()
591 mxc = 0x4d; in set_imstt_regvals_tvp()
592 lckl_n = 0xc1; in set_imstt_regvals_tvp()
593 mlc = init->mlc[0]; in set_imstt_regvals_tvp()
594 lckl_p = init->lckl_p[0]; in set_imstt_regvals_tvp()
597 tcc = 0x44; in set_imstt_regvals_tvp()
598 mxc = 0x55; in set_imstt_regvals_tvp()
599 lckl_n = 0xe1; in set_imstt_regvals_tvp()
604 tcc = 0x5e; in set_imstt_regvals_tvp()
605 mxc = 0x5d; in set_imstt_regvals_tvp()
606 lckl_n = 0xf1; in set_imstt_regvals_tvp()
611 tcc = 0x46; in set_imstt_regvals_tvp()
612 mxc = 0x5d; in set_imstt_regvals_tvp()
613 lckl_n = 0xf1; in set_imstt_regvals_tvp()
618 mic = 0x08; in set_imstt_regvals_tvp()
621 par->cmap_regs[TVPIDATA] = 0x00; eieio(); in set_imstt_regvals_tvp()
637 par->cmap_regs[TVPIDATA] = 0x00; eieio(); in set_imstt_regvals_tvp()
642 par->cmap_regs[TVPIDATA] = 0x15; eieio(); in set_imstt_regvals_tvp()
647 par->cmap_regs[TVPIDATA] = 0x2a; eieio(); in set_imstt_regvals_tvp()
671 * 8bpp 0 0 in set_imstt_regvals()
672 * 16bpp 0 1 in set_imstt_regvals()
678 ctl = 0x17b1; in set_imstt_regvals()
680 byteswap = 0x000; in set_imstt_regvals()
683 ctl = 0x17b3; in set_imstt_regvals()
685 byteswap = 0x100; in set_imstt_regvals()
688 ctl = 0x17b9; in set_imstt_regvals()
690 byteswap = 0x200; in set_imstt_regvals()
693 ctl = 0x17b5; in set_imstt_regvals()
695 byteswap = 0x300; in set_imstt_regvals()
699 ctl -= 0x30; in set_imstt_regvals()
714 write_reg_le32(par->dc_regs, RRSC, 0x980); in set_imstt_regvals()
715 write_reg_le32(par->dc_regs, RRCR, 0x11); in set_imstt_regvals()
718 write_reg_le32(par->dc_regs, HRIR, 0x0100); in set_imstt_regvals()
719 write_reg_le32(par->dc_regs, CMR, 0x00ff); in set_imstt_regvals()
720 write_reg_le32(par->dc_regs, SRGCTL, 0x0073); in set_imstt_regvals()
722 write_reg_le32(par->dc_regs, HRIR, 0x0200); in set_imstt_regvals()
723 write_reg_le32(par->dc_regs, CMR, 0x01ff); in set_imstt_regvals()
724 write_reg_le32(par->dc_regs, SRGCTL, 0x0003); in set_imstt_regvals()
728 case 0x200000: in set_imstt_regvals()
729 scr = 0x059d | byteswap; in set_imstt_regvals()
731 /* case 0x400000: in set_imstt_regvals()
732 case 0x800000: */ in set_imstt_regvals()
735 scr = 0x150dd | byteswap; in set_imstt_regvals()
757 par->cmap_regs[PIDXHI] = 0; eieio(); in set_555()
759 par->cmap_regs[PIDXDATA] = 0x01; eieio(); in set_555()
762 par->cmap_regs[TVPIDATA] = 0x44; eieio(); in set_555()
770 par->cmap_regs[PIDXHI] = 0; eieio(); in set_565()
772 par->cmap_regs[PIDXDATA] = 0x03; eieio(); in set_565()
775 par->cmap_regs[TVPIDATA] = 0x45; eieio(); in set_565()
795 var->red.offset = 0; in imsttfb_check_var()
797 var->green.offset = 0; in imsttfb_check_var()
799 var->blue.offset = 0; in imsttfb_check_var()
801 var->transp.offset = 0; in imsttfb_check_var()
802 var->transp.length = 0; in imsttfb_check_var()
811 var->blue.offset = 0; in imsttfb_check_var()
813 var->transp.offset = 0; in imsttfb_check_var()
814 var->transp.length = 0; in imsttfb_check_var()
821 var->blue.offset = 0; in imsttfb_check_var()
823 var->transp.offset = 0; in imsttfb_check_var()
824 var->transp.length = 0; in imsttfb_check_var()
831 var->blue.offset = 0; in imsttfb_check_var()
845 var->red.msb_right = 0; in imsttfb_check_var()
846 var->green.msb_right = 0; in imsttfb_check_var()
847 var->blue.msb_right = 0; in imsttfb_check_var()
848 var->transp.msb_right = 0; in imsttfb_check_var()
855 return 0; in imsttfb_check_var()
872 return 0; in imsttfb_set_par()
890 if (0 && bpp == 16) /* screws up X */ in imsttfb_setcolreg()
917 return 0; in imsttfb_setcolreg()
930 return 0; in imsttfb_pan_display()
940 if (blank > 0) { in imsttfb_blank()
944 ctrl &= ~0x00000380; in imsttfb_blank()
946 par->cmap_regs[PIDXHI] = 0; eieio(); in imsttfb_blank()
948 par->cmap_regs[PIDXDATA] = 0x55; eieio(); in imsttfb_blank()
950 par->cmap_regs[PIDXDATA] = 0x11; eieio(); in imsttfb_blank()
952 par->cmap_regs[PIDXDATA] = 0x0f; eieio(); in imsttfb_blank()
954 par->cmap_regs[PIDXDATA] = 0x1f; eieio(); in imsttfb_blank()
956 par->cmap_regs[PIDXDATA] = 0xc0; in imsttfb_blank()
960 ctrl &= ~0x00000020; in imsttfb_blank()
963 ctrl &= ~0x00000010; in imsttfb_blank()
968 ctrl |= 0x000017b0; in imsttfb_blank()
969 par->cmap_regs[PIDXHI] = 0; eieio(); in imsttfb_blank()
971 par->cmap_regs[PIDXDATA] = 0x01; eieio(); in imsttfb_blank()
973 par->cmap_regs[PIDXDATA] = 0x00; eieio(); in imsttfb_blank()
975 par->cmap_regs[PIDXDATA] = 0x00; eieio(); in imsttfb_blank()
977 par->cmap_regs[PIDXDATA] = 0x01; eieio(); in imsttfb_blank()
979 par->cmap_regs[PIDXDATA] = 0x45; eieio(); in imsttfb_blank()
981 ctrl |= 0x00001780; in imsttfb_blank()
984 return 0; in imsttfb_blank()
1008 while(read_reg_le32(par->dc_regs, SSTATUS) & 0x80); in imsttfb_fillrect()
1012 write_reg_le32(par->dc_regs, BI, 0xffffffff); in imsttfb_fillrect()
1013 write_reg_le32(par->dc_regs, MBC, 0xffffffff); in imsttfb_fillrect()
1015 write_reg_le32(par->dc_regs, BLTCTL, 0x840); /* 0x200000 */ in imsttfb_fillrect()
1016 while(read_reg_le32(par->dc_regs, SSTATUS) & 0x80); in imsttfb_fillrect()
1017 while(read_reg_le32(par->dc_regs, SSTATUS) & 0x40); in imsttfb_fillrect()
1019 while(read_reg_le32(par->dc_regs, SSTATUS) & 0x80); in imsttfb_fillrect()
1025 write_reg_le32(par->dc_regs, BLTCTL, 0x40005); in imsttfb_fillrect()
1026 while(read_reg_le32(par->dc_regs, SSTATUS) & 0x80); in imsttfb_fillrect()
1027 while(read_reg_le32(par->dc_regs, SSTATUS) & 0x40); in imsttfb_fillrect()
1050 bltctl = 0x05; in imsttfb_copyarea()
1057 sp |= -(line_pitch) & 0xffff; in imsttfb_copyarea()
1058 dp_octl = -(line_pitch) & 0xffff; in imsttfb_copyarea()
1066 bltctl |= 0x80; in imsttfb_copyarea()
1067 cnt |= -(width) & 0xffff; in imsttfb_copyarea()
1074 while(read_reg_le32(par->dc_regs, SSTATUS) & 0x80); in imsttfb_copyarea()
1081 while(read_reg_le32(par->dc_regs, SSTATUS) & 0x80); in imsttfb_copyarea()
1082 while(read_reg_le32(par->dc_regs, SSTATUS) & 0x40); in imsttfb_copyarea()
1085 #if 0
1096 for (x = 0; x < 0x100; x++) {
1098 par->cmap_regs[PIDXDATA] = 0x00; eieio();
1101 for (y = 0; y < height; y++)
1102 for (x = 0; x < width >> 2; x++) {
1104 par->cmap_regs[PIDXDATA] = 0xff; eieio();
1106 par->cmap_regs[PIDXHI] = 0; eieio();
1127 par->cmap_regs[TVPIDATA] &= 0x03; eieio();
1128 par->cmap_regs[TVPADDRW] = 0; eieio();
1129 for (x = 0; x < 0x200; x++) {
1130 par->cmap_regs[TVPCRDAT] = 0x00; eieio();
1132 for (x = 0; x < 0x200; x++) {
1133 par->cmap_regs[TVPCRDAT] = 0xff; eieio();
1136 par->cmap_regs[TVPIDATA] &= 0x03; eieio();
1137 for (y = 0; y < height; y++)
1138 for (x = 0; x < width >> 3; x++) {
1140 par->cmap_regs[TVPCRDAT] = 0xff; eieio();
1143 par->cmap_regs[TVPIDATA] |= 0x08; eieio();
1144 for (y = 0; y < height; y++)
1145 for (x = 0; x < width >> 3; x++) {
1147 par->cmap_regs[TVPCRDAT] = 0xff; eieio();
1149 par->cmap_regs[TVPCADRW] = 0x00; eieio();
1150 for (x = 0; x < 12; x++) {
1162 par->cmap_regs[PIDXHI] = 0; eieio();
1165 par->cmap_regs[PIDXDATA] = 0x00; eieio();
1170 par->cmap_regs[PIDXDATA] = d->dx & 0xff;eieio();
1174 par->cmap_regs[PIDXDATA] = d->dy & 0xff;eieio();
1176 par->cmap_regs[PIDXDATA] = 0x02; eieio();
1181 par->cmap_regs[TVPIDATA] = 0x00; eieio();
1183 __u16 x = d->dx + 0x40, y = d->dy + 0x40;
1186 par->cmap_regs[TVPCXPOL] = x & 0xff; eieio();
1188 par->cmap_regs[TVPCYPOL] = y & 0xff; eieio();
1190 par->cmap_regs[TVPIDATA] = 0x02; eieio();
1204 imstt_set_cursor(info, cursor, 0);
1223 for (i = 0; i < cursor->image.height; i++) {
1224 for (j = 0; j < width; j++) {
1235 for (i = 0; i < cursor->image.height; i++) {
1236 for (j = 0; j < width; j++) {
1246 fg = ((info->cmap.red[fg_idx] & 0xf8) << 7) |
1247 ((info->cmap.green[fg_idx] & 0xf8) << 2) |
1248 ((info->cmap.blue[fg_idx] & 0xf8) >> 3) | 1 << 15;
1254 return 0;
1258 #define FBIMSTT_SETREG 0x545401
1259 #define FBIMSTT_GETREG 0x545402
1260 #define FBIMSTT_SETCMAPREG 0x545403
1261 #define FBIMSTT_GETCMAPREG 0x545404
1262 #define FBIMSTT_SETIDXREG 0x545405
1263 #define FBIMSTT_GETIDXREG 0x545406
1275 if (copy_from_user(reg, argp, 8) || reg[0] > (0x1000 - sizeof(reg[0])) / sizeof(reg[0])) in imsttfb_ioctl()
1277 write_reg_le32(par->dc_regs, reg[0], reg[1]); in imsttfb_ioctl()
1278 return 0; in imsttfb_ioctl()
1280 if (copy_from_user(reg, argp, 4) || reg[0] > (0x1000 - sizeof(reg[0])) / sizeof(reg[0])) in imsttfb_ioctl()
1282 reg[1] = read_reg_le32(par->dc_regs, reg[0]); in imsttfb_ioctl()
1285 return 0; in imsttfb_ioctl()
1287 if (copy_from_user(reg, argp, 8) || reg[0] > (0x1000 - sizeof(reg[0])) / sizeof(reg[0])) in imsttfb_ioctl()
1289 write_reg_le32(((u_int __iomem *)par->cmap_regs), reg[0], reg[1]); in imsttfb_ioctl()
1290 return 0; in imsttfb_ioctl()
1292 if (copy_from_user(reg, argp, 4) || reg[0] > (0x1000 - sizeof(reg[0])) / sizeof(reg[0])) in imsttfb_ioctl()
1294 reg[1] = read_reg_le32(((u_int __iomem *)par->cmap_regs), reg[0]); in imsttfb_ioctl()
1297 return 0; in imsttfb_ioctl()
1301 par->cmap_regs[PIDXHI] = 0; eieio(); in imsttfb_ioctl()
1302 par->cmap_regs[PIDXLO] = idx[0]; eieio(); in imsttfb_ioctl()
1304 return 0; in imsttfb_ioctl()
1308 par->cmap_regs[PIDXHI] = 0; eieio(); in imsttfb_ioctl()
1309 par->cmap_regs[PIDXLO] = idx[0]; eieio(); in imsttfb_ioctl()
1313 return 0; in imsttfb_ioctl()
1321 PCI_ANY_ID, PCI_ANY_ID, 0, 0, IBM },
1323 PCI_ANY_ID, PCI_ANY_ID, 0, 0, TVP },
1324 { 0, }
1356 info->fix.smem_len = (tmp & 0x0004) ? 0x400000 : 0x200000; in init_imstt()
1358 info->fix.smem_len = 0x800000; in init_imstt()
1363 *ip++ = 0; in init_imstt()
1367 write_reg_le32(par->dc_regs, STGCTL, tmp & ~0x1); in init_imstt()
1368 write_reg_le32(par->dc_regs, SSR, 0); in init_imstt()
1372 par->cmap_regs[PPMASK] = 0xff; in init_imstt()
1374 par->cmap_regs[PIDXHI] = 0; in init_imstt()
1376 for (i = 0; i < ARRAY_SIZE(ibm_initregs); i++) { in init_imstt()
1383 for (i = 0; i < ARRAY_SIZE(tvp_initregs); i++) { in init_imstt()
1397 if (vmode <= 0 || vmode > VMODE_MAX) in init_imstt()
1426 info->fix.mmio_len = 0x1000; in init_imstt()
1434 info->fix.ywrapstep = 0; in init_imstt()
1454 fb_alloc_cmap(&info->cmap, 0, 0); in init_imstt()
1456 if (register_framebuffer(info) < 0) { in init_imstt()
1461 tmp = (read_reg_le32(par->dc_regs, SSTATUS) & 0x0f00) >> 8; in init_imstt()
1486 addr = pci_resource_start (pdev, 0); in imsttfb_probe()
1487 size = pci_resource_len (pdev, 0); in imsttfb_probe()
1506 printk(KERN_INFO "imsttfb: Device 0x%x unknown, " in imsttfb_probe()
1514 0x400000 : 0x800000); in imsttfb_probe()
1517 info->fix.mmio_start = addr + 0x800000; in imsttfb_probe()
1518 par->dc_regs = ioremap(addr + 0x800000, 0x1000); in imsttfb_probe()
1521 par->cmap_regs_phys = addr + 0x840000; in imsttfb_probe()
1522 par->cmap_regs = (__u8 *)ioremap(addr + 0x840000, 0x1000); in imsttfb_probe()
1529 return 0; in imsttfb_probe()
1545 int size = pci_resource_len(pdev, 0); in imsttfb_remove()
1562 return 0; in imsttfb_setup()
1570 for (i = 0; i < sizeof(fontname) - 1; i++) in imsttfb_setup()
1574 fontname[i] = 0; in imsttfb_setup()
1581 int vmode = simple_strtoul(this_opt+6, NULL, 0); in imsttfb_setup()
1582 if (vmode > 0 && vmode <= VMODE_MAX) in imsttfb_setup()
1585 int cmode = simple_strtoul(this_opt+6, NULL, 0); in imsttfb_setup()
1605 return 0; in imsttfb_setup()