Lines Matching full:ports
256 struct usb_hub_descriptor *desc, int ports) in xhci_common_hub_descriptor() argument
263 desc->bNbrPorts = ports; in xhci_common_hub_descriptor()
273 /* Bits 6:5 - no TTs in root ports */ in xhci_common_hub_descriptor()
282 int ports; in xhci_usb2_hub_descriptor() local
290 ports = rhub->num_ports; in xhci_usb2_hub_descriptor()
291 xhci_common_hub_descriptor(xhci, desc, ports); in xhci_usb2_hub_descriptor()
293 temp = 1 + (ports / 8); in xhci_usb2_hub_descriptor()
300 for (i = 0; i < ports; i++) { in xhci_usb2_hub_descriptor()
301 portsc = readl(rhub->ports[i]->addr); in xhci_usb2_hub_descriptor()
313 * ports on it. The USB 2.0 specification says that there are two in xhci_usb2_hub_descriptor()
316 * USB_MAXCHILDREN ports, we may need to use the DeviceRemovable array in xhci_usb2_hub_descriptor()
320 * set of ports that actually exist. in xhci_usb2_hub_descriptor()
327 for (i = 0; i < (ports + 1 + 7) / 8; i++) in xhci_usb2_hub_descriptor()
336 int ports; in xhci_usb3_hub_descriptor() local
343 ports = rhub->num_ports; in xhci_usb3_hub_descriptor()
344 xhci_common_hub_descriptor(xhci, desc, ports); in xhci_usb3_hub_descriptor()
356 for (i = 0; i < ports; i++) { in xhci_usb3_hub_descriptor()
357 portsc = readl(rhub->ports[i]->addr); in xhci_usb3_hub_descriptor()
413 * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
569 /* Don't allow the USB core to disable SuperSpeed ports. */ in xhci_disable_port()
663 port = rhub->ports[index]; in xhci_set_port_power()
695 /* xhci only supports test mode for usb2 ports */ in xhci_port_set_test_mode()
696 port = xhci->usb2_rhub.ports[wIndex]; in xhci_port_set_test_mode()
724 /* Put all ports to the Disable state by clear PP */ in xhci_enter_test_mode()
726 /* Power off USB3 ports*/ in xhci_enter_test_mode()
729 /* Power off USB2 ports*/ in xhci_enter_test_mode()
880 * This Function verifies if all xhc USB3 ports have entered U0, if so,
898 "All USB3 ports have entered U0 already!"); in xhci_del_comp_mod_timer()
1127 port = rhub->ports[wIndex]; in xhci_get_port_status()
1191 struct xhci_port **ports; in xhci_hub_control() local
1194 ports = rhub->ports; in xhci_hub_control()
1233 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1258 port_li = readl(ports[wIndex]->addr + PORTLI); in xhci_hub_control()
1276 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1286 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1289 xhci_set_link_state(xhci, ports[wIndex], in xhci_hub_control()
1299 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1318 xhci_set_link_state(xhci, ports[wIndex], XDEV_U3); in xhci_hub_control()
1324 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1328 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1341 writel(temp | PORT_PE, ports[wIndex]->addr); in xhci_hub_control()
1342 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1350 xhci_set_link_state(xhci, ports[wIndex], in xhci_hub_control()
1352 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1383 xhci_set_link_state(xhci, ports[wIndex], in xhci_hub_control()
1386 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1423 xhci_set_link_state(xhci, ports[wIndex], in xhci_hub_control()
1436 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1452 xhci_set_link_state(xhci, ports[wIndex], USB_SS_PORT_LS_U3); in xhci_hub_control()
1456 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1461 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1467 * Turn on ports, even if there isn't per-port switching. in xhci_hub_control()
1476 writel(temp, ports[wIndex]->addr); in xhci_hub_control()
1478 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1483 xhci_set_remote_wake_mask(xhci, ports[wIndex], in xhci_hub_control()
1485 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1491 writel(temp, ports[wIndex]->addr); in xhci_hub_control()
1492 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1497 temp = readl(ports[wIndex]->addr + PORTPMSC); in xhci_hub_control()
1500 writel(temp, ports[wIndex]->addr + PORTPMSC); in xhci_hub_control()
1505 temp = readl(ports[wIndex]->addr + PORTPMSC); in xhci_hub_control()
1508 writel(temp, ports[wIndex]->addr + PORTPMSC); in xhci_hub_control()
1524 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1530 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1540 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1551 xhci_set_link_state(xhci, ports[wIndex], in xhci_hub_control()
1556 xhci_set_link_state(xhci, ports[wIndex], in xhci_hub_control()
1582 ports[wIndex]->addr, temp); in xhci_hub_control()
1586 ports[wIndex]->addr, temp); in xhci_hub_control()
1609 * Ports are 0-indexed from the HCD point of view,
1626 struct xhci_port **ports; in xhci_hub_status_data() local
1629 ports = rhub->ports; in xhci_hub_status_data()
1649 temp = readl(ports[i]->addr); in xhci_hub_status_data()
1687 struct xhci_port **ports; in xhci_bus_suspend() local
1692 ports = rhub->ports; in xhci_bus_suspend()
1709 * Prepare ports for suspend, but don't write anything before all ports in xhci_bus_suspend()
1718 t1 = readl(ports[port_index]->addr); in xhci_bus_suspend()
1742 /* suspend ports in U0, or bail out for new connect changes */ in xhci_bus_suspend()
1783 /* write port settings, stopping and suspending ports if needed */ in xhci_bus_suspend()
1799 writel(portsc_buf[port_index], ports[port_index]->addr); in xhci_bus_suspend()
1850 struct xhci_port **ports; in xhci_bus_resume() local
1853 ports = rhub->ports; in xhci_bus_resume()
1871 /* bus specific resume for ports we suspended at bus_suspend */ in xhci_bus_resume()
1879 portsc = readl(ports[port_index]->addr); in xhci_bus_resume()
1881 /* warm reset CAS limited ports stuck in polling/compliance */ in xhci_bus_resume()
1884 xhci_port_missing_cas_quirk(ports[port_index])) { in xhci_bus_resume()
1907 /* disable wake for all ports, write new link state if needed */ in xhci_bus_resume()
1909 writel(portsc, ports[port_index]->addr); in xhci_bus_resume()
1922 xhci_test_and_clear_bit(xhci, ports[port_index], in xhci_bus_resume()
1924 xhci_set_link_state(xhci, ports[port_index], XDEV_U0); in xhci_bus_resume()
1930 sret = xhci_handshake(ports[port_index]->addr, PORT_PLC, in xhci_bus_resume()
1937 xhci_test_and_clear_bit(xhci, ports[port_index], PORT_PLC); in xhci_bus_resume()
1960 return rhub->bus_state.resuming_ports; /* USB2 ports only */ in xhci_get_resuming_ports()