Lines Matching +full:usb3 +full:- +full:if

1 # SPDX-License-Identifier: GPL-2.0
4 	tristate "DesignWare USB3 DRD Core Support"
6 	select USB_XHCI_PLATFORM if USB_XHCI_HCD
7 	select USB_ROLE_SWITCH if USB_DWC3_DUAL_ROLE
9 	  Say Y or M here if your system has a Dual Role SuperSpeed
10 	  USB controller based on the DesignWare USB3 IP Core.
12 	  If you choose to build this driver is a dynamically linked
15 if USB_DWC3
21 	  Select this if you have ULPI type PHY attached to your DWC3
26 	default USB_DWC3_DUAL_ROLE if (USB && USB_GADGET)
27 	default USB_DWC3_HOST if (USB && !USB_GADGET)
28 	default USB_DWC3_GADGET if (!USB && USB_GADGET)
66 	  Say 'Y' or 'M' here if you have one such device
73 	  Recent Exynos5 SoCs ship with one DesignWare Core USB3 IP inside,
74 	  say 'Y' or 'M' if you have one such device.
77 	tristate "PCIe-based Platforms"
81 	  If you're using the DesignWare Core IP with a PCIe (but not HAPS
85 	tristate "Synopsys PCIe-based HAPS Platforms"
89 	  If you're using the DesignWare Core IP with a Synopsys PCIe HAPS
98 	  Say 'Y' or 'M' here if you have one such device
109 	  Say 'Y' or 'M' if you have one such device.
117 	  Currently supports Xilinx and Qualcomm DWC USB3 IP.
118 	  Say 'Y' or 'M' if you have one such device.
125 	  STMicroelectronics SoCs with one DesignWare Core USB3 IP
127 	  Say 'Y' or 'M' if you have one such device.
140 	  Say 'Y' or 'M' if you have one such device.
150 	  Say 'Y' or 'M' if you have one such device.
157 	  Support Xilinx SoCs with DesignWare Core USB3 IP.
159 	  Say 'Y' or 'M' if you have one such device.