429  * holds the reason for the halt.
796  * interrupt for the appropriate queue is enabled so that the halt request can
823 		dev_vdbg(hsotg->dev, "Halt on queue\n");  in dwc2_halt_channel()
840 			 * halt to be queued when the periodic schedule is  in dwc2_halt_channel()
883 	 * Always halt and release the host channel to make it available for  in dwc2_complete_non_periodic_xfer()
895 		 * halt the channel. (In DMA mode, this call simply releases  in dwc2_complete_non_periodic_xfer()
1288 		 * Halt the channel so the transfer can be re-started from  in dwc2_hc_nak_intr()
1368 			 * Halt the channel so the transfer can be re-started  in dwc2_hc_ack_intr()
1503 	 * Halt the channel and re-start the transfer so the PING protocol  in dwc2_hc_nyet_intr()
1641 	 * Force a channel halt. Don't call dwc2_halt_channel because that won't  in dwc2_hc_ahberr_intr()
1642 	 * write to the HCCHARn register in DMA mode to force the halt.  in dwc2_hc_ahberr_intr()
1682 		 * Halt the channel so the transfer can be re-started from  in dwc2_hc_xacterr_intr()
1764  * For debug only. It checks that a valid halt status is set and that
1768  * Return: true if halt status is ok, false otherwise
1783 		 * never happen. Ignore the halt if it does occur.  in dwc2_halt_status_ok()
1802 			 "%s: no halt status, channel %d, ignoring interrupt\n",  in dwc2_halt_status_ok()
1809 	 * when the halt interrupt occurs. Halt the channel again if it does  in dwc2_halt_status_ok()
1815 			 "%s: hcchar.chdis set unexpectedly, hcchar 0x%08x, trying to halt again\n",  in dwc2_halt_status_ok()
1864 			 * channel was forced to halt because there's no way to  in dwc2_hc_chhltd_intr_dma()
1877 		 * says that on SPLIT-ISOC OUT transfers in DMA mode that a HALT  in dwc2_hc_chhltd_intr_dma()
1933 			 * halt on a NAK to allow rewinding the buffer pointer.  in dwc2_hc_chhltd_intr_dma()
1943 			 * halt on ACK.  in dwc2_hc_chhltd_intr_dma()
1956 					"%s: Halt channel %d (assume incomplete periodic transfer)\n",  in dwc2_hc_chhltd_intr_dma()
2001  * requests a halt. This occurs during handling other host channel interrupts