Lines Matching +full:rcar +full:- +full:gen3 +full:- +full:hscif
1 // SPDX-License-Identifier: GPL-2.0
3 * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
5 * Copyright (C) 2002 - 2011 Paul Mundt
9 * based off of the old drivers/char/sh-sci.c by:
26 #include <linux/dma-mapping.h>
57 #include "sh-sci.h"
59 /* Offsets into the sci_port->irqs array */
73 ((port)->irqs[SCIx_ERI_IRQ] == \
74 (port)->irqs[SCIx_RXI_IRQ]) || \
75 ((port)->irqs[SCIx_ERI_IRQ] && \
76 ((port)->irqs[SCIx_RXI_IRQ] < 0))
87 #define SCI_SR(x) BIT((x) - 1)
88 #define SCI_SR_RANGE(x, y) GENMASK((y) - 1, (x) - 1)
94 #define min_sr(_port) ffs((_port)->sampling_rate_mask)
95 #define max_sr(_port) fls((_port)->sampling_rate_mask)
99 for ((_sr) = max_sr(_port); (_sr) >= min_sr(_port); (_sr)--) \
100 if ((_port)->sampling_rate_mask & SCI_SR((_sr)))
267 * Common SH-2(A) SCIF definitions for ports with FIFO data
320 * Common SH-3 SCIF definitions.
342 * Common SH-4(A) SCIF(B) definitions.
393 * Common HSCIF definitions.
422 * Common SH-4(A) SCIF(B) definitions for ports without an SCSPTR
446 * Common SH-4(A) SCIF(B) definitions for ports with FIFO data
473 * SH7705-style SCIF(B) ports, lacking both SCSPTR and SCLSR
496 #define sci_getreg(up, offset) (&to_sci_port(up)->params->regs[offset])
508 if (reg->size == 8) in sci_serial_in()
509 return ioread8(p->membase + (reg->offset << p->regshift)); in sci_serial_in()
510 else if (reg->size == 16) in sci_serial_in()
511 return ioread16(p->membase + (reg->offset << p->regshift)); in sci_serial_in()
522 if (reg->size == 8) in sci_serial_out()
523 iowrite8(value, p->membase + (reg->offset << p->regshift)); in sci_serial_out()
524 else if (reg->size == 16) in sci_serial_out()
525 iowrite16(value, p->membase + (reg->offset << p->regshift)); in sci_serial_out()
534 if (!sci_port->port.dev) in sci_port_enable()
537 pm_runtime_get_sync(sci_port->port.dev); in sci_port_enable()
540 clk_prepare_enable(sci_port->clks[i]); in sci_port_enable()
541 sci_port->clk_rates[i] = clk_get_rate(sci_port->clks[i]); in sci_port_enable()
543 sci_port->port.uartclk = sci_port->clk_rates[SCI_FCK]; in sci_port_enable()
550 if (!sci_port->port.dev) in sci_port_disable()
553 for (i = SCI_NUM_CLKS; i-- > 0; ) in sci_port_disable()
554 clk_disable_unprepare(sci_port->clks[i]); in sci_port_disable()
556 pm_runtime_put_sync(sci_port->port.dev); in sci_port_disable()
563 * special-casing the port type, we check the port initialization in port_rx_irq_mask()
568 return SCSCR_RIE | (to_sci_port(port)->cfg->scscr & SCSCR_REIE); in port_rx_irq_mask()
577 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_start_tx()
579 if (s->chan_tx) in sci_start_tx()
587 if (s->chan_tx && !uart_circ_empty(&s->port.state->xmit) && in sci_start_tx()
588 dma_submit_error(s->cookie_tx)) { in sci_start_tx()
589 s->cookie_tx = 0; in sci_start_tx()
590 schedule_work(&s->work_tx); in sci_start_tx()
594 if (!s->chan_tx || port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_start_tx()
608 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) in sci_stop_tx()
616 if (to_sci_port(port)->chan_tx && in sci_stop_tx()
617 !dma_submit_error(to_sci_port(port)->cookie_tx)) { in sci_stop_tx()
618 dmaengine_terminate_async(to_sci_port(port)->chan_tx); in sci_stop_tx()
619 to_sci_port(port)->cookie_tx = -EINVAL; in sci_stop_tx()
630 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) in sci_start_rx()
642 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) in sci_stop_rx()
652 if (port->type == PORT_SCI) { in sci_clear_SCxSR()
655 } else if (to_sci_port(port)->params->overrun_mask == SCIFA_ORER) { in sci_clear_SCxSR()
716 * Use port-specific handler if provided. in sci_init_pins()
718 if (s->cfg->ops && s->cfg->ops->init_pins) { in sci_init_pins()
719 s->cfg->ops->init_pins(port, cflag); in sci_init_pins()
723 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_init_pins()
729 if (to_sci_port(port)->has_rtscts) { in sci_init_pins()
731 if (!(port->mctrl & TIOCM_RTS)) { in sci_init_pins()
734 } else if (!s->autorts) { in sci_init_pins()
746 } else if (sci_getreg(port, SCSPTR)->size) { in sci_init_pins()
751 if (!(port->mctrl & TIOCM_RTS)) in sci_init_pins()
753 else if (!s->autorts) in sci_init_pins()
764 unsigned int fifo_mask = (s->params->fifosize << 1) - 1; in sci_txfill()
768 if (reg->size) in sci_txfill()
772 if (reg->size) in sci_txfill()
780 return port->fifosize - sci_txfill(port); in sci_txroom()
786 unsigned int fifo_mask = (s->params->fifosize << 1) - 1; in sci_rxfill()
790 if (reg->size) in sci_rxfill()
794 if (reg->size) in sci_rxfill()
806 struct circ_buf *xmit = &port->state->xmit; in sci_transmit_chars()
828 if (port->x_char) { in sci_transmit_chars()
829 c = port->x_char; in sci_transmit_chars()
830 port->x_char = 0; in sci_transmit_chars()
832 c = xmit->buf[xmit->tail]; in sci_transmit_chars()
833 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); in sci_transmit_chars()
840 port->icount.tx++; in sci_transmit_chars()
841 } while (--count > 0); in sci_transmit_chars()
854 struct tty_port *tport = &port->state->port; in sci_receive_chars()
871 if (port->type == PORT_SCI) { in sci_receive_chars()
881 if (port->type == PORT_SCIF || in sci_receive_chars()
882 port->type == PORT_HSCIF) { in sci_receive_chars()
890 count--; i--; in sci_receive_chars()
897 port->icount.frame++; in sci_receive_chars()
898 dev_notice(port->dev, "frame error\n"); in sci_receive_chars()
901 port->icount.parity++; in sci_receive_chars()
902 dev_notice(port->dev, "parity error\n"); in sci_receive_chars()
914 port->icount.rx += count; in sci_receive_chars()
932 struct tty_port *tport = &port->state->port; in sci_handle_errors()
936 if (status & s->params->overrun_mask) { in sci_handle_errors()
937 port->icount.overrun++; in sci_handle_errors()
943 dev_notice(port->dev, "overrun error\n"); in sci_handle_errors()
948 port->icount.frame++; in sci_handle_errors()
953 dev_notice(port->dev, "frame error\n"); in sci_handle_errors()
958 port->icount.parity++; in sci_handle_errors()
963 dev_notice(port->dev, "parity error\n"); in sci_handle_errors()
974 struct tty_port *tport = &port->state->port; in sci_handle_fifo_overrun()
980 reg = sci_getreg(port, s->params->overrun_reg); in sci_handle_fifo_overrun()
981 if (!reg->size) in sci_handle_fifo_overrun()
984 status = serial_port_in(port, s->params->overrun_reg); in sci_handle_fifo_overrun()
985 if (status & s->params->overrun_mask) { in sci_handle_fifo_overrun()
986 status &= ~s->params->overrun_mask; in sci_handle_fifo_overrun()
987 serial_port_out(port, s->params->overrun_reg, status); in sci_handle_fifo_overrun()
989 port->icount.overrun++; in sci_handle_fifo_overrun()
994 dev_dbg(port->dev, "overrun error\n"); in sci_handle_fifo_overrun()
1005 struct tty_port *tport = &port->state->port; in sci_handle_breaks()
1011 port->icount.brk++; in sci_handle_breaks()
1017 dev_dbg(port->dev, "BREAK detected\n"); in sci_handle_breaks()
1032 if (rx_trig >= port->fifosize) in scif_set_rtrg()
1033 rx_trig = port->fifosize - 1; in scif_set_rtrg()
1037 /* HSCIF can be set to an arbitrary level. */ in scif_set_rtrg()
1038 if (sci_getreg(port, HSRTRGR)->size) { in scif_set_rtrg()
1043 switch (port->type) { in scif_set_rtrg()
1089 if (sci_getreg(port, HSRTRGR)->size) in scif_rtrg_enabled()
1099 struct uart_port *port = &s->port; in rx_fifo_timer_fn()
1101 dev_dbg(port->dev, "Rx timed out\n"); in rx_fifo_timer_fn()
1111 return sprintf(buf, "%d\n", sci->rx_trigger); in rx_fifo_trigger_show()
1127 sci->rx_trigger = scif_set_rtrg(port, r); in rx_fifo_trigger_store()
1128 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) in rx_fifo_trigger_store()
1144 if (port->type == PORT_HSCIF) in rx_fifo_timeout_show()
1145 v = sci->hscif_tot >> HSSCR_TOT_SHIFT; in rx_fifo_timeout_show()
1147 v = sci->rx_fifo_timeout; in rx_fifo_timeout_show()
1166 if (port->type == PORT_HSCIF) { in rx_fifo_timeout_store()
1168 return -EINVAL; in rx_fifo_timeout_store()
1169 sci->hscif_tot = r << HSSCR_TOT_SHIFT; in rx_fifo_timeout_store()
1171 sci->rx_fifo_timeout = r; in rx_fifo_timeout_store()
1174 timer_setup(&sci->rx_fifo_timer, rx_fifo_timer_fn, 0); in rx_fifo_timeout_store()
1187 struct uart_port *port = &s->port; in sci_dma_tx_complete()
1188 struct circ_buf *xmit = &port->state->xmit; in sci_dma_tx_complete()
1191 dev_dbg(port->dev, "%s(%d)\n", __func__, port->line); in sci_dma_tx_complete()
1193 spin_lock_irqsave(&port->lock, flags); in sci_dma_tx_complete()
1195 xmit->tail += s->tx_dma_len; in sci_dma_tx_complete()
1196 xmit->tail &= UART_XMIT_SIZE - 1; in sci_dma_tx_complete()
1198 port->icount.tx += s->tx_dma_len; in sci_dma_tx_complete()
1204 s->cookie_tx = 0; in sci_dma_tx_complete()
1205 schedule_work(&s->work_tx); in sci_dma_tx_complete()
1207 s->cookie_tx = -EINVAL; in sci_dma_tx_complete()
1208 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_dma_tx_complete()
1214 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_tx_complete()
1220 struct uart_port *port = &s->port; in sci_dma_rx_push()
1221 struct tty_port *tport = &port->state->port; in sci_dma_rx_push()
1226 port->icount.buf_overrun++; in sci_dma_rx_push()
1228 port->icount.rx += copied; in sci_dma_rx_push()
1237 for (i = 0; i < ARRAY_SIZE(s->cookie_rx); i++) in sci_dma_rx_find_active()
1238 if (s->active_rx == s->cookie_rx[i]) in sci_dma_rx_find_active()
1241 return -1; in sci_dma_rx_find_active()
1248 s->chan_rx = NULL; in sci_dma_rx_chan_invalidate()
1249 for (i = 0; i < ARRAY_SIZE(s->cookie_rx); i++) in sci_dma_rx_chan_invalidate()
1250 s->cookie_rx[i] = -EINVAL; in sci_dma_rx_chan_invalidate()
1251 s->active_rx = 0; in sci_dma_rx_chan_invalidate()
1256 struct dma_chan *chan = s->chan_rx_saved; in sci_dma_rx_release()
1258 s->chan_rx_saved = NULL; in sci_dma_rx_release()
1261 dma_free_coherent(chan->device->dev, s->buf_len_rx * 2, s->rx_buf[0], in sci_dma_rx_release()
1262 sg_dma_address(&s->sg_rx[0])); in sci_dma_rx_release()
1277 struct uart_port *port = &s->port; in sci_dma_rx_reenable_irq()
1282 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_dma_rx_reenable_irq()
1284 enable_irq(s->irqs[SCIx_RXI_IRQ]); in sci_dma_rx_reenable_irq()
1292 struct dma_chan *chan = s->chan_rx; in sci_dma_rx_complete()
1293 struct uart_port *port = &s->port; in sci_dma_rx_complete()
1298 dev_dbg(port->dev, "%s(%d) active cookie %d\n", __func__, port->line, in sci_dma_rx_complete()
1299 s->active_rx); in sci_dma_rx_complete()
1301 spin_lock_irqsave(&port->lock, flags); in sci_dma_rx_complete()
1305 count = sci_dma_rx_push(s, s->rx_buf[active], s->buf_len_rx); in sci_dma_rx_complete()
1307 start_hrtimer_us(&s->rx_timer, s->rx_timeout); in sci_dma_rx_complete()
1310 tty_flip_buffer_push(&port->state->port); in sci_dma_rx_complete()
1312 desc = dmaengine_prep_slave_sg(s->chan_rx, &s->sg_rx[active], 1, in sci_dma_rx_complete()
1318 desc->callback = sci_dma_rx_complete; in sci_dma_rx_complete()
1319 desc->callback_param = s; in sci_dma_rx_complete()
1320 s->cookie_rx[active] = dmaengine_submit(desc); in sci_dma_rx_complete()
1321 if (dma_submit_error(s->cookie_rx[active])) in sci_dma_rx_complete()
1324 s->active_rx = s->cookie_rx[!active]; in sci_dma_rx_complete()
1328 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_rx_complete()
1329 dev_dbg(port->dev, "%s: cookie %d #%d, new active cookie %d\n", in sci_dma_rx_complete()
1330 __func__, s->cookie_rx[active], active, s->active_rx); in sci_dma_rx_complete()
1334 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_rx_complete()
1335 dev_warn(port->dev, "Failed submitting Rx DMA descriptor\n"); in sci_dma_rx_complete()
1337 spin_lock_irqsave(&port->lock, flags); in sci_dma_rx_complete()
1341 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_rx_complete()
1346 struct dma_chan *chan = s->chan_tx_saved; in sci_dma_tx_release()
1348 cancel_work_sync(&s->work_tx); in sci_dma_tx_release()
1349 s->chan_tx_saved = s->chan_tx = NULL; in sci_dma_tx_release()
1350 s->cookie_tx = -EINVAL; in sci_dma_tx_release()
1352 dma_unmap_single(chan->device->dev, s->tx_dma_addr, UART_XMIT_SIZE, in sci_dma_tx_release()
1359 struct dma_chan *chan = s->chan_rx; in sci_dma_rx_submit()
1360 struct uart_port *port = &s->port; in sci_dma_rx_submit()
1365 struct scatterlist *sg = &s->sg_rx[i]; in sci_dma_rx_submit()
1374 desc->callback = sci_dma_rx_complete; in sci_dma_rx_submit()
1375 desc->callback_param = s; in sci_dma_rx_submit()
1376 s->cookie_rx[i] = dmaengine_submit(desc); in sci_dma_rx_submit()
1377 if (dma_submit_error(s->cookie_rx[i])) in sci_dma_rx_submit()
1382 s->active_rx = s->cookie_rx[0]; in sci_dma_rx_submit()
1390 spin_lock_irqsave(&port->lock, flags); in sci_dma_rx_submit()
1396 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_rx_submit()
1397 return -EAGAIN; in sci_dma_rx_submit()
1404 struct dma_chan *chan = s->chan_tx; in sci_dma_tx_work_fn()
1405 struct uart_port *port = &s->port; in sci_dma_tx_work_fn()
1406 struct circ_buf *xmit = &port->state->xmit; in sci_dma_tx_work_fn()
1418 spin_lock_irq(&port->lock); in sci_dma_tx_work_fn()
1419 head = xmit->head; in sci_dma_tx_work_fn()
1420 tail = xmit->tail; in sci_dma_tx_work_fn()
1421 buf = s->tx_dma_addr + (tail & (UART_XMIT_SIZE - 1)); in sci_dma_tx_work_fn()
1422 s->tx_dma_len = min_t(unsigned int, in sci_dma_tx_work_fn()
1425 if (!s->tx_dma_len) { in sci_dma_tx_work_fn()
1427 spin_unlock_irq(&port->lock); in sci_dma_tx_work_fn()
1431 desc = dmaengine_prep_slave_single(chan, buf, s->tx_dma_len, in sci_dma_tx_work_fn()
1435 spin_unlock_irq(&port->lock); in sci_dma_tx_work_fn()
1436 dev_warn(port->dev, "Failed preparing Tx DMA descriptor\n"); in sci_dma_tx_work_fn()
1440 dma_sync_single_for_device(chan->device->dev, buf, s->tx_dma_len, in sci_dma_tx_work_fn()
1443 desc->callback = sci_dma_tx_complete; in sci_dma_tx_work_fn()
1444 desc->callback_param = s; in sci_dma_tx_work_fn()
1445 s->cookie_tx = dmaengine_submit(desc); in sci_dma_tx_work_fn()
1446 if (dma_submit_error(s->cookie_tx)) { in sci_dma_tx_work_fn()
1447 spin_unlock_irq(&port->lock); in sci_dma_tx_work_fn()
1448 dev_warn(port->dev, "Failed submitting Tx DMA descriptor\n"); in sci_dma_tx_work_fn()
1452 spin_unlock_irq(&port->lock); in sci_dma_tx_work_fn()
1453 dev_dbg(port->dev, "%s: %p: %d...%d, cookie %d\n", in sci_dma_tx_work_fn()
1454 __func__, xmit->buf, tail, head, s->cookie_tx); in sci_dma_tx_work_fn()
1460 spin_lock_irqsave(&port->lock, flags); in sci_dma_tx_work_fn()
1461 s->chan_tx = NULL; in sci_dma_tx_work_fn()
1463 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_tx_work_fn()
1470 struct dma_chan *chan = s->chan_rx; in sci_dma_rx_timer_fn()
1471 struct uart_port *port = &s->port; in sci_dma_rx_timer_fn()
1478 dev_dbg(port->dev, "DMA Rx timed out\n"); in sci_dma_rx_timer_fn()
1480 spin_lock_irqsave(&port->lock, flags); in sci_dma_rx_timer_fn()
1484 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_rx_timer_fn()
1488 status = dmaengine_tx_status(s->chan_rx, s->active_rx, &state); in sci_dma_rx_timer_fn()
1490 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_rx_timer_fn()
1491 dev_dbg(port->dev, "Cookie %d #%d has already completed\n", in sci_dma_rx_timer_fn()
1492 s->active_rx, active); in sci_dma_rx_timer_fn()
1506 status = dmaengine_tx_status(s->chan_rx, s->active_rx, &state); in sci_dma_rx_timer_fn()
1508 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_rx_timer_fn()
1509 dev_dbg(port->dev, "Transaction complete after DMA engine was stopped"); in sci_dma_rx_timer_fn()
1514 dmaengine_terminate_async(s->chan_rx); in sci_dma_rx_timer_fn()
1515 read = sg_dma_len(&s->sg_rx[active]) - state.residue; in sci_dma_rx_timer_fn()
1518 count = sci_dma_rx_push(s, s->rx_buf[active], read); in sci_dma_rx_timer_fn()
1520 tty_flip_buffer_push(&port->state->port); in sci_dma_rx_timer_fn()
1523 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) in sci_dma_rx_timer_fn()
1528 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_rx_timer_fn()
1540 chan = dma_request_slave_channel(port->dev, in sci_request_dma_chan()
1543 dev_dbg(port->dev, "dma_request_slave_channel failed\n"); in sci_request_dma_chan()
1550 cfg.dst_addr = port->mapbase + in sci_request_dma_chan()
1551 (sci_getreg(port, SCxTDR)->offset << port->regshift); in sci_request_dma_chan()
1554 cfg.src_addr = port->mapbase + in sci_request_dma_chan()
1555 (sci_getreg(port, SCxRDR)->offset << port->regshift); in sci_request_dma_chan()
1561 dev_warn(port->dev, "dmaengine_slave_config failed %d\n", ret); in sci_request_dma_chan()
1574 dev_dbg(port->dev, "%s: port %d\n", __func__, port->line); in sci_request_dma()
1583 if (!port->dev->of_node) in sci_request_dma()
1586 s->cookie_tx = -EINVAL; in sci_request_dma()
1592 if (!of_find_property(port->dev->of_node, "dmas", NULL)) in sci_request_dma()
1596 dev_dbg(port->dev, "%s: TX: got channel %p\n", __func__, chan); in sci_request_dma()
1599 s->tx_dma_addr = dma_map_single(chan->device->dev, in sci_request_dma()
1600 port->state->xmit.buf, in sci_request_dma()
1603 if (dma_mapping_error(chan->device->dev, s->tx_dma_addr)) { in sci_request_dma()
1604 dev_warn(port->dev, "Failed mapping Tx DMA descriptor\n"); in sci_request_dma()
1607 dev_dbg(port->dev, "%s: mapped %lu@%p to %pad\n", in sci_request_dma()
1609 port->state->xmit.buf, &s->tx_dma_addr); in sci_request_dma()
1611 INIT_WORK(&s->work_tx, sci_dma_tx_work_fn); in sci_request_dma()
1612 s->chan_tx_saved = s->chan_tx = chan; in sci_request_dma()
1617 dev_dbg(port->dev, "%s: RX: got channel %p\n", __func__, chan); in sci_request_dma()
1623 s->buf_len_rx = 2 * max_t(size_t, 16, port->fifosize); in sci_request_dma()
1624 buf = dma_alloc_coherent(chan->device->dev, s->buf_len_rx * 2, in sci_request_dma()
1627 dev_warn(port->dev, in sci_request_dma()
1634 struct scatterlist *sg = &s->sg_rx[i]; in sci_request_dma()
1637 s->rx_buf[i] = buf; in sci_request_dma()
1639 sg_dma_len(sg) = s->buf_len_rx; in sci_request_dma()
1641 buf += s->buf_len_rx; in sci_request_dma()
1642 dma += s->buf_len_rx; in sci_request_dma()
1645 hrtimer_init(&s->rx_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); in sci_request_dma()
1646 s->rx_timer.function = sci_dma_rx_timer_fn; in sci_request_dma()
1648 s->chan_rx_saved = s->chan_rx = chan; in sci_request_dma()
1650 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) in sci_request_dma()
1659 if (s->chan_tx_saved) in sci_free_dma()
1661 if (s->chan_rx_saved) in sci_free_dma()
1674 s->tx_dma_len = 0; in sci_flush_buffer()
1675 if (s->chan_tx) { in sci_flush_buffer()
1676 dmaengine_terminate_async(s->chan_tx); in sci_flush_buffer()
1677 s->cookie_tx = -EINVAL; in sci_flush_buffer()
1698 if (s->chan_rx) { in sci_rx_interrupt()
1703 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_rx_interrupt()
1716 dev_dbg(port->dev, "Rx IRQ %lu: setup t-out in %u us\n", in sci_rx_interrupt()
1717 jiffies, s->rx_timeout); in sci_rx_interrupt()
1718 start_hrtimer_us(&s->rx_timer, s->rx_timeout); in sci_rx_interrupt()
1726 if (s->rx_trigger > 1 && s->rx_fifo_timeout > 0) { in sci_rx_interrupt()
1728 scif_set_rtrg(port, s->rx_trigger); in sci_rx_interrupt()
1730 mod_timer(&s->rx_fifo_timer, jiffies + DIV_ROUND_UP( in sci_rx_interrupt()
1731 s->rx_frame * HZ * s->rx_fifo_timeout, 1000000)); in sci_rx_interrupt()
1748 spin_lock_irqsave(&port->lock, flags); in sci_tx_interrupt()
1750 spin_unlock_irqrestore(&port->lock, flags); in sci_tx_interrupt()
1775 if (s->irqs[SCIx_ERI_IRQ] == s->irqs[SCIx_BRI_IRQ]) { in sci_er_interrupt()
1789 if (port->type == PORT_SCI) { in sci_er_interrupt()
1797 if (!s->chan_rx) in sci_er_interrupt()
1804 if (!s->chan_tx) in sci_er_interrupt()
1819 if (s->params->overrun_reg == SCxSR) in sci_mpxed_interrupt()
1821 else if (sci_getreg(port, s->params->overrun_reg)->size) in sci_mpxed_interrupt()
1822 orer_status = serial_port_in(port, s->params->overrun_reg); in sci_mpxed_interrupt()
1828 !s->chan_tx) in sci_mpxed_interrupt()
1835 if (((ssr_status & SCxSR_RDxF(port)) || s->chan_rx) && in sci_mpxed_interrupt()
1844 if (s->irqs[SCIx_ERI_IRQ] != s->irqs[SCIx_BRI_IRQ] && in sci_mpxed_interrupt()
1849 if (orer_status & s->params->overrun_mask) { in sci_mpxed_interrupt()
1905 struct uart_port *up = &port->port; in sci_request_irq()
1914 if (port->irqs[w] == port->irqs[i]) in sci_request_irq()
1921 irq = up->irq; in sci_request_irq()
1923 irq = port->irqs[i]; in sci_request_irq()
1934 port->irqstr[j] = kasprintf(GFP_KERNEL, "%s:%s", in sci_request_irq()
1935 dev_name(up->dev), desc->desc); in sci_request_irq()
1936 if (!port->irqstr[j]) { in sci_request_irq()
1937 ret = -ENOMEM; in sci_request_irq()
1941 ret = request_irq(irq, desc->handler, up->irqflags, in sci_request_irq()
1942 port->irqstr[j], port); in sci_request_irq()
1944 dev_err(up->dev, "Can't allocate %s IRQ\n", desc->desc); in sci_request_irq()
1952 while (--i >= 0) in sci_request_irq()
1953 free_irq(port->irqs[i], port); in sci_request_irq()
1956 while (--j >= 0) in sci_request_irq()
1957 kfree(port->irqstr[j]); in sci_request_irq()
1971 int irq = port->irqs[i]; in sci_free_irq()
1982 if (port->irqs[j] == irq) in sci_free_irq()
1987 free_irq(port->irqs[i], port); in sci_free_irq()
1988 kfree(port->irqstr[i]); in sci_free_irq()
2007 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_set_rts()
2020 } else if (sci_getreg(port, SCSPTR)->size) { in sci_set_rts()
2034 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_get_cts()
2037 } else if (sci_getreg(port, SCSPTR)->size) { in sci_get_cts()
2049 * handled via the ->init_pins() op, which is a bit of a one-way street,
2050 * lacking any ability to defer pin control -- this will later be
2068 if (reg->size) in sci_set_mctrl()
2074 mctrl_gpio_set(s->gpios, mctrl); in sci_set_mctrl()
2076 if (!s->has_rtscts) in sci_set_mctrl()
2086 } else if (s->autorts) { in sci_set_mctrl()
2087 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_set_mctrl()
2105 struct mctrl_gpios *gpios = s->gpios; in sci_get_mctrl()
2114 if (s->autorts) { in sci_get_mctrl()
2130 mctrl_gpio_enable_ms(to_sci_port(port)->gpios); in sci_enable_ms()
2139 if (!sci_getreg(port, SCSPTR)->size) { in sci_break_ctl()
2147 spin_lock_irqsave(&port->lock, flags); in sci_break_ctl()
2151 if (break_state == -1) { in sci_break_ctl()
2161 spin_unlock_irqrestore(&port->lock, flags); in sci_break_ctl()
2169 dev_dbg(port->dev, "%s(%d)\n", __func__, port->line); in sci_startup()
2188 dev_dbg(port->dev, "%s(%d)\n", __func__, port->line); in sci_shutdown()
2190 s->autorts = false; in sci_shutdown()
2191 mctrl_gpio_disable_ms(to_sci_port(port)->gpios); in sci_shutdown()
2193 spin_lock_irqsave(&port->lock, flags); in sci_shutdown()
2198 * and HSCIF TOT bits in sci_shutdown()
2202 (SCSCR_CKE1 | SCSCR_CKE0 | s->hscif_tot)); in sci_shutdown()
2203 spin_unlock_irqrestore(&port->lock, flags); in sci_shutdown()
2206 if (s->chan_rx_saved) { in sci_shutdown()
2207 dev_dbg(port->dev, "%s(%d) deleting rx_timer\n", __func__, in sci_shutdown()
2208 port->line); in sci_shutdown()
2209 hrtimer_cancel(&s->rx_timer); in sci_shutdown()
2213 if (s->rx_trigger > 1 && s->rx_fifo_timeout > 0) in sci_shutdown()
2214 del_timer_sync(&s->rx_fifo_timer); in sci_shutdown()
2222 unsigned long freq = s->clk_rates[SCI_SCK]; in sci_sck_calc()
2226 if (s->port.type != PORT_HSCIF) in sci_sck_calc()
2230 err = DIV_ROUND_CLOSEST(freq, sr) - bps; in sci_sck_calc()
2235 *srr = sr - 1; in sci_sck_calc()
2241 dev_dbg(s->port.dev, "SCK: %u%+d bps using SR %u\n", bps, min_err, in sci_sck_calc()
2253 if (s->port.type != PORT_HSCIF) in sci_brg_calc()
2260 err = DIV_ROUND_CLOSEST(freq, sr * dl) - bps; in sci_brg_calc()
2266 *srr = sr - 1; in sci_brg_calc()
2272 dev_dbg(s->port.dev, "BRG: %u%+d bps using DL %u SR %u\n", bps, in sci_brg_calc()
2282 unsigned long freq = s->clk_rates[SCI_FCK]; in sci_scbrr_calc()
2286 if (s->port.type != PORT_HSCIF) in sci_scbrr_calc()
2300 * M = |(0.5 - 1 / 2 * N) - ((L - 0.5) * F) - in sci_scbrr_calc()
2301 * (|D - 0.5| / N * (1 + F))| in sci_scbrr_calc()
2306 /* integerized formulas from HSCIF documentation */ in sci_scbrr_calc()
2313 * err = freq / (br * prediv) - bps in sci_scbrr_calc()
2325 err = DIV_ROUND_CLOSEST(freq, br * prediv) - bps; in sci_scbrr_calc()
2330 *brr = br - 1; in sci_scbrr_calc()
2331 *srr = sr - 1; in sci_scbrr_calc()
2340 dev_dbg(s->port.dev, "BRR: %u%+d bps using N %u SR %u cks %u\n", bps, in sci_scbrr_calc()
2351 serial_port_out(port, SCSCR, s->hscif_tot); /* TE=0, RE=0, CKE1=0 */ in sci_reset()
2354 if (reg->size) in sci_reset()
2360 if (sci_getreg(port, SCLSR)->size) { in sci_reset()
2366 if (s->rx_trigger > 1) { in sci_reset()
2367 if (s->rx_fifo_timeout) { in sci_reset()
2369 timer_setup(&s->rx_fifo_timer, rx_fifo_timer_fn, 0); in sci_reset()
2371 if (port->type == PORT_SCIFA || in sci_reset()
2372 port->type == PORT_SCIFB) in sci_reset()
2375 scif_set_rtrg(port, s->rx_trigger); in sci_reset()
2390 int best_clk = -1; in sci_set_termios()
2393 if ((termios->c_cflag & CSIZE) == CS7) in sci_set_termios()
2395 if (termios->c_cflag & PARENB) in sci_set_termios()
2397 if (termios->c_cflag & PARODD) in sci_set_termios()
2399 if (termios->c_cflag & CSTOPB) in sci_set_termios()
2403 * earlyprintk comes here early on with port->uartclk set to zero. in sci_set_termios()
2406 * the baud rate is not programmed during earlyprintk - it is assumed in sci_set_termios()
2410 if (!port->uartclk) { in sci_set_termios()
2416 max_freq = max(max_freq, s->clk_rates[i]); in sci_set_termios()
2428 if (s->clk_rates[SCI_SCK] && port->type != PORT_SCIFA && in sci_set_termios()
2429 port->type != PORT_SCIFB) { in sci_set_termios()
2443 if (s->clk_rates[SCI_SCIF_CLK] && sci_getreg(port, SCDL)->size) { in sci_set_termios()
2444 err = sci_brg_calc(s, baud, s->clk_rates[SCI_SCIF_CLK], &dl1, in sci_set_termios()
2459 if (s->clk_rates[SCI_BRG_INT] && sci_getreg(port, SCDL)->size) { in sci_set_termios()
2460 err = sci_brg_calc(s, baud, s->clk_rates[SCI_BRG_INT], &dl1, in sci_set_termios()
2487 dev_dbg(port->dev, "Using clk %pC for %u%+d bps\n", in sci_set_termios()
2488 s->clks[best_clk], baud, min_err); in sci_set_termios()
2496 if (best_clk >= 0 && sci_getreg(port, SCCKS)->size) { in sci_set_termios()
2501 spin_lock_irqsave(&port->lock, flags); in sci_set_termios()
2505 uart_update_timeout(port, termios->c_cflag, baud); in sci_set_termios()
2508 bits = tty_get_frame_size(termios->c_cflag); in sci_set_termios()
2510 if (sci_getreg(port, SEMR)->size) in sci_set_termios()
2514 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) in sci_set_termios()
2526 serial_port_out(port, SCSCR, scr_val | s->hscif_tot); in sci_set_termios()
2529 if (sci_getreg(port, HSSRR)->size) { in sci_set_termios()
2534 int last_stop = bits * 2 - 1; in sci_set_termios()
2544 int shift = clamp(deviation / 2, -8, 7); in sci_set_termios()
2554 udelay((1000000 + (baud - 1)) / baud); in sci_set_termios()
2557 scr_val = s->cfg->scscr & (SCSCR_CKE1 | SCSCR_CKE0); in sci_set_termios()
2560 serial_port_out(port, SCSCR, scr_val | s->hscif_tot); in sci_set_termios()
2564 sci_init_pins(port, termios->c_cflag); in sci_set_termios()
2566 port->status &= ~UPSTAT_AUTOCTS; in sci_set_termios()
2567 s->autorts = false; in sci_set_termios()
2569 if (reg->size) { in sci_set_termios()
2572 if ((port->flags & UPF_HARD_FLOW) && in sci_set_termios()
2573 (termios->c_cflag & CRTSCTS)) { in sci_set_termios()
2575 port->status |= UPSTAT_AUTOCTS; in sci_set_termios()
2577 s->autorts = true; in sci_set_termios()
2589 if (port->flags & UPF_HARD_FLOW) { in sci_set_termios()
2591 sci_set_mctrl(port, port->mctrl); in sci_set_termios()
2595 (s->cfg->scscr & ~(SCSCR_CKE1 | SCSCR_CKE0)); in sci_set_termios()
2596 serial_port_out(port, SCSCR, scr_val | s->hscif_tot); in sci_set_termios()
2598 (port->type == PORT_SCIFA || port->type == PORT_SCIFB)) { in sci_set_termios()
2609 s->rx_frame = (10000 * bits) / (baud / 100); in sci_set_termios()
2611 s->rx_timeout = s->buf_len_rx * 2 * s->rx_frame; in sci_set_termios()
2614 if ((termios->c_cflag & CREAD) != 0) in sci_set_termios()
2617 spin_unlock_irqrestore(&port->lock, flags); in sci_set_termios()
2621 if (UART_ENABLE_MS(port, termios->c_cflag)) in sci_set_termios()
2642 switch (port->type) { in sci_type()
2654 return "hscif"; in sci_type()
2667 if (port->membase) in sci_remap_port()
2670 if (port->dev->of_node || (port->flags & UPF_IOREMAP)) { in sci_remap_port()
2671 port->membase = ioremap(port->mapbase, sport->reg_size); in sci_remap_port()
2672 if (unlikely(!port->membase)) { in sci_remap_port()
2673 dev_err(port->dev, "can't remap port#%d\n", port->line); in sci_remap_port()
2674 return -ENXIO; in sci_remap_port()
2682 port->membase = (void __iomem *)(uintptr_t)port->mapbase; in sci_remap_port()
2692 if (port->dev->of_node || (port->flags & UPF_IOREMAP)) { in sci_release_port()
2693 iounmap(port->membase); in sci_release_port()
2694 port->membase = NULL; in sci_release_port()
2697 release_mem_region(port->mapbase, sport->reg_size); in sci_release_port()
2706 res = request_mem_region(port->mapbase, sport->reg_size, in sci_request_port()
2707 dev_name(port->dev)); in sci_request_port()
2709 dev_err(port->dev, "request_mem_region failed."); in sci_request_port()
2710 return -EBUSY; in sci_request_port()
2727 port->type = sport->cfg->type; in sci_config_port()
2734 if (ser->baud_base < 2400) in sci_verify_port()
2736 return -EINVAL; in sci_verify_port()
2777 if (sci_port->cfg->type == PORT_HSCIF) in sci_init_clocks()
2782 if (PTR_ERR(clk) == -EPROBE_DEFER) in sci_init_clocks()
2783 return -EPROBE_DEFER; in sci_init_clocks()
2791 if (PTR_ERR(clk) == -EPROBE_DEFER) in sci_init_clocks()
2792 return -EPROBE_DEFER; in sci_init_clocks()
2818 sci_port->clks[i] = IS_ERR(clk) ? NULL : clk; in sci_init_clocks()
2828 if (cfg->regtype != SCIx_PROBE_REGTYPE) in sci_probe_regmap()
2829 return &sci_port_params[cfg->regtype]; in sci_probe_regmap()
2831 switch (cfg->type) { in sci_probe_regmap()
2846 * The SH-4 is a bit of a misnomer here, although that's in sci_probe_regmap()
2868 struct uart_port *port = &sci_port->port; in sci_init_single()
2873 sci_port->cfg = p; in sci_init_single()
2875 port->ops = &sci_uart_ops; in sci_init_single()
2876 port->iotype = UPIO_MEM; in sci_init_single()
2877 port->line = index; in sci_init_single()
2878 port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_SH_SCI_CONSOLE); in sci_init_single()
2882 return -ENOMEM; in sci_init_single()
2884 port->mapbase = res->start; in sci_init_single()
2885 sci_port->reg_size = resource_size(res); in sci_init_single()
2887 for (i = 0; i < ARRAY_SIZE(sci_port->irqs); ++i) { in sci_init_single()
2889 sci_port->irqs[i] = platform_get_irq_optional(dev, i); in sci_init_single()
2891 sci_port->irqs[i] = platform_get_irq(dev, i); in sci_init_single()
2897 * In the non-muxed case, up to 6 interrupt signals might be generated in sci_init_single()
2901 if (sci_port->irqs[0] < 0) in sci_init_single()
2902 return -ENXIO; in sci_init_single()
2904 if (sci_port->irqs[1] < 0) in sci_init_single()
2905 for (i = 1; i < ARRAY_SIZE(sci_port->irqs); i++) in sci_init_single()
2906 sci_port->irqs[i] = sci_port->irqs[0]; in sci_init_single()
2908 sci_port->params = sci_probe_regmap(p); in sci_init_single()
2909 if (unlikely(sci_port->params == NULL)) in sci_init_single()
2910 return -EINVAL; in sci_init_single()
2912 switch (p->type) { in sci_init_single()
2914 sci_port->rx_trigger = 48; in sci_init_single()
2917 sci_port->rx_trigger = 64; in sci_init_single()
2920 sci_port->rx_trigger = 32; in sci_init_single()
2923 if (p->regtype == SCIx_SH7705_SCIF_REGTYPE) in sci_init_single()
2925 sci_port->rx_trigger = 1; in sci_init_single()
2927 sci_port->rx_trigger = 8; in sci_init_single()
2930 sci_port->rx_trigger = 1; in sci_init_single()
2934 sci_port->rx_fifo_timeout = 0; in sci_init_single()
2935 sci_port->hscif_tot = 0; in sci_init_single()
2941 sci_port->sampling_rate_mask = p->sampling_rate in sci_init_single()
2942 ? SCI_SR(p->sampling_rate) in sci_init_single()
2943 : sci_port->params->sampling_rate_mask; in sci_init_single()
2946 ret = sci_init_clocks(sci_port, &dev->dev); in sci_init_single()
2950 port->dev = &dev->dev; in sci_init_single()
2952 pm_runtime_enable(&dev->dev); in sci_init_single()
2955 port->type = p->type; in sci_init_single()
2956 port->flags = UPF_FIXED_PORT | UPF_BOOT_AUTOCONF | p->flags; in sci_init_single()
2957 port->fifosize = sci_port->params->fifosize; in sci_init_single()
2959 if (port->type == PORT_SCI) { in sci_init_single()
2960 if (sci_port->reg_size >= 0x20) in sci_init_single()
2961 port->regshift = 2; in sci_init_single()
2963 port->regshift = 1; in sci_init_single()
2968 * for the multi-IRQ ports, which is where we are primarily in sci_init_single()
2973 port->irq = sci_port->irqs[SCIx_RXI_IRQ]; in sci_init_single()
2974 port->irqflags = 0; in sci_init_single()
2976 port->serial_in = sci_serial_in; in sci_init_single()
2977 port->serial_out = sci_serial_out; in sci_init_single()
2984 pm_runtime_disable(port->port.dev); in sci_cleanup_single()
3001 struct sci_port *sci_port = &sci_ports[co->index]; in serial_console_write()
3002 struct uart_port *port = &sci_port->port; in serial_console_write()
3007 if (port->sysrq) in serial_console_write()
3010 locked = spin_trylock_irqsave(&port->lock, flags); in serial_console_write()
3012 spin_lock_irqsave(&port->lock, flags); in serial_console_write()
3017 (sci_port->cfg->scscr & ~(SCSCR_CKE1 | SCSCR_CKE0)) | in serial_console_write()
3019 serial_port_out(port, SCSCR, ctrl_temp | sci_port->hscif_tot); in serial_console_write()
3032 spin_unlock_irqrestore(&port->lock, flags); in serial_console_write()
3048 if (co->index < 0 || co->index >= SCI_NPORTS) in serial_console_setup()
3049 return -ENODEV; in serial_console_setup()
3051 sci_port = &sci_ports[co->index]; in serial_console_setup()
3052 port = &sci_port->port; in serial_console_setup()
3057 if (!port->ops) in serial_console_setup()
3058 return -ENODEV; in serial_console_setup()
3076 .index = -1,
3085 .index = -1,
3092 const struct plat_sci_port *cfg = dev_get_platdata(&pdev->dev); in sci_probe_earlyprintk()
3095 return -EEXIST; in sci_probe_earlyprintk()
3097 early_serial_console.index = pdev->id; in sci_probe_earlyprintk()
3099 sci_init_single(pdev, &sci_ports[pdev->id], pdev->id, cfg, true); in sci_probe_earlyprintk()
3116 return -EINVAL; in sci_probe_earlyprintk()
3139 unsigned int type = port->port.type; /* uart_remove_... clears it */ in sci_remove()
3141 sci_ports_in_use &= ~BIT(port->port.line); in sci_remove()
3142 uart_remove_one_port(&sci_uart_driver, &port->port); in sci_remove()
3146 if (port->port.fifosize > 1) in sci_remove()
3147 device_remove_file(&dev->dev, &dev_attr_rx_fifo_trigger); in sci_remove()
3149 device_remove_file(&dev->dev, &dev_attr_rx_fifo_timeout); in sci_remove()
3160 /* SoC-specific types */
3162 .compatible = "renesas,scif-r7s72100",
3166 .compatible = "renesas,scif-r7s9210",
3170 .compatible = "renesas,scif-r9a07g044",
3173 /* Family-specific types */
3175 .compatible = "renesas,rcar-gen1-scif",
3178 .compatible = "renesas,rcar-gen2-scif",
3181 .compatible = "renesas,rcar-gen3-scif",
3195 .compatible = "renesas,hscif",
3209 struct device_node *np = pdev->dev.of_node; in sci_parse_dt()
3218 data = of_device_get_match_data(&pdev->dev); in sci_parse_dt()
3220 p = devm_kzalloc(&pdev->dev, sizeof(struct plat_sci_port), GFP_KERNEL); in sci_parse_dt()
3229 dev_err(&pdev->dev, "failed to get alias id (%d)\n", id); in sci_parse_dt()
3233 dev_err(&pdev->dev, "serial%d out of range\n", id); in sci_parse_dt()
3240 p->type = SCI_OF_TYPE(data); in sci_parse_dt()
3241 p->regtype = SCI_OF_REGTYPE(data); in sci_parse_dt()
3243 sp->has_rtscts = of_property_read_bool(np, "uart-has-rtscts"); in sci_parse_dt()
3257 dev_notice(&dev->dev, "Attempting to register port %d when only %d are available\n", in sci_probe_single()
3259 dev_notice(&dev->dev, "Consider bumping CONFIG_SERIAL_SH_SCI_NR_UARTS!\n"); in sci_probe_single()
3260 return -EINVAL; in sci_probe_single()
3264 return -EBUSY; in sci_probe_single()
3280 sciport->gpios = mctrl_gpio_init(&sciport->port, 0); in sci_probe_single()
3281 if (IS_ERR(sciport->gpios)) in sci_probe_single()
3282 return PTR_ERR(sciport->gpios); in sci_probe_single()
3284 if (sciport->has_rtscts) { in sci_probe_single()
3285 if (mctrl_gpio_to_gpiod(sciport->gpios, UART_GPIO_CTS) || in sci_probe_single()
3286 mctrl_gpio_to_gpiod(sciport->gpios, UART_GPIO_RTS)) { in sci_probe_single()
3287 dev_err(&dev->dev, "Conflicting RTS/CTS config\n"); in sci_probe_single()
3288 return -EINVAL; in sci_probe_single()
3290 sciport->port.flags |= UPF_HARD_FLOW; in sci_probe_single()
3293 ret = uart_add_one_port(&sci_uart_driver, &sciport->port); in sci_probe_single()
3319 if (dev->dev.of_node) { in sci_probe()
3322 return -EINVAL; in sci_probe()
3324 p = dev->dev.platform_data; in sci_probe()
3326 dev_err(&dev->dev, "no platform data supplied\n"); in sci_probe()
3327 return -EINVAL; in sci_probe()
3330 dev_id = dev->id; in sci_probe()
3340 if (sp->port.fifosize > 1) { in sci_probe()
3341 ret = device_create_file(&dev->dev, &dev_attr_rx_fifo_trigger); in sci_probe()
3345 if (sp->port.type == PORT_SCIFA || sp->port.type == PORT_SCIFB || in sci_probe()
3346 sp->port.type == PORT_HSCIF) { in sci_probe()
3347 ret = device_create_file(&dev->dev, &dev_attr_rx_fifo_timeout); in sci_probe()
3349 if (sp->port.fifosize > 1) { in sci_probe()
3350 device_remove_file(&dev->dev, in sci_probe()
3370 uart_suspend_port(&sci_uart_driver, &sport->port); in sci_suspend()
3380 uart_resume_port(&sci_uart_driver, &sport->port); in sci_resume()
3391 .name = "sh-sci",
3422 if (!device->port.membase) in early_console_setup()
3423 return -ENODEV; in early_console_setup()
3425 device->port.serial_in = sci_serial_in; in early_console_setup()
3426 device->port.serial_out = sci_serial_out; in early_console_setup()
3427 device->port.type = type; in early_console_setup()
3428 memcpy(&sci_ports[0].port, &device->port, sizeof(struct uart_port)); in early_console_setup()
3436 device->con->write = serial_console_write; in early_console_setup()
3474 OF_EARLYCON_DECLARE(scif, "renesas,scif-r7s9210", rzscifa_early_console_setup);
3475 OF_EARLYCON_DECLARE(scif, "renesas,scif-r9a07g044", rzscifa_early_console_setup);
3478 OF_EARLYCON_DECLARE(hscif, "renesas,hscif", hscif_early_console_setup);
3485 MODULE_ALIAS("platform:sh-sci");