Lines Matching refs:SC16IS7XX_LCR_REG
38 #define SC16IS7XX_LCR_REG (0x03) /* Line Control */ macro
518 lcr = sc16is7xx_port_read(port, SC16IS7XX_LCR_REG); in sc16is7xx_set_baud()
521 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, in sc16is7xx_set_baud()
531 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, lcr); in sc16is7xx_set_baud()
540 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, in sc16is7xx_set_baud()
550 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, lcr); in sc16is7xx_set_baud()
854 sc16is7xx_port_update(port, SC16IS7XX_LCR_REG, in sc16is7xx_break_ctl()
920 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, in sc16is7xx_set_termios()
939 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, lcr); in sc16is7xx_set_termios()
1004 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, in sc16is7xx_startup()
1027 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, SC16IS7XX_LCR_WORD_LEN_8); in sc16is7xx_startup()
1300 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_LCR_REG, in sc16is7xx_probe()
1312 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_LCR_REG, 0x00); in sc16is7xx_probe()