Lines Matching +full:rs485 +full:- +full:rx +full:- +full:during +full:- +full:tx
1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for OMAP-UART controller.
16 * this driver as required for the omap-platform.
37 #include <linux/platform_data/serial-omap.h>
78 #define OMAP_UART_DMA_CH_FREE -1
107 * Buffer for rx dma. It is not required for tx because the buffer
117 /* timer to poll activity on rx dma */
175 offset <<= up->port.regshift; in serial_in()
176 return readw(up->port.membase + offset); in serial_in()
181 offset <<= up->port.regshift; in serial_out()
182 writew(value, up->port.membase + offset); in serial_out()
196 struct omap_uart_port_info *pdata = dev_get_platdata(up->dev); in serial_omap_get_context_loss_count()
198 if (!pdata || !pdata->get_context_loss_count) in serial_omap_get_context_loss_count()
199 return -EINVAL; in serial_omap_get_context_loss_count()
201 return pdata->get_context_loss_count(up->dev); in serial_omap_get_context_loss_count()
207 struct omap_uart_port_info *pdata = dev_get_platdata(up->dev); in serial_omap_enable_wakeup()
209 if (!pdata || !pdata->enable_wakeup) in serial_omap_enable_wakeup()
212 pdata->enable_wakeup(up->dev, enable); in serial_omap_enable_wakeup()
223 unsigned int n = port->uartclk / (mode * baud); in calculate_baud_abs_diff()
229 abs_diff = baud - (port->uartclk / (mode * n)); in calculate_baud_abs_diff()
231 abs_diff = -abs_diff; in calculate_baud_abs_diff()
237 * serial_omap_baud_is_mode16 - check if baud rate is MODE16X
257 * serial_omap_get_divisor - calculate divisor value
270 return port->uartclk/(mode * baud); in serial_omap_get_divisor()
277 dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n", up->port.line); in serial_omap_enable_ms()
279 up->ier |= UART_IER_MSI; in serial_omap_enable_ms()
280 serial_out(up, UART_IER, up->ier); in serial_omap_enable_ms()
288 /* Handle RS-485 */ in serial_omap_stop_tx()
289 if (port->rs485.flags & SER_RS485_ENABLED) { in serial_omap_stop_tx()
290 if (up->scr & OMAP_UART_SCR_TX_EMPTY) { in serial_omap_stop_tx()
291 /* THR interrupt is fired when both TX FIFO and TX in serial_omap_stop_tx()
294 * is fired when TX FIFO is below the trigger level, in serial_omap_stop_tx()
295 * disable THR interrupts and toggle the RS-485 GPIO in serial_omap_stop_tx()
298 up->scr &= ~OMAP_UART_SCR_TX_EMPTY; in serial_omap_stop_tx()
299 serial_out(up, UART_OMAP_SCR, up->scr); in serial_omap_stop_tx()
300 res = (port->rs485.flags & SER_RS485_RTS_AFTER_SEND) ? in serial_omap_stop_tx()
302 if (up->rts_gpiod && in serial_omap_stop_tx()
303 gpiod_get_value(up->rts_gpiod) != res) { in serial_omap_stop_tx()
304 if (port->rs485.delay_rts_after_send > 0) in serial_omap_stop_tx()
306 port->rs485.delay_rts_after_send); in serial_omap_stop_tx()
307 gpiod_set_value(up->rts_gpiod, res); in serial_omap_stop_tx()
312 * when both TX FIFO and TX shift register are empty. in serial_omap_stop_tx()
318 up->scr |= OMAP_UART_SCR_TX_EMPTY; in serial_omap_stop_tx()
319 serial_out(up, UART_OMAP_SCR, up->scr); in serial_omap_stop_tx()
324 if (up->ier & UART_IER_THRI) { in serial_omap_stop_tx()
325 up->ier &= ~UART_IER_THRI; in serial_omap_stop_tx()
326 serial_out(up, UART_IER, up->ier); in serial_omap_stop_tx()
334 up->ier &= ~(UART_IER_RLSI | UART_IER_RDI); in serial_omap_stop_rx()
335 up->port.read_status_mask &= ~UART_LSR_DR; in serial_omap_stop_rx()
336 serial_out(up, UART_IER, up->ier); in serial_omap_stop_rx()
341 struct circ_buf *xmit = &up->port.state->xmit; in transmit_chars()
344 if (up->port.x_char) { in transmit_chars()
345 serial_out(up, UART_TX, up->port.x_char); in transmit_chars()
346 up->port.icount.tx++; in transmit_chars()
347 up->port.x_char = 0; in transmit_chars()
348 if ((up->port.rs485.flags & SER_RS485_ENABLED) && in transmit_chars()
349 !(up->port.rs485.flags & SER_RS485_RX_DURING_TX)) in transmit_chars()
350 up->rs485_tx_filter_count++; in transmit_chars()
354 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { in transmit_chars()
355 serial_omap_stop_tx(&up->port); in transmit_chars()
358 count = up->port.fifosize / 4; in transmit_chars()
360 serial_out(up, UART_TX, xmit->buf[xmit->tail]); in transmit_chars()
361 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); in transmit_chars()
362 up->port.icount.tx++; in transmit_chars()
363 if ((up->port.rs485.flags & SER_RS485_ENABLED) && in transmit_chars()
364 !(up->port.rs485.flags & SER_RS485_RX_DURING_TX)) in transmit_chars()
365 up->rs485_tx_filter_count++; in transmit_chars()
369 } while (--count > 0); in transmit_chars()
372 uart_write_wakeup(&up->port); in transmit_chars()
375 serial_omap_stop_tx(&up->port); in transmit_chars()
380 if (!(up->ier & UART_IER_THRI)) { in serial_omap_enable_ier_thri()
381 up->ier |= UART_IER_THRI; in serial_omap_enable_ier_thri()
382 serial_out(up, UART_IER, up->ier); in serial_omap_enable_ier_thri()
391 /* Handle RS-485 */ in serial_omap_start_tx()
392 if (port->rs485.flags & SER_RS485_ENABLED) { in serial_omap_start_tx()
394 up->scr &= ~OMAP_UART_SCR_TX_EMPTY; in serial_omap_start_tx()
395 serial_out(up, UART_OMAP_SCR, up->scr); in serial_omap_start_tx()
398 res = (port->rs485.flags & SER_RS485_RTS_ON_SEND) ? 1 : 0; in serial_omap_start_tx()
399 if (up->rts_gpiod && gpiod_get_value(up->rts_gpiod) != res) { in serial_omap_start_tx()
400 gpiod_set_value(up->rts_gpiod, res); in serial_omap_start_tx()
401 if (port->rs485.delay_rts_before_send > 0) in serial_omap_start_tx()
402 mdelay(port->rs485.delay_rts_before_send); in serial_omap_start_tx()
406 if ((port->rs485.flags & SER_RS485_ENABLED) && in serial_omap_start_tx()
407 !(port->rs485.flags & SER_RS485_RX_DURING_TX)) in serial_omap_start_tx()
408 up->rs485_tx_filter_count = 0; in serial_omap_start_tx()
418 spin_lock_irqsave(&up->port.lock, flags); in serial_omap_throttle()
419 up->ier &= ~(UART_IER_RLSI | UART_IER_RDI); in serial_omap_throttle()
420 serial_out(up, UART_IER, up->ier); in serial_omap_throttle()
421 spin_unlock_irqrestore(&up->port.lock, flags); in serial_omap_throttle()
429 spin_lock_irqsave(&up->port.lock, flags); in serial_omap_unthrottle()
430 up->ier |= UART_IER_RLSI | UART_IER_RDI; in serial_omap_unthrottle()
431 serial_out(up, UART_IER, up->ier); in serial_omap_unthrottle()
432 spin_unlock_irqrestore(&up->port.lock, flags); in serial_omap_unthrottle()
440 status |= up->msr_saved_flags; in check_modem_status()
441 up->msr_saved_flags = 0; in check_modem_status()
445 if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI && in check_modem_status()
446 up->port.state != NULL) { in check_modem_status()
448 up->port.icount.rng++; in check_modem_status()
450 up->port.icount.dsr++; in check_modem_status()
453 (&up->port, status & UART_MSR_DCD); in check_modem_status()
456 (&up->port, status & UART_MSR_CTS); in check_modem_status()
457 wake_up_interruptible(&up->port.state->port.delta_msr_wait); in check_modem_status()
469 * to the table 23-246 of the omap4 TRM. in serial_omap_rlsi()
473 if ((up->port.rs485.flags & SER_RS485_ENABLED) && in serial_omap_rlsi()
474 !(up->port.rs485.flags & SER_RS485_RX_DURING_TX) && in serial_omap_rlsi()
475 up->rs485_tx_filter_count) in serial_omap_rlsi()
476 up->rs485_tx_filter_count--; in serial_omap_rlsi()
479 up->port.icount.rx++; in serial_omap_rlsi()
485 up->port.icount.brk++; in serial_omap_rlsi()
492 if (uart_handle_break(&up->port)) in serial_omap_rlsi()
499 up->port.icount.parity++; in serial_omap_rlsi()
504 up->port.icount.frame++; in serial_omap_rlsi()
508 up->port.icount.overrun++; in serial_omap_rlsi()
511 if (up->port.line == up->port.cons->index) { in serial_omap_rlsi()
513 lsr |= up->lsr_break_flag; in serial_omap_rlsi()
516 uart_insert_char(&up->port, lsr, UART_LSR_OE, 0, flag); in serial_omap_rlsi()
528 if ((up->port.rs485.flags & SER_RS485_ENABLED) && in serial_omap_rdi()
529 !(up->port.rs485.flags & SER_RS485_RX_DURING_TX) && in serial_omap_rdi()
530 up->rs485_tx_filter_count) { in serial_omap_rdi()
531 up->rs485_tx_filter_count--; in serial_omap_rdi()
536 up->port.icount.rx++; in serial_omap_rdi()
538 if (uart_handle_sysrq_char(&up->port, ch)) in serial_omap_rdi()
541 uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag); in serial_omap_rdi()
545 * serial_omap_irq() - This handles the interrupt from one port
557 spin_lock(&up->port.lock); in serial_omap_irq()
591 } while (max_count--); in serial_omap_irq()
593 spin_unlock(&up->port.lock); in serial_omap_irq()
595 tty_flip_buffer_push(&up->port.state->port); in serial_omap_irq()
597 up->port_activity = jiffies; in serial_omap_irq()
608 dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->port.line); in serial_omap_tx_empty()
609 spin_lock_irqsave(&up->port.lock, flags); in serial_omap_tx_empty()
611 spin_unlock_irqrestore(&up->port.lock, flags); in serial_omap_tx_empty()
624 dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n", up->port.line); in serial_omap_get_mctrl()
642 dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n", up->port.line); in serial_omap_set_mctrl()
657 up->mcr = old_mcr | mcr; in serial_omap_set_mctrl()
658 serial_out(up, UART_MCR, up->mcr); in serial_omap_set_mctrl()
663 if ((mctrl & TIOCM_RTS) && (port->status & UPSTAT_AUTORTS)) in serial_omap_set_mctrl()
664 up->efr |= UART_EFR_RTS; in serial_omap_set_mctrl()
666 up->efr &= ~UART_EFR_RTS; in serial_omap_set_mctrl()
667 serial_out(up, UART_EFR, up->efr); in serial_omap_set_mctrl()
676 dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->port.line); in serial_omap_break_ctl()
677 spin_lock_irqsave(&up->port.lock, flags); in serial_omap_break_ctl()
678 if (break_state == -1) in serial_omap_break_ctl()
679 up->lcr |= UART_LCR_SBC; in serial_omap_break_ctl()
681 up->lcr &= ~UART_LCR_SBC; in serial_omap_break_ctl()
682 serial_out(up, UART_LCR, up->lcr); in serial_omap_break_ctl()
683 spin_unlock_irqrestore(&up->port.lock, flags); in serial_omap_break_ctl()
695 retval = request_irq(up->port.irq, serial_omap_irq, up->port.irqflags, in serial_omap_startup()
696 up->name, up); in serial_omap_startup()
700 /* Optional wake-up IRQ */ in serial_omap_startup()
701 if (up->wakeirq) { in serial_omap_startup()
702 retval = dev_pm_set_dedicated_wake_irq(up->dev, up->wakeirq); in serial_omap_startup()
704 free_irq(up->port.irq, up); in serial_omap_startup()
709 dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->port.line); in serial_omap_startup()
711 pm_runtime_get_sync(up->dev); in serial_omap_startup()
731 spin_lock_irqsave(&up->port.lock, flags); in serial_omap_startup()
735 up->port.mctrl |= TIOCM_OUT2; in serial_omap_startup()
736 serial_omap_set_mctrl(&up->port, up->port.mctrl); in serial_omap_startup()
737 spin_unlock_irqrestore(&up->port.lock, flags); in serial_omap_startup()
739 up->msr_saved_flags = 0; in serial_omap_startup()
745 up->ier = UART_IER_RLSI | UART_IER_RDI; in serial_omap_startup()
746 serial_out(up, UART_IER, up->ier); in serial_omap_startup()
749 up->wer = OMAP_UART_WER_MOD_WKUP; in serial_omap_startup()
750 if (up->features & OMAP_UART_WER_HAS_TX_WAKEUP) in serial_omap_startup()
751 up->wer |= OMAP_UART_TX_WAKEUP_EN; in serial_omap_startup()
753 serial_out(up, UART_OMAP_WER, up->wer); in serial_omap_startup()
755 up->port_activity = jiffies; in serial_omap_startup()
764 dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n", up->port.line); in serial_omap_shutdown()
769 up->ier = 0; in serial_omap_shutdown()
772 spin_lock_irqsave(&up->port.lock, flags); in serial_omap_shutdown()
773 up->port.mctrl &= ~TIOCM_OUT2; in serial_omap_shutdown()
774 serial_omap_set_mctrl(&up->port, up->port.mctrl); in serial_omap_shutdown()
775 spin_unlock_irqrestore(&up->port.lock, flags); in serial_omap_shutdown()
789 pm_runtime_put_sync(up->dev); in serial_omap_shutdown()
790 free_irq(up->port.irq, up); in serial_omap_shutdown()
791 dev_pm_clear_wake_irq(up->dev); in serial_omap_shutdown()
799 cpu_latency_qos_update_request(&up->pm_qos_request, up->latency); in serial_omap_uart_qos_work()
811 switch (termios->c_cflag & CSIZE) { in serial_omap_set_termios()
827 if (termios->c_cflag & CSTOPB) in serial_omap_set_termios()
829 if (termios->c_cflag & PARENB) in serial_omap_set_termios()
831 if (!(termios->c_cflag & PARODD)) in serial_omap_set_termios()
833 if (termios->c_cflag & CMSPAR) in serial_omap_set_termios()
840 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/13); in serial_omap_set_termios()
844 up->calc_latency = (USEC_PER_SEC * up->port.fifosize) / (baud / 8); in serial_omap_set_termios()
845 up->latency = up->calc_latency; in serial_omap_set_termios()
846 schedule_work(&up->qos_work); in serial_omap_set_termios()
848 up->dll = quot & 0xff; in serial_omap_set_termios()
849 up->dlh = quot >> 8; in serial_omap_set_termios()
850 up->mdr1 = UART_OMAP_MDR1_DISABLE; in serial_omap_set_termios()
852 up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 | in serial_omap_set_termios()
859 spin_lock_irqsave(&up->port.lock, flags); in serial_omap_set_termios()
862 * Update the per-port timeout. in serial_omap_set_termios()
864 uart_update_timeout(port, termios->c_cflag, baud); in serial_omap_set_termios()
866 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; in serial_omap_set_termios()
867 if (termios->c_iflag & INPCK) in serial_omap_set_termios()
868 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE; in serial_omap_set_termios()
869 if (termios->c_iflag & (BRKINT | PARMRK)) in serial_omap_set_termios()
870 up->port.read_status_mask |= UART_LSR_BI; in serial_omap_set_termios()
875 up->port.ignore_status_mask = 0; in serial_omap_set_termios()
876 if (termios->c_iflag & IGNPAR) in serial_omap_set_termios()
877 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; in serial_omap_set_termios()
878 if (termios->c_iflag & IGNBRK) { in serial_omap_set_termios()
879 up->port.ignore_status_mask |= UART_LSR_BI; in serial_omap_set_termios()
884 if (termios->c_iflag & IGNPAR) in serial_omap_set_termios()
885 up->port.ignore_status_mask |= UART_LSR_OE; in serial_omap_set_termios()
891 if ((termios->c_cflag & CREAD) == 0) in serial_omap_set_termios()
892 up->port.ignore_status_mask |= UART_LSR_DR; in serial_omap_set_termios()
897 up->ier &= ~UART_IER_MSI; in serial_omap_set_termios()
898 if (UART_ENABLE_MS(&up->port, termios->c_cflag)) in serial_omap_set_termios()
899 up->ier |= UART_IER_MSI; in serial_omap_set_termios()
900 serial_out(up, UART_IER, up->ier); in serial_omap_set_termios()
902 up->lcr = cval; in serial_omap_set_termios()
903 up->scr = 0; in serial_omap_set_termios()
918 up->efr = serial_in(up, UART_EFR) & ~UART_EFR_ECB; in serial_omap_set_termios()
919 up->efr &= ~UART_EFR_SCD; in serial_omap_set_termios()
920 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); in serial_omap_set_termios()
923 up->mcr = serial_in(up, UART_MCR) & ~UART_MCR_TCRTLR; in serial_omap_set_termios()
924 serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); in serial_omap_set_termios()
927 up->scr |= OMAP_UART_SCR_RX_TRIG_GRANU1_MASK; in serial_omap_set_termios()
930 * sets Enables the granularity of 1 for TRIGGER RX in serial_omap_set_termios()
931 * level. Along with setting RX FIFO trigger level in serial_omap_set_termios()
933 * to zero this will result RX FIFO threshold level in serial_omap_set_termios()
941 up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK; in serial_omap_set_termios()
942 up->fcr &= ~OMAP_UART_FCR_TX_FIFO_TRIG_MASK; in serial_omap_set_termios()
943 up->fcr |= UART_FCR6_R_TRIGGER_16 | UART_FCR6_T_TRIGGER_24 | in serial_omap_set_termios()
946 serial_out(up, UART_FCR, up->fcr); in serial_omap_set_termios()
949 serial_out(up, UART_OMAP_SCR, up->scr); in serial_omap_set_termios()
953 serial_out(up, UART_MCR, up->mcr); in serial_omap_set_termios()
955 serial_out(up, UART_EFR, up->efr); in serial_omap_set_termios()
960 if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) in serial_omap_set_termios()
961 serial_omap_mdr1_errataset(up, up->mdr1); in serial_omap_set_termios()
963 serial_out(up, UART_OMAP_MDR1, up->mdr1); in serial_omap_set_termios()
966 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); in serial_omap_set_termios()
972 serial_out(up, UART_DLL, up->dll); /* LS of divisor */ in serial_omap_set_termios()
973 serial_out(up, UART_DLM, up->dlh); /* MS of divisor */ in serial_omap_set_termios()
976 serial_out(up, UART_IER, up->ier); in serial_omap_set_termios()
979 serial_out(up, UART_EFR, up->efr); in serial_omap_set_termios()
983 up->mdr1 = UART_OMAP_MDR1_13X_MODE; in serial_omap_set_termios()
985 up->mdr1 = UART_OMAP_MDR1_16X_MODE; in serial_omap_set_termios()
987 if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) in serial_omap_set_termios()
988 serial_omap_mdr1_errataset(up, up->mdr1); in serial_omap_set_termios()
990 serial_out(up, UART_OMAP_MDR1, up->mdr1); in serial_omap_set_termios()
996 serial_out(up, UART_XON1, termios->c_cc[VSTART]); in serial_omap_set_termios()
997 serial_out(up, UART_XOFF1, termios->c_cc[VSTOP]); in serial_omap_set_termios()
1000 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); in serial_omap_set_termios()
1002 serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); in serial_omap_set_termios()
1006 up->port.status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS | UPSTAT_AUTOXOFF); in serial_omap_set_termios()
1008 if (termios->c_cflag & CRTSCTS && up->port.flags & UPF_HARD_FLOW) { in serial_omap_set_termios()
1010 up->port.status |= UPSTAT_AUTOCTS | UPSTAT_AUTORTS; in serial_omap_set_termios()
1011 up->efr |= UART_EFR_CTS; in serial_omap_set_termios()
1014 up->efr &= ~(UART_EFR_CTS | UART_EFR_RTS); in serial_omap_set_termios()
1017 if (up->port.flags & UPF_SOFT_FLOW) { in serial_omap_set_termios()
1019 up->efr &= OMAP_UART_SW_CLR; in serial_omap_set_termios()
1026 if (termios->c_iflag & IXON) in serial_omap_set_termios()
1027 up->efr |= OMAP_UART_SW_RX; in serial_omap_set_termios()
1034 if (termios->c_iflag & IXOFF) { in serial_omap_set_termios()
1035 up->port.status |= UPSTAT_AUTOXOFF; in serial_omap_set_termios()
1036 up->efr |= OMAP_UART_SW_TX; in serial_omap_set_termios()
1045 if (termios->c_iflag & IXANY) in serial_omap_set_termios()
1046 up->mcr |= UART_MCR_XONANY; in serial_omap_set_termios()
1048 up->mcr &= ~UART_MCR_XONANY; in serial_omap_set_termios()
1050 serial_out(up, UART_MCR, up->mcr); in serial_omap_set_termios()
1052 serial_out(up, UART_EFR, up->efr); in serial_omap_set_termios()
1053 serial_out(up, UART_LCR, up->lcr); in serial_omap_set_termios()
1055 serial_omap_set_mctrl(&up->port, up->port.mctrl); in serial_omap_set_termios()
1057 spin_unlock_irqrestore(&up->port.lock, flags); in serial_omap_set_termios()
1058 dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->port.line); in serial_omap_set_termios()
1068 dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->port.line); in serial_omap_pm()
1083 dev_dbg(port->dev, "serial_omap_release_port+\n"); in serial_omap_release_port()
1088 dev_dbg(port->dev, "serial_omap_request_port+\n"); in serial_omap_request_port()
1096 dev_dbg(up->port.dev, "serial_omap_config_port+%d\n", in serial_omap_config_port()
1097 up->port.line); in serial_omap_config_port()
1098 up->port.type = PORT_OMAP; in serial_omap_config_port()
1099 up->port.flags |= UPF_SOFT_FLOW | UPF_HARD_FLOW; in serial_omap_config_port()
1106 dev_dbg(port->dev, "serial_omap_verify_port+\n"); in serial_omap_verify_port()
1107 return -EINVAL; in serial_omap_verify_port()
1115 dev_dbg(up->port.dev, "serial_omap_type+%d\n", up->port.line); in serial_omap_type()
1116 return up->name; in serial_omap_type()
1130 up->lsr_break_flag = UART_LSR_BI; in wait_for_xmitr()
1132 if (--tmout == 0) in wait_for_xmitr()
1138 if (up->port.flags & UPF_CONS_FLOW) { in wait_for_xmitr()
1140 for (tmout = 1000000; tmout; tmout--) { in wait_for_xmitr()
1143 up->msr_saved_flags |= msr & MSR_SAVE_FLAGS; in wait_for_xmitr()
1186 offset <<= port->regshift; in omap_serial_early_in()
1187 return readw(port->membase + offset); in omap_serial_early_in()
1193 offset <<= port->regshift; in omap_serial_early_out()
1194 writew(value, port->membase + offset); in omap_serial_early_out()
1213 struct earlycon_device *device = console->data; in early_omap_serial_write()
1214 struct uart_port *port = &device->port; in early_omap_serial_write()
1222 struct uart_port *port = &device->port; in early_omap_serial_setup()
1224 if (!(device->port.membase || device->port.iobase)) in early_omap_serial_setup()
1225 return -ENODEV; in early_omap_serial_setup()
1227 port->regshift = 2; in early_omap_serial_setup()
1228 device->con->write = early_omap_serial_write; in early_omap_serial_setup()
1232 OF_EARLYCON_DECLARE(omapserial, "ti,omap2-uart", early_omap_serial_setup);
1233 OF_EARLYCON_DECLARE(omapserial, "ti,omap3-uart", early_omap_serial_setup);
1234 OF_EARLYCON_DECLARE(omapserial, "ti,omap4-uart", early_omap_serial_setup);
1253 struct uart_omap_port *up = serial_omap_console_ports[co->index]; in serial_omap_console_write()
1259 if (up->port.sysrq) in serial_omap_console_write()
1262 locked = spin_trylock(&up->port.lock); in serial_omap_console_write()
1264 spin_lock(&up->port.lock); in serial_omap_console_write()
1272 uart_console_write(&up->port, s, count, serial_omap_console_putchar); in serial_omap_console_write()
1287 if (up->msr_saved_flags) in serial_omap_console_write()
1291 spin_unlock(&up->port.lock); in serial_omap_console_write()
1304 if (serial_omap_console_ports[co->index] == NULL) in serial_omap_console_setup()
1305 return -ENODEV; in serial_omap_console_setup()
1306 up = serial_omap_console_ports[co->index]; in serial_omap_console_setup()
1311 return uart_set_options(&up->port, co, baud, parity, bits, flow); in serial_omap_console_setup()
1320 .index = -1,
1326 serial_omap_console_ports[up->port.line] = up; in serial_omap_add_console_port()
1340 /* Enable or disable the rs485 support */
1342 serial_omap_config_rs485(struct uart_port *port, struct serial_rs485 *rs485) in serial_omap_config_rs485() argument
1349 mode = up->ier; in serial_omap_config_rs485()
1350 up->ier = 0; in serial_omap_config_rs485()
1354 rs485->delay_rts_before_send = min(rs485->delay_rts_before_send, 100U); in serial_omap_config_rs485()
1355 rs485->delay_rts_after_send = min(rs485->delay_rts_after_send, 100U); in serial_omap_config_rs485()
1358 port->rs485 = *rs485; in serial_omap_config_rs485()
1360 if (up->rts_gpiod) { in serial_omap_config_rs485()
1362 val = (port->rs485.flags & SER_RS485_ENABLED) ? in serial_omap_config_rs485()
1364 val = (port->rs485.flags & val) ? 1 : 0; in serial_omap_config_rs485()
1365 gpiod_set_value(up->rts_gpiod, val); in serial_omap_config_rs485()
1369 up->ier = mode; in serial_omap_config_rs485()
1370 serial_out(up, UART_IER, up->ier); in serial_omap_config_rs485()
1372 /* If RS-485 is disabled, make sure the THR interrupt is fired when in serial_omap_config_rs485()
1373 * TX FIFO is below the trigger level. in serial_omap_config_rs485()
1375 if (!(port->rs485.flags & SER_RS485_ENABLED) && in serial_omap_config_rs485()
1376 (up->scr & OMAP_UART_SCR_TX_EMPTY)) { in serial_omap_config_rs485()
1377 up->scr &= ~OMAP_UART_SCR_TX_EMPTY; in serial_omap_config_rs485()
1378 serial_out(up, UART_OMAP_SCR, up->scr); in serial_omap_config_rs485()
1412 .driver_name = "OMAP-SERIAL",
1423 up->is_suspending = true; in serial_omap_prepare()
1432 up->is_suspending = false; in serial_omap_complete()
1439 uart_suspend_port(&serial_omap_reg, &up->port); in serial_omap_suspend()
1440 flush_work(&up->qos_work); in serial_omap_suspend()
1457 uart_resume_port(&serial_omap_reg, &up->port); in serial_omap_resume()
1471 mvr = readl(up->port.membase + (UART_OMAP_MVER << up->port.regshift)); in omap_serial_fill_features_erratas()
1491 dev_warn(up->dev, in omap_serial_fill_features_erratas()
1493 up->name); in omap_serial_fill_features_erratas()
1504 up->errata |= (UART_ERRATA_i202_MDR1_ACCESS | in omap_serial_fill_features_erratas()
1508 up->errata |= (UART_ERRATA_i202_MDR1_ACCESS | in omap_serial_fill_features_erratas()
1510 up->features |= OMAP_UART_WER_HAS_TX_WAKEUP; in omap_serial_fill_features_erratas()
1513 up->errata |= UART_ERRATA_i202_MDR1_ACCESS; in omap_serial_fill_features_erratas()
1514 up->features |= OMAP_UART_WER_HAS_TX_WAKEUP; in omap_serial_fill_features_erratas()
1529 of_property_read_u32(dev->of_node, "clock-frequency", in of_get_uart_port_info()
1530 &omap_up_info->uartclk); in of_get_uart_port_info()
1532 omap_up_info->flags = UPF_BOOT_AUTOCONF; in of_get_uart_port_info()
1540 struct serial_rs485 *rs485conf = &up->port.rs485; in serial_omap_probe_rs485()
1541 struct device_node *np = dev->of_node; in serial_omap_probe_rs485()
1545 rs485conf->flags = 0; in serial_omap_probe_rs485()
1546 up->rts_gpiod = NULL; in serial_omap_probe_rs485()
1551 ret = uart_get_rs485_mode(&up->port); in serial_omap_probe_rs485()
1555 if (of_property_read_bool(np, "rs485-rts-active-high")) { in serial_omap_probe_rs485()
1556 rs485conf->flags |= SER_RS485_RTS_ON_SEND; in serial_omap_probe_rs485()
1557 rs485conf->flags &= ~SER_RS485_RTS_AFTER_SEND; in serial_omap_probe_rs485()
1559 rs485conf->flags &= ~SER_RS485_RTS_ON_SEND; in serial_omap_probe_rs485()
1560 rs485conf->flags |= SER_RS485_RTS_AFTER_SEND; in serial_omap_probe_rs485()
1563 /* check for tx enable gpio */ in serial_omap_probe_rs485()
1564 gflags = rs485conf->flags & SER_RS485_RTS_AFTER_SEND ? in serial_omap_probe_rs485()
1566 up->rts_gpiod = devm_gpiod_get_optional(dev, "rts", gflags); in serial_omap_probe_rs485()
1567 if (IS_ERR(up->rts_gpiod)) { in serial_omap_probe_rs485()
1568 ret = PTR_ERR(up->rts_gpiod); in serial_omap_probe_rs485()
1569 if (ret == -EPROBE_DEFER) in serial_omap_probe_rs485()
1573 * -EPROBE_DEFER and just went on without GPIO. in serial_omap_probe_rs485()
1575 up->rts_gpiod = NULL; in serial_omap_probe_rs485()
1577 gpiod_set_consumer_name(up->rts_gpiod, "omap-serial"); in serial_omap_probe_rs485()
1585 struct omap_uart_port_info *omap_up_info = dev_get_platdata(&pdev->dev); in serial_omap_probe()
1594 if (pdev->dev.of_node) { in serial_omap_probe()
1595 uartirq = irq_of_parse_and_map(pdev->dev.of_node, 0); in serial_omap_probe()
1597 return -EPROBE_DEFER; in serial_omap_probe()
1598 wakeirq = irq_of_parse_and_map(pdev->dev.of_node, 1); in serial_omap_probe()
1599 omap_up_info = of_get_uart_port_info(&pdev->dev); in serial_omap_probe()
1600 pdev->dev.platform_data = omap_up_info; in serial_omap_probe()
1604 return -EPROBE_DEFER; in serial_omap_probe()
1607 up = devm_kzalloc(&pdev->dev, sizeof(*up), GFP_KERNEL); in serial_omap_probe()
1609 return -ENOMEM; in serial_omap_probe()
1612 base = devm_ioremap_resource(&pdev->dev, mem); in serial_omap_probe()
1616 up->dev = &pdev->dev; in serial_omap_probe()
1617 up->port.dev = &pdev->dev; in serial_omap_probe()
1618 up->port.type = PORT_OMAP; in serial_omap_probe()
1619 up->port.iotype = UPIO_MEM; in serial_omap_probe()
1620 up->port.irq = uartirq; in serial_omap_probe()
1621 up->port.regshift = 2; in serial_omap_probe()
1622 up->port.fifosize = 64; in serial_omap_probe()
1623 up->port.ops = &serial_omap_pops; in serial_omap_probe()
1624 up->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_OMAP_CONSOLE); in serial_omap_probe()
1626 if (pdev->dev.of_node) in serial_omap_probe()
1627 ret = of_alias_get_id(pdev->dev.of_node, "serial"); in serial_omap_probe()
1629 ret = pdev->id; in serial_omap_probe()
1632 dev_err(&pdev->dev, "failed to get alias/pdev id, errno %d\n", in serial_omap_probe()
1636 up->port.line = ret; in serial_omap_probe()
1638 if (up->port.line >= OMAP_MAX_HSUART_PORTS) { in serial_omap_probe()
1639 dev_err(&pdev->dev, "uart ID %d > MAX %d.\n", up->port.line, in serial_omap_probe()
1641 ret = -ENXIO; in serial_omap_probe()
1645 up->wakeirq = wakeirq; in serial_omap_probe()
1646 if (!up->wakeirq) in serial_omap_probe()
1647 dev_info(up->port.dev, "no wakeirq for uart%d\n", in serial_omap_probe()
1648 up->port.line); in serial_omap_probe()
1650 ret = serial_omap_probe_rs485(up, &pdev->dev); in serial_omap_probe()
1654 sprintf(up->name, "OMAP UART%d", up->port.line); in serial_omap_probe()
1655 up->port.mapbase = mem->start; in serial_omap_probe()
1656 up->port.membase = base; in serial_omap_probe()
1657 up->port.flags = omap_up_info->flags; in serial_omap_probe()
1658 up->port.uartclk = omap_up_info->uartclk; in serial_omap_probe()
1659 up->port.rs485_config = serial_omap_config_rs485; in serial_omap_probe()
1660 if (!up->port.uartclk) { in serial_omap_probe()
1661 up->port.uartclk = DEFAULT_CLK_SPEED; in serial_omap_probe()
1662 dev_warn(&pdev->dev, in serial_omap_probe()
1667 up->latency = PM_QOS_CPU_LATENCY_DEFAULT_VALUE; in serial_omap_probe()
1668 up->calc_latency = PM_QOS_CPU_LATENCY_DEFAULT_VALUE; in serial_omap_probe()
1669 cpu_latency_qos_add_request(&up->pm_qos_request, up->latency); in serial_omap_probe()
1670 INIT_WORK(&up->qos_work, serial_omap_uart_qos_work); in serial_omap_probe()
1673 if (omap_up_info->autosuspend_timeout == 0) in serial_omap_probe()
1674 omap_up_info->autosuspend_timeout = -1; in serial_omap_probe()
1676 device_init_wakeup(up->dev, true); in serial_omap_probe()
1678 pm_runtime_enable(&pdev->dev); in serial_omap_probe()
1680 pm_runtime_get_sync(&pdev->dev); in serial_omap_probe()
1684 ui[up->port.line] = up; in serial_omap_probe()
1687 ret = uart_add_one_port(&serial_omap_reg, &up->port); in serial_omap_probe()
1694 pm_runtime_put_sync(&pdev->dev); in serial_omap_probe()
1695 pm_runtime_disable(&pdev->dev); in serial_omap_probe()
1696 cpu_latency_qos_remove_request(&up->pm_qos_request); in serial_omap_probe()
1697 device_init_wakeup(up->dev, false); in serial_omap_probe()
1707 pm_runtime_get_sync(up->dev); in serial_omap_remove()
1709 uart_remove_one_port(&serial_omap_reg, &up->port); in serial_omap_remove()
1711 pm_runtime_put_sync(up->dev); in serial_omap_remove()
1712 pm_runtime_disable(up->dev); in serial_omap_remove()
1713 cpu_latency_qos_remove_request(&up->pm_qos_request); in serial_omap_remove()
1714 device_init_wakeup(&dev->dev, false); in serial_omap_remove()
1734 serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT | in serial_omap_mdr1_errataset()
1742 timeout--; in serial_omap_mdr1_errataset()
1745 dev_crit(up->dev, "Errata i202: timedout %x\n", in serial_omap_mdr1_errataset()
1756 if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) in serial_omap_restore_context()
1766 serial_out(up, UART_DLL, up->dll); in serial_omap_restore_context()
1767 serial_out(up, UART_DLM, up->dlh); in serial_omap_restore_context()
1769 serial_out(up, UART_IER, up->ier); in serial_omap_restore_context()
1770 serial_out(up, UART_FCR, up->fcr); in serial_omap_restore_context()
1772 serial_out(up, UART_MCR, up->mcr); in serial_omap_restore_context()
1774 serial_out(up, UART_OMAP_SCR, up->scr); in serial_omap_restore_context()
1775 serial_out(up, UART_EFR, up->efr); in serial_omap_restore_context()
1776 serial_out(up, UART_LCR, up->lcr); in serial_omap_restore_context()
1777 if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) in serial_omap_restore_context()
1778 serial_omap_mdr1_errataset(up, up->mdr1); in serial_omap_restore_context()
1780 serial_out(up, UART_OMAP_MDR1, up->mdr1); in serial_omap_restore_context()
1781 serial_out(up, UART_OMAP_WER, up->wer); in serial_omap_restore_context()
1789 return -EINVAL; in serial_omap_runtime_suspend()
1795 * active during suspend. in serial_omap_runtime_suspend()
1797 if (up->is_suspending && !console_suspend_enabled && in serial_omap_runtime_suspend()
1798 uart_console(&up->port)) in serial_omap_runtime_suspend()
1799 return -EBUSY; in serial_omap_runtime_suspend()
1801 up->context_loss_cnt = serial_omap_get_context_loss_count(up); in serial_omap_runtime_suspend()
1805 up->latency = PM_QOS_CPU_LATENCY_DEFAULT_VALUE; in serial_omap_runtime_suspend()
1806 schedule_work(&up->qos_work); in serial_omap_runtime_suspend()
1823 } else if (up->context_loss_cnt != loss_cnt) { in serial_omap_runtime_resume()
1826 up->latency = up->calc_latency; in serial_omap_runtime_resume()
1827 schedule_work(&up->qos_work); in serial_omap_runtime_resume()
1843 { .compatible = "ti,omap2-uart" },
1844 { .compatible = "ti,omap3-uart" },
1845 { .compatible = "ti,omap4-uart" },