Lines Matching +full:uart +full:- +full:fifosize
1 // SPDX-License-Identifier: GPL-2.0
96 val = readl(port->membase + AML_UART_STATUS); in meson_uart_tx_empty()
105 val = readl(port->membase + AML_UART_CONTROL); in meson_uart_stop_tx()
107 writel(val, port->membase + AML_UART_CONTROL); in meson_uart_stop_tx()
114 val = readl(port->membase + AML_UART_CONTROL); in meson_uart_stop_rx()
116 writel(val, port->membase + AML_UART_CONTROL); in meson_uart_stop_rx()
124 free_irq(port->irq, port); in meson_uart_shutdown()
126 spin_lock_irqsave(&port->lock, flags); in meson_uart_shutdown()
128 val = readl(port->membase + AML_UART_CONTROL); in meson_uart_shutdown()
131 writel(val, port->membase + AML_UART_CONTROL); in meson_uart_shutdown()
133 spin_unlock_irqrestore(&port->lock, flags); in meson_uart_shutdown()
138 struct circ_buf *xmit = &port->state->xmit; in meson_uart_start_tx()
147 while (!(readl(port->membase + AML_UART_STATUS) & AML_UART_TX_FULL)) { in meson_uart_start_tx()
148 if (port->x_char) { in meson_uart_start_tx()
149 writel(port->x_char, port->membase + AML_UART_WFIFO); in meson_uart_start_tx()
150 port->icount.tx++; in meson_uart_start_tx()
151 port->x_char = 0; in meson_uart_start_tx()
158 ch = xmit->buf[xmit->tail]; in meson_uart_start_tx()
159 writel(ch, port->membase + AML_UART_WFIFO); in meson_uart_start_tx()
160 xmit->tail = (xmit->tail+1) & (SERIAL_XMIT_SIZE - 1); in meson_uart_start_tx()
161 port->icount.tx++; in meson_uart_start_tx()
165 val = readl(port->membase + AML_UART_CONTROL); in meson_uart_start_tx()
167 writel(val, port->membase + AML_UART_CONTROL); in meson_uart_start_tx()
176 struct tty_port *tport = &port->state->port; in meson_receive_chars()
182 port->icount.rx++; in meson_receive_chars()
183 ostatus = status = readl(port->membase + AML_UART_STATUS); in meson_receive_chars()
187 port->icount.overrun++; in meson_receive_chars()
189 port->icount.frame++; in meson_receive_chars()
191 port->icount.frame++; in meson_receive_chars()
193 mode = readl(port->membase + AML_UART_CONTROL); in meson_receive_chars()
195 writel(mode, port->membase + AML_UART_CONTROL); in meson_receive_chars()
199 writel(mode, port->membase + AML_UART_CONTROL); in meson_receive_chars()
201 status &= port->read_status_mask; in meson_receive_chars()
208 ch = readl(port->membase + AML_UART_RFIFO); in meson_receive_chars()
212 port->icount.brk++; in meson_receive_chars()
221 if ((status & port->ignore_status_mask) == 0) in meson_receive_chars()
227 } while (!(readl(port->membase + AML_UART_STATUS) & AML_UART_RX_EMPTY)); in meson_receive_chars()
236 spin_lock(&port->lock); in meson_uart_interrupt()
238 if (!(readl(port->membase + AML_UART_STATUS) & AML_UART_RX_EMPTY)) in meson_uart_interrupt()
241 if (!(readl(port->membase + AML_UART_STATUS) & AML_UART_TX_FULL)) { in meson_uart_interrupt()
242 if (readl(port->membase + AML_UART_CONTROL) & AML_UART_TX_INT_EN) in meson_uart_interrupt()
246 spin_unlock(&port->lock); in meson_uart_interrupt()
253 return (port->type == PORT_MESON) ? "meson_uart" : NULL; in meson_uart_type()
260 val = readl(port->membase + AML_UART_CONTROL); in meson_uart_reset()
262 writel(val, port->membase + AML_UART_CONTROL); in meson_uart_reset()
265 writel(val, port->membase + AML_UART_CONTROL); in meson_uart_reset()
273 val = readl(port->membase + AML_UART_CONTROL); in meson_uart_startup()
275 writel(val, port->membase + AML_UART_CONTROL); in meson_uart_startup()
277 writel(val, port->membase + AML_UART_CONTROL); in meson_uart_startup()
280 writel(val, port->membase + AML_UART_CONTROL); in meson_uart_startup()
283 writel(val, port->membase + AML_UART_CONTROL); in meson_uart_startup()
285 val = (AML_UART_RECV_IRQ(1) | AML_UART_XMIT_IRQ(port->fifosize / 2)); in meson_uart_startup()
286 writel(val, port->membase + AML_UART_MISC); in meson_uart_startup()
288 ret = request_irq(port->irq, meson_uart_interrupt, 0, in meson_uart_startup()
289 port->name, port); in meson_uart_startup()
301 if (port->uartclk == 24000000) { in meson_uart_change_speed()
302 val = ((port->uartclk / 3) / baud) - 1; in meson_uart_change_speed()
305 val = ((port->uartclk * 10 / (baud * 4) + 5) / 10) - 1; in meson_uart_change_speed()
308 writel(val, port->membase + AML_UART_REG5); in meson_uart_change_speed()
319 spin_lock_irqsave(&port->lock, flags); in meson_uart_set_termios()
321 cflags = termios->c_cflag; in meson_uart_set_termios()
322 iflags = termios->c_iflag; in meson_uart_set_termios()
324 val = readl(port->membase + AML_UART_CONTROL); in meson_uart_set_termios()
363 writel(val, port->membase + AML_UART_CONTROL); in meson_uart_set_termios()
368 port->read_status_mask = AML_UART_TX_FIFO_WERR; in meson_uart_set_termios()
370 port->read_status_mask |= AML_UART_PARITY_ERR | in meson_uart_set_termios()
373 port->ignore_status_mask = 0; in meson_uart_set_termios()
375 port->ignore_status_mask |= AML_UART_PARITY_ERR | in meson_uart_set_termios()
378 uart_update_timeout(port, termios->c_cflag, baud); in meson_uart_set_termios()
379 spin_unlock_irqrestore(&port->lock, flags); in meson_uart_set_termios()
387 if (port->type != PORT_MESON) in meson_uart_verify_port()
388 ret = -EINVAL; in meson_uart_verify_port()
389 if (port->irq != ser->irq) in meson_uart_verify_port()
390 ret = -EINVAL; in meson_uart_verify_port()
391 if (ser->baud_base < 9600) in meson_uart_verify_port()
392 ret = -EINVAL; in meson_uart_verify_port()
398 devm_iounmap(port->dev, port->membase); in meson_uart_release_port()
399 port->membase = NULL; in meson_uart_release_port()
400 devm_release_mem_region(port->dev, port->mapbase, port->mapsize); in meson_uart_release_port()
405 if (!devm_request_mem_region(port->dev, port->mapbase, port->mapsize, in meson_uart_request_port()
406 dev_name(port->dev))) { in meson_uart_request_port()
407 dev_err(port->dev, "Memory region busy\n"); in meson_uart_request_port()
408 return -EBUSY; in meson_uart_request_port()
411 port->membase = devm_ioremap(port->dev, port->mapbase, in meson_uart_request_port()
412 port->mapsize); in meson_uart_request_port()
413 if (!port->membase) in meson_uart_request_port()
414 return -ENOMEM; in meson_uart_request_port()
422 port->type = PORT_MESON; in meson_uart_config_port()
429 * Console polling routines for writing and reading from the uart while
438 spin_lock_irqsave(&port->lock, flags); in meson_uart_poll_get_char()
440 if (readl(port->membase + AML_UART_STATUS) & AML_UART_RX_EMPTY) in meson_uart_poll_get_char()
443 c = readl(port->membase + AML_UART_RFIFO); in meson_uart_poll_get_char()
445 spin_unlock_irqrestore(&port->lock, flags); in meson_uart_poll_get_char()
456 spin_lock_irqsave(&port->lock, flags); in meson_uart_poll_put_char()
459 ret = readl_poll_timeout_atomic(port->membase + AML_UART_STATUS, reg, in meson_uart_poll_put_char()
463 if (ret == -ETIMEDOUT) { in meson_uart_poll_put_char()
464 dev_err(port->dev, "Timeout waiting for UART TX EMPTY\n"); in meson_uart_poll_put_char()
469 writel(c, port->membase + AML_UART_WFIFO); in meson_uart_poll_put_char()
472 ret = readl_poll_timeout_atomic(port->membase + AML_UART_STATUS, reg, in meson_uart_poll_put_char()
476 if (ret == -ETIMEDOUT) in meson_uart_poll_put_char()
477 dev_err(port->dev, "Timeout waiting for UART TX EMPTY\n"); in meson_uart_poll_put_char()
480 spin_unlock_irqrestore(&port->lock, flags); in meson_uart_poll_put_char()
511 val = readl(port->membase + AML_UART_CONTROL); in meson_uart_enable_tx_engine()
513 writel(val, port->membase + AML_UART_CONTROL); in meson_uart_enable_tx_engine()
518 if (!port->membase) in meson_console_putchar()
521 while (readl(port->membase + AML_UART_STATUS) & AML_UART_TX_FULL) in meson_console_putchar()
523 writel(ch, port->membase + AML_UART_WFIFO); in meson_console_putchar()
534 if (port->sysrq) { in meson_serial_port_write()
537 locked = spin_trylock(&port->lock); in meson_serial_port_write()
539 spin_lock(&port->lock); in meson_serial_port_write()
543 val = readl(port->membase + AML_UART_CONTROL); in meson_serial_port_write()
545 writel(tmp, port->membase + AML_UART_CONTROL); in meson_serial_port_write()
548 writel(val, port->membase + AML_UART_CONTROL); in meson_serial_port_write()
551 spin_unlock(&port->lock); in meson_serial_port_write()
560 port = meson_ports[co->index]; in meson_serial_console_write()
575 if (co->index < 0 || co->index >= AML_UART_PORT_NUM) in meson_serial_console_setup()
576 return -EINVAL; in meson_serial_console_setup()
578 port = meson_ports[co->index]; in meson_serial_console_setup()
579 if (!port || !port->membase) in meson_serial_console_setup()
580 return -ENODEV; in meson_serial_console_setup()
596 .index = -1,
610 struct earlycon_device *dev = co->data; in meson_serial_early_console_write()
612 meson_serial_port_write(&dev->port, s, count); in meson_serial_early_console_write()
618 if (!device->port.membase) in meson_serial_early_console_setup()
619 return -ENODEV; in meson_serial_early_console_setup()
621 meson_uart_enable_tx_engine(&device->port); in meson_serial_early_console_setup()
622 device->con->write = meson_serial_early_console_write; in meson_serial_early_console_setup()
626 OF_EARLYCON_DECLARE(meson, "amlogic,meson-uart",
629 OF_EARLYCON_DECLARE(meson, "amlogic,meson-ao-uart",
672 * This function gets clocks in the legacy non-stable DT bindings.
681 clk = meson_uart_probe_clock(&pdev->dev, NULL); in meson_uart_probe_clocks_legacy()
685 port->uartclk = clk_get_rate(clk); in meson_uart_probe_clocks_legacy()
697 clk_pclk = meson_uart_probe_clock(&pdev->dev, "pclk"); in meson_uart_probe_clocks()
701 clk_xtal = meson_uart_probe_clock(&pdev->dev, "xtal"); in meson_uart_probe_clocks()
705 clk_baud = meson_uart_probe_clock(&pdev->dev, "baud"); in meson_uart_probe_clocks()
709 port->uartclk = clk_get_rate(clk_baud); in meson_uart_probe_clocks()
718 u32 fifosize = 64; /* Default is 64, 128 for EE UART_0 */ in meson_uart_probe() local
721 if (pdev->dev.of_node) in meson_uart_probe()
722 pdev->id = of_alias_get_id(pdev->dev.of_node, "serial"); in meson_uart_probe()
724 if (pdev->id < 0) { in meson_uart_probe()
729 pdev->id = id; in meson_uart_probe()
735 if (pdev->id < 0 || pdev->id >= AML_UART_PORT_NUM) in meson_uart_probe()
736 return -EINVAL; in meson_uart_probe()
740 return -ENODEV; in meson_uart_probe()
744 return -ENODEV; in meson_uart_probe()
746 of_property_read_u32(pdev->dev.of_node, "fifo-size", &fifosize); in meson_uart_probe()
748 if (meson_ports[pdev->id]) { in meson_uart_probe()
749 dev_err(&pdev->dev, "port %d already allocated\n", pdev->id); in meson_uart_probe()
750 return -EBUSY; in meson_uart_probe()
753 port = devm_kzalloc(&pdev->dev, sizeof(struct uart_port), GFP_KERNEL); in meson_uart_probe()
755 return -ENOMEM; in meson_uart_probe()
758 if (of_device_is_compatible(pdev->dev.of_node, "amlogic,meson-uart")) in meson_uart_probe()
766 port->iotype = UPIO_MEM; in meson_uart_probe()
767 port->mapbase = res_mem->start; in meson_uart_probe()
768 port->mapsize = resource_size(res_mem); in meson_uart_probe()
769 port->irq = res_irq->start; in meson_uart_probe()
770 port->flags = UPF_BOOT_AUTOCONF | UPF_LOW_LATENCY; in meson_uart_probe()
771 port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_MESON_CONSOLE); in meson_uart_probe()
772 port->dev = &pdev->dev; in meson_uart_probe()
773 port->line = pdev->id; in meson_uart_probe()
774 port->type = PORT_MESON; in meson_uart_probe()
775 port->x_char = 0; in meson_uart_probe()
776 port->ops = &meson_uart_ops; in meson_uart_probe()
777 port->fifosize = fifosize; in meson_uart_probe()
779 meson_ports[pdev->id] = port; in meson_uart_probe()
790 meson_ports[pdev->id] = NULL; in meson_uart_probe()
801 meson_ports[pdev->id] = NULL; in meson_uart_remove()
808 { .compatible = "amlogic,meson-uart" },
810 { .compatible = "amlogic,meson6-uart" },
811 { .compatible = "amlogic,meson8-uart" },
812 { .compatible = "amlogic,meson8b-uart" },
813 { .compatible = "amlogic,meson-gx-uart" },