Lines Matching refs:UCR4
43 #define UCR4 0x8c /* Control Register 4 */ macro
288 case UCR4: in imx_uart_writel()
320 case UCR4: in imx_uart_readl()
450 ucr4 = imx_uart_readl(sport, UCR4); in imx_uart_stop_tx()
452 imx_uart_writel(sport, ucr4, UCR4); in imx_uart_stop_tx()
601 u32 ucr4 = imx_uart_readl(sport, UCR4); in imx_uart_dma_tx_callback()
603 imx_uart_writel(sport, ucr4, UCR4); in imx_uart_dma_tx_callback()
623 ucr4 = imx_uart_readl(sport, UCR4); in imx_uart_dma_tx()
625 imx_uart_writel(sport, ucr4, UCR4); in imx_uart_dma_tx()
714 u32 ucr4 = imx_uart_readl(sport, UCR4); in imx_uart_start_tx()
716 imx_uart_writel(sport, ucr4, UCR4); in imx_uart_start_tx()
931 ucr4 = imx_uart_readl(sport, UCR4); in imx_uart_int()
1401 ucr4 = imx_uart_readl(sport, UCR4); in imx_uart_startup()
1407 imx_uart_writel(sport, ucr4 & ~UCR4_DREN, UCR4); in imx_uart_startup()
1437 ucr4 = imx_uart_readl(sport, UCR4) & ~(UCR4_OREN | UCR4_INVR); in imx_uart_startup()
1442 imx_uart_writel(sport, ucr4, UCR4); in imx_uart_startup()
1546 ucr4 = imx_uart_readl(sport, UCR4); in imx_uart_shutdown()
1548 imx_uart_writel(sport, ucr4, UCR4); in imx_uart_shutdown()
2293 sport->ucr4 = readl(sport->port.membase + UCR4); in imx_uart_probe()
2433 imx_uart_writel(sport, sport->saved_reg[3], UCR4); in imx_uart_restore_context()
2447 sport->saved_reg[3] = imx_uart_readl(sport, UCR4); in imx_uart_save_context()