Lines Matching defs:func_dram
53 struct func_dram { struct
54 u32 reserved[108]; /* 0-1B0 reserved by personality code */
55 u32 RcvStatusAddr; /* 1B0-1B3 Status Address for Next rcv */
56 u8 RcvStnAddr; /* 1B4 Receive Station Addr */
57 u8 IdleState; /* 1B5 Idle State */
58 u8 IdleMonitor; /* 1B6 Idle Monitor */
59 u8 FlagFillIdleTimer; /* 1B7 Flag Fill Idle Timer */
60 u32 XmitStatusAddr; /* 1B8-1BB Transmit Status Address */
61 u8 StartXmitCmd; /* 1BC Start Xmit Command */
62 u8 HDLCConfigReg; /* 1BD Reserved */
63 u8 CauseCode; /* 1BE Cause code for fatal error */
64 u8 xchar; /* 1BF High priority send */
65 u32 reserved3; /* 1C0-1C3 Reserved */
66 u8 PrevCmdReg; /* 1C4 Reserved */
67 u8 CmdReg; /* 1C5 Command Register */
68 u8 async_config2; /* 1C6 Async Config Byte 2 */
69 u8 async_config3; /* 1C7 Async Config Byte 3 */
70 u8 dce_resvd[20]; /* 1C8-1DB DCE Rsvd */
71 u8 dce_resvd21; /* 1DC DCE Rsvd (21st byte */
72 u8 misc_flags; /* 1DD misc flags */
75 u8 call_length; /* 1DE Phone #/CFI buff ln */
76 u8 call_length2; /* 1DF Upper byte (unused) */
77 u32 call_addr; /* 1E0-1E3 Phn #/CFI buff addr */
78 u16 timer_value; /* 1E4-1E5 general timer value */
79 u8 timer_command; /* 1E6 general timer cmd */
80 u8 dce_command; /* 1E7 dce command reg */
81 u8 dce_cmd_status; /* 1E8 dce command stat */
82 u8 x21_r1_ioff; /* 1E9 dce ready counter */
83 u8 x21_r0_ioff; /* 1EA dce not ready ctr */
84 u8 x21_ralt_ioff; /* 1EB dce CNR counter */
85 u8 x21_r1_ion; /* 1EC dce ready I on ctr */
86 u8 rsvd_ier; /* 1ED Rsvd for IER (if ne */
87 u8 ier; /* 1EE Interrupt Enable */
88 u8 isr; /* 1EF Input Signal Reg */
89 u8 osr; /* 1F0 Output Signal Reg */
90 u8 reset; /* 1F1 Reset/Reload Reg */
91 u8 disable; /* 1F2 Disable Reg */
92 u8 sync; /* 1F3 Sync Reg */
93 u8 error_stat; /* 1F4 Error Status */
94 u8 cable_id; /* 1F5 Cable ID */
95 u8 cs_length; /* 1F6 CS Load Length */
96 u8 mac_length; /* 1F7 Mac Load Length */
97 u32 cs_load_addr; /* 1F8-1FB Call Load PCI Addr */
98 u32 mac_load_addr; /* 1FC-1FF Mac Load PCI Addr */