Lines Matching refs:membase
347 return readl(port->membase + off); in lpuart32_read()
349 return ioread32be(port->membase + off); in lpuart32_read()
360 writel(val, port->membase + off); in lpuart32_write()
363 iowrite32be(val, port->membase + off); in lpuart32_write()
417 global_addr = port->membase + UART_GLOBAL - IMX_REG_OFF; in lpuart_global_reset()
432 temp = readb(port->membase + UARTCR2); in lpuart_stop_tx()
434 writeb(temp, port->membase + UARTCR2); in lpuart_stop_tx()
450 temp = readb(port->membase + UARTCR2); in lpuart_stop_rx()
451 writeb(temp & ~UARTCR2_RE, port->membase + UARTCR2); in lpuart_stop_rx()
613 val = readb(sport->port.membase + UARTCFIFO); in lpuart_flush_buffer()
615 writeb(val, sport->port.membase + UARTCFIFO); in lpuart_flush_buffer()
622 while (!(readb(port->membase + offset) & bit)) in lpuart_wait_bit_set()
646 writeb(0, sport->port.membase + UARTCR2); in lpuart_poll_init()
648 temp = readb(sport->port.membase + UARTPFIFO); in lpuart_poll_init()
651 sport->port.membase + UARTPFIFO); in lpuart_poll_init()
655 sport->port.membase + UARTCFIFO); in lpuart_poll_init()
658 if (readb(sport->port.membase + UARTSR1) & UARTSR1_RDRF) { in lpuart_poll_init()
659 readb(sport->port.membase + UARTDR); in lpuart_poll_init()
660 writeb(UARTSFIFO_RXUF, sport->port.membase + UARTSFIFO); in lpuart_poll_init()
663 writeb(0, sport->port.membase + UARTTWFIFO); in lpuart_poll_init()
664 writeb(1, sport->port.membase + UARTRWFIFO); in lpuart_poll_init()
667 writeb(UARTCR2_RE | UARTCR2_TE, sport->port.membase + UARTCR2); in lpuart_poll_init()
677 writeb(c, port->membase + UARTDR); in lpuart_poll_put_char()
682 if (!(readb(port->membase + UARTSR1) & UARTSR1_RDRF)) in lpuart_poll_get_char()
685 return readb(port->membase + UARTDR); in lpuart_poll_get_char()
742 writeb(sport->port.x_char, sport->port.membase + UARTDR); in lpuart_transmit_buffer()
754 (readb(sport->port.membase + UARTTCFIFO) < sport->txfifo_size)) { in lpuart_transmit_buffer()
755 writeb(xmit->buf[xmit->tail], sport->port.membase + UARTDR); in lpuart_transmit_buffer()
809 temp = readb(port->membase + UARTCR2); in lpuart_start_tx()
810 writeb(temp | UARTCR2_TIE, port->membase + UARTCR2); in lpuart_start_tx()
816 if (readb(port->membase + UARTSR1) & UARTSR1_TDRE) in lpuart_start_tx()
843 unsigned char sr1 = readb(port->membase + UARTSR1); in lpuart_tx_empty()
844 unsigned char sfifo = readb(port->membase + UARTSFIFO); in lpuart_tx_empty()
886 while (!(readb(sport->port.membase + UARTSFIFO) & UARTSFIFO_RXEMPT)) { in lpuart_rxint()
893 sr = readb(sport->port.membase + UARTSR1); in lpuart_rxint()
894 rx = readb(sport->port.membase + UARTDR); in lpuart_rxint()
938 writeb(UARTCFIFO_RXFLUSH, sport->port.membase + UARTCFIFO); in lpuart_rxint()
939 writeb(UARTSFIFO_RXOF, sport->port.membase + UARTSFIFO); in lpuart_rxint()
1034 sts = readb(sport->port.membase + UARTSR1); in lpuart_int()
1038 readb(sport->port.membase + UARTDR); in lpuart_int()
1041 writeb(UARTCFIFO_RXFLUSH, sport->port.membase + UARTCFIFO); in lpuart_int()
1127 unsigned char sr = readb(sport->port.membase + UARTSR1); in lpuart_copy_rx_to_tty()
1133 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty()
1135 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty()
1138 readb(sport->port.membase + UARTDR); in lpuart_copy_rx_to_tty()
1153 if (readb(sport->port.membase + UARTSFIFO) & in lpuart_copy_rx_to_tty()
1156 sport->port.membase + UARTSFIFO); in lpuart_copy_rx_to_tty()
1158 sport->port.membase + UARTCFIFO); in lpuart_copy_rx_to_tty()
1162 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty()
1326 writeb(readb(sport->port.membase + UARTCR5) | UARTCR5_RDMAS, in lpuart_start_rx_dma()
1327 sport->port.membase + UARTCR5); in lpuart_start_rx_dma()
1354 u8 modem = readb(sport->port.membase + UARTMODEM) & in lpuart_config_rs485()
1356 writeb(modem, sport->port.membase + UARTMODEM); in lpuart_config_rs485()
1395 writeb(modem, sport->port.membase + UARTMODEM); in lpuart_config_rs485()
1455 reg = readb(port->membase + UARTCR1); in lpuart_get_mctrl()
1478 reg = readb(port->membase + UARTCR1); in lpuart_set_mctrl()
1485 writeb(reg, port->membase + UARTCR1); in lpuart_set_mctrl()
1506 temp = readb(port->membase + UARTCR2) & ~UARTCR2_SBK; in lpuart_break_ctl()
1511 writeb(temp, port->membase + UARTCR2); in lpuart_break_ctl()
1531 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_setup_watermark()
1535 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_setup_watermark()
1537 val = readb(sport->port.membase + UARTPFIFO); in lpuart_setup_watermark()
1539 sport->port.membase + UARTPFIFO); in lpuart_setup_watermark()
1543 sport->port.membase + UARTCFIFO); in lpuart_setup_watermark()
1546 if (readb(sport->port.membase + UARTSR1) & UARTSR1_RDRF) { in lpuart_setup_watermark()
1547 readb(sport->port.membase + UARTDR); in lpuart_setup_watermark()
1548 writeb(UARTSFIFO_RXUF, sport->port.membase + UARTSFIFO); in lpuart_setup_watermark()
1551 writeb(0, sport->port.membase + UARTTWFIFO); in lpuart_setup_watermark()
1552 writeb(1, sport->port.membase + UARTRWFIFO); in lpuart_setup_watermark()
1555 writeb(cr2_saved, sport->port.membase + UARTCR2); in lpuart_setup_watermark()
1564 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_setup_watermark_enable()
1566 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_setup_watermark_enable()
1653 writeb(readb(sport->port.membase + UARTCR5) | in lpuart_tx_dma_startup()
1654 UARTCR5_TDMAS, sport->port.membase + UARTCR5); in lpuart_tx_dma_startup()
1687 cr3 = readb(sport->port.membase + UARTCR3); in lpuart_rx_dma_startup()
1689 writeb(cr3, sport->port.membase + UARTCR3); in lpuart_rx_dma_startup()
1705 temp = readb(sport->port.membase + UARTPFIFO); in lpuart_startup()
1818 temp = readb(port->membase + UARTCR2); in lpuart_shutdown()
1821 writeb(temp, port->membase + UARTCR2); in lpuart_shutdown()
1859 cr1 = old_cr1 = readb(sport->port.membase + UARTCR1); in lpuart_set_termios()
1860 old_cr2 = readb(sport->port.membase + UARTCR2); in lpuart_set_termios()
1861 cr3 = readb(sport->port.membase + UARTCR3); in lpuart_set_termios()
1862 cr4 = readb(sport->port.membase + UARTCR4); in lpuart_set_termios()
1863 bdh = readb(sport->port.membase + UARTBDH); in lpuart_set_termios()
1864 modem = readb(sport->port.membase + UARTMODEM); in lpuart_set_termios()
1975 sport->port.membase + UARTCR2); in lpuart_set_termios()
1983 writeb(cr4 | brfa, sport->port.membase + UARTCR4); in lpuart_set_termios()
1984 writeb(bdh, sport->port.membase + UARTBDH); in lpuart_set_termios()
1985 writeb(sbr & 0xFF, sport->port.membase + UARTBDL); in lpuart_set_termios()
1986 writeb(cr3, sport->port.membase + UARTCR3); in lpuart_set_termios()
1987 writeb(cr1, sport->port.membase + UARTCR1); in lpuart_set_termios()
1988 writeb(modem, sport->port.membase + UARTMODEM); in lpuart_set_termios()
1991 writeb(old_cr2, sport->port.membase + UARTCR2); in lpuart_set_termios()
2326 writeb(ch, port->membase + UARTDR); in lpuart_console_putchar()
2349 cr2 = old_cr2 = readb(sport->port.membase + UARTCR2); in lpuart_console_write()
2352 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_console_write()
2359 writeb(old_cr2, sport->port.membase + UARTCR2); in lpuart_console_write()
2406 cr = readb(sport->port.membase + UARTCR2); in lpuart_console_get_options()
2413 cr = readb(sport->port.membase + UARTCR1); in lpuart_console_get_options()
2428 bdh = readb(sport->port.membase + UARTBDH); in lpuart_console_get_options()
2430 bdl = readb(sport->port.membase + UARTBDL); in lpuart_console_get_options()
2434 brfa = readb(sport->port.membase + UARTCR4); in lpuart_console_get_options()
2568 if (!device->port.membase) in lpuart_early_console_setup()
2578 if (!device->port.membase) in lpuart32_early_console_setup()
2593 if (!device->port.membase) in ls1028a_early_console_setup()
2615 if (!device->port.membase) in lpuart32_imx_early_console_setup()
2619 device->port.membase += IMX_REG_OFF; in lpuart32_imx_early_console_setup()
2659 sport->port.membase = devm_ioremap_resource(&pdev->dev, res); in lpuart_probe()
2660 if (IS_ERR(sport->port.membase)) in lpuart_probe()
2661 return PTR_ERR(sport->port.membase); in lpuart_probe()
2663 sport->port.membase += sdata->reg_off; in lpuart_probe()
2809 temp = readb(sport->port.membase + UARTCR2); in lpuart_suspend()
2811 writeb(temp, sport->port.membase + UARTCR2); in lpuart_suspend()
2838 writeb(readb(sport->port.membase + UARTCR5) & in lpuart_suspend()
2839 ~UARTCR5_RDMAS, sport->port.membase + UARTCR5); in lpuart_suspend()