Lines Matching +full:rx +full:- +full:threshold
1 /* SPDX-License-Identifier: GPL-2.0+ */
25 #define ATMEL_US_STTTO BIT(11) /* Start Time-out */
29 #define ATMEL_US_RETTO BIT(15) /* Rearm Time-out */
76 #define ATMEL_US_MODE9 BIT(17) /* 9-bit Character Length */
94 #define ATMEL_US_TIMEOUT BIT(8) /* Receiver Time-out */
121 #define ATMEL_US_RTOR 0x24 /* Receiver Time-out Register for USART */
122 #define ATMEL_UA_RTOR 0x28 /* Receiver Time-out Register for UART */
123 #define ATMEL_US_TO GENMASK(15, 0) /* Time-out Value */
135 #define ATMEL_US_RXRDYM(data) (((data) & 0x3) << 4) /* RX Ready Mode */
140 #define ATMEL_US_TXFTHRES(thr) (((thr) & 0x3f) << 8) /* TX FIFO Threshold */
141 #define ATMEL_US_RXFTHRES(thr) (((thr) & 0x3f) << 16) /* RX FIFO Threshold */
142 #define ATMEL_US_RXFTHRES2(thr) (((thr) & 0x3f) << 24) /* RX FIFO Threshold2 */
146 #define ATMEL_US_RXFL(reg) (((reg) >> 16) & 0x3f) /* RX FIFO Level */
154 #define ATMEL_US_TXFTHF BIT(2) /* Transmit FIFO Threshold Flag */
157 #define ATMEL_US_RXFTHF BIT(5) /* Receive FIFO Threshold Flag */
161 #define ATMEL_US_RXFTHF2 BIT(9) /* Receive FIFO Threshold Flag 2 */