Lines Matching refs:uap
282 static unsigned int pl011_reg_to_offset(const struct uart_amba_port *uap, in pl011_reg_to_offset() argument
285 return uap->reg_offset[reg]; in pl011_reg_to_offset()
288 static unsigned int pl011_read(const struct uart_amba_port *uap, in pl011_read() argument
291 void __iomem *addr = uap->port.membase + pl011_reg_to_offset(uap, reg); in pl011_read()
293 return (uap->port.iotype == UPIO_MEM32) ? in pl011_read()
297 static void pl011_write(unsigned int val, const struct uart_amba_port *uap, in pl011_write() argument
300 void __iomem *addr = uap->port.membase + pl011_reg_to_offset(uap, reg); in pl011_write()
302 if (uap->port.iotype == UPIO_MEM32) in pl011_write()
313 static int pl011_fifo_to_tty(struct uart_amba_port *uap) in pl011_fifo_to_tty() argument
320 status = pl011_read(uap, REG_FR); in pl011_fifo_to_tty()
325 ch = pl011_read(uap, REG_DR) | UART_DUMMY_DR_RX; in pl011_fifo_to_tty()
327 uap->port.icount.rx++; in pl011_fifo_to_tty()
332 uap->port.icount.brk++; in pl011_fifo_to_tty()
333 if (uart_handle_break(&uap->port)) in pl011_fifo_to_tty()
336 uap->port.icount.parity++; in pl011_fifo_to_tty()
338 uap->port.icount.frame++; in pl011_fifo_to_tty()
340 uap->port.icount.overrun++; in pl011_fifo_to_tty()
342 ch &= uap->port.read_status_mask; in pl011_fifo_to_tty()
352 spin_unlock(&uap->port.lock); in pl011_fifo_to_tty()
353 sysrq = uart_handle_sysrq_char(&uap->port, ch & 255); in pl011_fifo_to_tty()
354 spin_lock(&uap->port.lock); in pl011_fifo_to_tty()
357 uart_insert_char(&uap->port, ch, UART011_DR_OE, ch, flag); in pl011_fifo_to_tty()
402 static void pl011_dma_probe(struct uart_amba_port *uap) in pl011_dma_probe() argument
405 struct amba_pl011_data *plat = dev_get_platdata(uap->port.dev); in pl011_dma_probe()
406 struct device *dev = uap->port.dev; in pl011_dma_probe()
408 .dst_addr = uap->port.mapbase + in pl011_dma_probe()
409 pl011_reg_to_offset(uap, REG_DR), in pl011_dma_probe()
412 .dst_maxburst = uap->fifosize >> 1, in pl011_dma_probe()
418 uap->dma_probed = true; in pl011_dma_probe()
422 uap->dma_probed = false; in pl011_dma_probe()
428 dev_info(uap->port.dev, "no DMA platform data\n"); in pl011_dma_probe()
439 dev_err(uap->port.dev, "no TX DMA channel!\n"); in pl011_dma_probe()
445 uap->dmatx.chan = chan; in pl011_dma_probe()
447 dev_info(uap->port.dev, "DMA channel TX %s\n", in pl011_dma_probe()
448 dma_chan_name(uap->dmatx.chan)); in pl011_dma_probe()
457 dev_err(uap->port.dev, "no RX DMA channel!\n"); in pl011_dma_probe()
464 .src_addr = uap->port.mapbase + in pl011_dma_probe()
465 pl011_reg_to_offset(uap, REG_DR), in pl011_dma_probe()
468 .src_maxburst = uap->fifosize >> 2, in pl011_dma_probe()
482 dev_info(uap->port.dev, in pl011_dma_probe()
488 uap->dmarx.chan = chan; in pl011_dma_probe()
490 uap->dmarx.auto_poll_rate = false; in pl011_dma_probe()
494 uap->dmarx.auto_poll_rate = false; in pl011_dma_probe()
495 uap->dmarx.poll_rate = plat->dma_rx_poll_rate; in pl011_dma_probe()
502 uap->dmarx.auto_poll_rate = true; in pl011_dma_probe()
503 uap->dmarx.poll_rate = 100; in pl011_dma_probe()
507 uap->dmarx.poll_timeout = in pl011_dma_probe()
510 uap->dmarx.poll_timeout = 3000; in pl011_dma_probe()
512 uap->dmarx.auto_poll_rate = of_property_read_bool( in pl011_dma_probe()
514 if (uap->dmarx.auto_poll_rate) { in pl011_dma_probe()
519 uap->dmarx.poll_rate = x; in pl011_dma_probe()
521 uap->dmarx.poll_rate = 100; in pl011_dma_probe()
524 uap->dmarx.poll_timeout = x; in pl011_dma_probe()
526 uap->dmarx.poll_timeout = 3000; in pl011_dma_probe()
529 dev_info(uap->port.dev, "DMA channel RX %s\n", in pl011_dma_probe()
530 dma_chan_name(uap->dmarx.chan)); in pl011_dma_probe()
534 static void pl011_dma_remove(struct uart_amba_port *uap) in pl011_dma_remove() argument
536 if (uap->dmatx.chan) in pl011_dma_remove()
537 dma_release_channel(uap->dmatx.chan); in pl011_dma_remove()
538 if (uap->dmarx.chan) in pl011_dma_remove()
539 dma_release_channel(uap->dmarx.chan); in pl011_dma_remove()
543 static int pl011_dma_tx_refill(struct uart_amba_port *uap);
544 static void pl011_start_tx_pio(struct uart_amba_port *uap);
552 struct uart_amba_port *uap = data; in pl011_dma_tx_callback() local
553 struct pl011_dmatx_data *dmatx = &uap->dmatx; in pl011_dma_tx_callback()
557 spin_lock_irqsave(&uap->port.lock, flags); in pl011_dma_tx_callback()
558 if (uap->dmatx.queued) in pl011_dma_tx_callback()
562 dmacr = uap->dmacr; in pl011_dma_tx_callback()
563 uap->dmacr = dmacr & ~UART011_TXDMAE; in pl011_dma_tx_callback()
564 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_callback()
575 if (!(dmacr & UART011_TXDMAE) || uart_tx_stopped(&uap->port) || in pl011_dma_tx_callback()
576 uart_circ_empty(&uap->port.state->xmit)) { in pl011_dma_tx_callback()
577 uap->dmatx.queued = false; in pl011_dma_tx_callback()
578 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_dma_tx_callback()
582 if (pl011_dma_tx_refill(uap) <= 0) in pl011_dma_tx_callback()
587 pl011_start_tx_pio(uap); in pl011_dma_tx_callback()
589 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_dma_tx_callback()
600 static int pl011_dma_tx_refill(struct uart_amba_port *uap) in pl011_dma_tx_refill() argument
602 struct pl011_dmatx_data *dmatx = &uap->dmatx; in pl011_dma_tx_refill()
606 struct circ_buf *xmit = &uap->port.state->xmit; in pl011_dma_tx_refill()
616 if (count < (uap->fifosize >> 1)) { in pl011_dma_tx_refill()
617 uap->dmatx.queued = false; in pl011_dma_tx_refill()
649 uap->dmatx.queued = false; in pl011_dma_tx_refill()
650 dev_dbg(uap->port.dev, "unable to map TX DMA\n"); in pl011_dma_tx_refill()
658 uap->dmatx.queued = false; in pl011_dma_tx_refill()
663 dev_dbg(uap->port.dev, "TX DMA busy\n"); in pl011_dma_tx_refill()
669 desc->callback_param = uap; in pl011_dma_tx_refill()
677 uap->dmacr |= UART011_TXDMAE; in pl011_dma_tx_refill()
678 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_refill()
679 uap->dmatx.queued = true; in pl011_dma_tx_refill()
686 uap->port.icount.tx += count; in pl011_dma_tx_refill()
689 uart_write_wakeup(&uap->port); in pl011_dma_tx_refill()
702 static bool pl011_dma_tx_irq(struct uart_amba_port *uap) in pl011_dma_tx_irq() argument
704 if (!uap->using_tx_dma) in pl011_dma_tx_irq()
712 if (uap->dmatx.queued) { in pl011_dma_tx_irq()
713 uap->dmacr |= UART011_TXDMAE; in pl011_dma_tx_irq()
714 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_irq()
715 uap->im &= ~UART011_TXIM; in pl011_dma_tx_irq()
716 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_tx_irq()
724 if (pl011_dma_tx_refill(uap) > 0) { in pl011_dma_tx_irq()
725 uap->im &= ~UART011_TXIM; in pl011_dma_tx_irq()
726 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_tx_irq()
736 static inline void pl011_dma_tx_stop(struct uart_amba_port *uap) in pl011_dma_tx_stop() argument
738 if (uap->dmatx.queued) { in pl011_dma_tx_stop()
739 uap->dmacr &= ~UART011_TXDMAE; in pl011_dma_tx_stop()
740 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_stop()
752 static inline bool pl011_dma_tx_start(struct uart_amba_port *uap) in pl011_dma_tx_start() argument
756 if (!uap->using_tx_dma) in pl011_dma_tx_start()
759 if (!uap->port.x_char) { in pl011_dma_tx_start()
763 if (!uap->dmatx.queued) { in pl011_dma_tx_start()
764 if (pl011_dma_tx_refill(uap) > 0) { in pl011_dma_tx_start()
765 uap->im &= ~UART011_TXIM; in pl011_dma_tx_start()
766 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_tx_start()
769 } else if (!(uap->dmacr & UART011_TXDMAE)) { in pl011_dma_tx_start()
770 uap->dmacr |= UART011_TXDMAE; in pl011_dma_tx_start()
771 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_start()
780 dmacr = uap->dmacr; in pl011_dma_tx_start()
781 uap->dmacr &= ~UART011_TXDMAE; in pl011_dma_tx_start()
782 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_start()
784 if (pl011_read(uap, REG_FR) & UART01x_FR_TXFF) { in pl011_dma_tx_start()
793 pl011_write(uap->port.x_char, uap, REG_DR); in pl011_dma_tx_start()
794 uap->port.icount.tx++; in pl011_dma_tx_start()
795 uap->port.x_char = 0; in pl011_dma_tx_start()
798 uap->dmacr = dmacr; in pl011_dma_tx_start()
799 pl011_write(dmacr, uap, REG_DMACR); in pl011_dma_tx_start()
809 __releases(&uap->port.lock) in pl011_dma_flush_buffer()
810 __acquires(&uap->port.lock) in pl011_dma_flush_buffer()
812 struct uart_amba_port *uap = in pl011_dma_flush_buffer() local
815 if (!uap->using_tx_dma) in pl011_dma_flush_buffer()
818 dmaengine_terminate_async(uap->dmatx.chan); in pl011_dma_flush_buffer()
820 if (uap->dmatx.queued) { in pl011_dma_flush_buffer()
821 dma_unmap_sg(uap->dmatx.chan->device->dev, &uap->dmatx.sg, 1, in pl011_dma_flush_buffer()
823 uap->dmatx.queued = false; in pl011_dma_flush_buffer()
824 uap->dmacr &= ~UART011_TXDMAE; in pl011_dma_flush_buffer()
825 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_flush_buffer()
831 static int pl011_dma_rx_trigger_dma(struct uart_amba_port *uap) in pl011_dma_rx_trigger_dma() argument
833 struct dma_chan *rxchan = uap->dmarx.chan; in pl011_dma_rx_trigger_dma()
834 struct pl011_dmarx_data *dmarx = &uap->dmarx; in pl011_dma_rx_trigger_dma()
842 sgbuf = uap->dmarx.use_buf_b ? in pl011_dma_rx_trigger_dma()
843 &uap->dmarx.sgbuf_b : &uap->dmarx.sgbuf_a; in pl011_dma_rx_trigger_dma()
853 uap->dmarx.running = false; in pl011_dma_rx_trigger_dma()
860 desc->callback_param = uap; in pl011_dma_rx_trigger_dma()
864 uap->dmacr |= UART011_RXDMAE; in pl011_dma_rx_trigger_dma()
865 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_rx_trigger_dma()
866 uap->dmarx.running = true; in pl011_dma_rx_trigger_dma()
868 uap->im &= ~UART011_RXIM; in pl011_dma_rx_trigger_dma()
869 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_rx_trigger_dma()
879 static void pl011_dma_rx_chars(struct uart_amba_port *uap, in pl011_dma_rx_chars() argument
883 struct tty_port *port = &uap->port.state->port; in pl011_dma_rx_chars()
885 &uap->dmarx.sgbuf_b : &uap->dmarx.sgbuf_a; in pl011_dma_rx_chars()
889 struct pl011_dmarx_data *dmarx = &uap->dmarx; in pl011_dma_rx_chars()
892 if (uap->dmarx.poll_rate) { in pl011_dma_rx_chars()
911 uap->port.icount.rx += dma_count; in pl011_dma_rx_chars()
913 dev_warn(uap->port.dev, in pl011_dma_rx_chars()
918 if (uap->dmarx.poll_rate) in pl011_dma_rx_chars()
928 UART011_FEIS, uap, REG_ICR); in pl011_dma_rx_chars()
941 fifotaken = pl011_fifo_to_tty(uap); in pl011_dma_rx_chars()
944 dev_vdbg(uap->port.dev, in pl011_dma_rx_chars()
950 static void pl011_dma_rx_irq(struct uart_amba_port *uap) in pl011_dma_rx_irq() argument
952 struct pl011_dmarx_data *dmarx = &uap->dmarx; in pl011_dma_rx_irq()
966 dev_err(uap->port.dev, "unable to pause DMA transfer\n"); in pl011_dma_rx_irq()
970 dev_err(uap->port.dev, "unable to pause DMA transfer\n"); in pl011_dma_rx_irq()
973 uap->dmacr &= ~UART011_RXDMAE; in pl011_dma_rx_irq()
974 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_rx_irq()
975 uap->dmarx.running = false; in pl011_dma_rx_irq()
986 pl011_dma_rx_chars(uap, pending, dmarx->use_buf_b, true); in pl011_dma_rx_irq()
990 if (pl011_dma_rx_trigger_dma(uap)) { in pl011_dma_rx_irq()
991 dev_dbg(uap->port.dev, "could not retrigger RX DMA job " in pl011_dma_rx_irq()
993 uap->im |= UART011_RXIM; in pl011_dma_rx_irq()
994 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_rx_irq()
1000 struct uart_amba_port *uap = data; in pl011_dma_rx_callback() local
1001 struct pl011_dmarx_data *dmarx = &uap->dmarx; in pl011_dma_rx_callback()
1017 spin_lock_irq(&uap->port.lock); in pl011_dma_rx_callback()
1028 uap->dmarx.running = false; in pl011_dma_rx_callback()
1030 ret = pl011_dma_rx_trigger_dma(uap); in pl011_dma_rx_callback()
1032 pl011_dma_rx_chars(uap, pending, lastbuf, false); in pl011_dma_rx_callback()
1033 spin_unlock_irq(&uap->port.lock); in pl011_dma_rx_callback()
1039 dev_dbg(uap->port.dev, "could not retrigger RX DMA job " in pl011_dma_rx_callback()
1041 uap->im |= UART011_RXIM; in pl011_dma_rx_callback()
1042 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_rx_callback()
1051 static inline void pl011_dma_rx_stop(struct uart_amba_port *uap) in pl011_dma_rx_stop() argument
1054 uap->dmacr &= ~UART011_RXDMAE; in pl011_dma_rx_stop()
1055 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_rx_stop()
1065 struct uart_amba_port *uap = from_timer(uap, t, dmarx.timer); in pl011_dma_rx_poll() local
1066 struct tty_port *port = &uap->port.state->port; in pl011_dma_rx_poll()
1067 struct pl011_dmarx_data *dmarx = &uap->dmarx; in pl011_dma_rx_poll()
1068 struct dma_chan *rxchan = uap->dmarx.chan; in pl011_dma_rx_poll()
1076 sgbuf = dmarx->use_buf_b ? &uap->dmarx.sgbuf_b : &uap->dmarx.sgbuf_a; in pl011_dma_rx_poll()
1094 > uap->dmarx.poll_timeout) { in pl011_dma_rx_poll()
1096 spin_lock_irqsave(&uap->port.lock, flags); in pl011_dma_rx_poll()
1097 pl011_dma_rx_stop(uap); in pl011_dma_rx_poll()
1098 uap->im |= UART011_RXIM; in pl011_dma_rx_poll()
1099 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_rx_poll()
1100 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_dma_rx_poll()
1102 uap->dmarx.running = false; in pl011_dma_rx_poll()
1104 del_timer(&uap->dmarx.timer); in pl011_dma_rx_poll()
1106 mod_timer(&uap->dmarx.timer, in pl011_dma_rx_poll()
1107 jiffies + msecs_to_jiffies(uap->dmarx.poll_rate)); in pl011_dma_rx_poll()
1111 static void pl011_dma_startup(struct uart_amba_port *uap) in pl011_dma_startup() argument
1115 if (!uap->dma_probed) in pl011_dma_startup()
1116 pl011_dma_probe(uap); in pl011_dma_startup()
1118 if (!uap->dmatx.chan) in pl011_dma_startup()
1121 uap->dmatx.buf = kmalloc(PL011_DMA_BUFFER_SIZE, GFP_KERNEL | __GFP_DMA); in pl011_dma_startup()
1122 if (!uap->dmatx.buf) { in pl011_dma_startup()
1123 dev_err(uap->port.dev, "no memory for DMA TX buffer\n"); in pl011_dma_startup()
1124 uap->port.fifosize = uap->fifosize; in pl011_dma_startup()
1128 sg_init_one(&uap->dmatx.sg, uap->dmatx.buf, PL011_DMA_BUFFER_SIZE); in pl011_dma_startup()
1131 uap->port.fifosize = PL011_DMA_BUFFER_SIZE; in pl011_dma_startup()
1132 uap->using_tx_dma = true; in pl011_dma_startup()
1134 if (!uap->dmarx.chan) in pl011_dma_startup()
1138 ret = pl011_sgbuf_init(uap->dmarx.chan, &uap->dmarx.sgbuf_a, in pl011_dma_startup()
1141 dev_err(uap->port.dev, "failed to init DMA %s: %d\n", in pl011_dma_startup()
1146 ret = pl011_sgbuf_init(uap->dmarx.chan, &uap->dmarx.sgbuf_b, in pl011_dma_startup()
1149 dev_err(uap->port.dev, "failed to init DMA %s: %d\n", in pl011_dma_startup()
1151 pl011_sgbuf_free(uap->dmarx.chan, &uap->dmarx.sgbuf_a, in pl011_dma_startup()
1156 uap->using_rx_dma = true; in pl011_dma_startup()
1160 uap->dmacr |= UART011_DMAONERR; in pl011_dma_startup()
1161 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_startup()
1168 if (uap->vendor->dma_threshold) in pl011_dma_startup()
1170 uap, REG_ST_DMAWM); in pl011_dma_startup()
1172 if (uap->using_rx_dma) { in pl011_dma_startup()
1173 if (pl011_dma_rx_trigger_dma(uap)) in pl011_dma_startup()
1174 dev_dbg(uap->port.dev, "could not trigger initial " in pl011_dma_startup()
1176 if (uap->dmarx.poll_rate) { in pl011_dma_startup()
1177 timer_setup(&uap->dmarx.timer, pl011_dma_rx_poll, 0); in pl011_dma_startup()
1178 mod_timer(&uap->dmarx.timer, in pl011_dma_startup()
1180 msecs_to_jiffies(uap->dmarx.poll_rate)); in pl011_dma_startup()
1181 uap->dmarx.last_residue = PL011_DMA_BUFFER_SIZE; in pl011_dma_startup()
1182 uap->dmarx.last_jiffies = jiffies; in pl011_dma_startup()
1187 static void pl011_dma_shutdown(struct uart_amba_port *uap) in pl011_dma_shutdown() argument
1189 if (!(uap->using_tx_dma || uap->using_rx_dma)) in pl011_dma_shutdown()
1193 while (pl011_read(uap, REG_FR) & uap->vendor->fr_busy) in pl011_dma_shutdown()
1196 spin_lock_irq(&uap->port.lock); in pl011_dma_shutdown()
1197 uap->dmacr &= ~(UART011_DMAONERR | UART011_RXDMAE | UART011_TXDMAE); in pl011_dma_shutdown()
1198 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_shutdown()
1199 spin_unlock_irq(&uap->port.lock); in pl011_dma_shutdown()
1201 if (uap->using_tx_dma) { in pl011_dma_shutdown()
1203 dmaengine_terminate_all(uap->dmatx.chan); in pl011_dma_shutdown()
1204 if (uap->dmatx.queued) { in pl011_dma_shutdown()
1205 dma_unmap_sg(uap->dmatx.chan->device->dev, &uap->dmatx.sg, 1, in pl011_dma_shutdown()
1207 uap->dmatx.queued = false; in pl011_dma_shutdown()
1210 kfree(uap->dmatx.buf); in pl011_dma_shutdown()
1211 uap->using_tx_dma = false; in pl011_dma_shutdown()
1214 if (uap->using_rx_dma) { in pl011_dma_shutdown()
1215 dmaengine_terminate_all(uap->dmarx.chan); in pl011_dma_shutdown()
1217 pl011_sgbuf_free(uap->dmarx.chan, &uap->dmarx.sgbuf_a, DMA_FROM_DEVICE); in pl011_dma_shutdown()
1218 pl011_sgbuf_free(uap->dmarx.chan, &uap->dmarx.sgbuf_b, DMA_FROM_DEVICE); in pl011_dma_shutdown()
1219 if (uap->dmarx.poll_rate) in pl011_dma_shutdown()
1220 del_timer_sync(&uap->dmarx.timer); in pl011_dma_shutdown()
1221 uap->using_rx_dma = false; in pl011_dma_shutdown()
1225 static inline bool pl011_dma_rx_available(struct uart_amba_port *uap) in pl011_dma_rx_available() argument
1227 return uap->using_rx_dma; in pl011_dma_rx_available()
1230 static inline bool pl011_dma_rx_running(struct uart_amba_port *uap) in pl011_dma_rx_running() argument
1232 return uap->using_rx_dma && uap->dmarx.running; in pl011_dma_rx_running()
1237 static inline void pl011_dma_remove(struct uart_amba_port *uap) in pl011_dma_remove() argument
1241 static inline void pl011_dma_startup(struct uart_amba_port *uap) in pl011_dma_startup() argument
1245 static inline void pl011_dma_shutdown(struct uart_amba_port *uap) in pl011_dma_shutdown() argument
1249 static inline bool pl011_dma_tx_irq(struct uart_amba_port *uap) in pl011_dma_tx_irq() argument
1254 static inline void pl011_dma_tx_stop(struct uart_amba_port *uap) in pl011_dma_tx_stop() argument
1258 static inline bool pl011_dma_tx_start(struct uart_amba_port *uap) in pl011_dma_tx_start() argument
1263 static inline void pl011_dma_rx_irq(struct uart_amba_port *uap) in pl011_dma_rx_irq() argument
1267 static inline void pl011_dma_rx_stop(struct uart_amba_port *uap) in pl011_dma_rx_stop() argument
1271 static inline int pl011_dma_rx_trigger_dma(struct uart_amba_port *uap) in pl011_dma_rx_trigger_dma() argument
1276 static inline bool pl011_dma_rx_available(struct uart_amba_port *uap) in pl011_dma_rx_available() argument
1281 static inline bool pl011_dma_rx_running(struct uart_amba_port *uap) in pl011_dma_rx_running() argument
1289 static void pl011_rs485_tx_stop(struct uart_amba_port *uap) in pl011_rs485_tx_stop() argument
1291 struct uart_port *port = &uap->port; in pl011_rs485_tx_stop()
1303 udelay(uap->rs485_tx_drain_interval); in pl011_rs485_tx_stop()
1310 cr = pl011_read(uap, REG_CR); in pl011_rs485_tx_stop()
1320 pl011_write(cr, uap, REG_CR); in pl011_rs485_tx_stop()
1322 uap->rs485_tx_started = false; in pl011_rs485_tx_stop()
1327 struct uart_amba_port *uap = in pl011_stop_tx() local
1330 uap->im &= ~UART011_TXIM; in pl011_stop_tx()
1331 pl011_write(uap->im, uap, REG_IMSC); in pl011_stop_tx()
1332 pl011_dma_tx_stop(uap); in pl011_stop_tx()
1334 if ((port->rs485.flags & SER_RS485_ENABLED) && uap->rs485_tx_started) in pl011_stop_tx()
1335 pl011_rs485_tx_stop(uap); in pl011_stop_tx()
1338 static bool pl011_tx_chars(struct uart_amba_port *uap, bool from_irq);
1341 static void pl011_start_tx_pio(struct uart_amba_port *uap) in pl011_start_tx_pio() argument
1343 if (pl011_tx_chars(uap, false)) { in pl011_start_tx_pio()
1344 uap->im |= UART011_TXIM; in pl011_start_tx_pio()
1345 pl011_write(uap->im, uap, REG_IMSC); in pl011_start_tx_pio()
1351 struct uart_amba_port *uap = in pl011_start_tx() local
1354 if (!pl011_dma_tx_start(uap)) in pl011_start_tx()
1355 pl011_start_tx_pio(uap); in pl011_start_tx()
1360 struct uart_amba_port *uap = in pl011_stop_rx() local
1363 uap->im &= ~(UART011_RXIM|UART011_RTIM|UART011_FEIM| in pl011_stop_rx()
1365 pl011_write(uap->im, uap, REG_IMSC); in pl011_stop_rx()
1367 pl011_dma_rx_stop(uap); in pl011_stop_rx()
1372 struct uart_amba_port *uap = in pl011_enable_ms() local
1375 uap->im |= UART011_RIMIM|UART011_CTSMIM|UART011_DCDMIM|UART011_DSRMIM; in pl011_enable_ms()
1376 pl011_write(uap->im, uap, REG_IMSC); in pl011_enable_ms()
1379 static void pl011_rx_chars(struct uart_amba_port *uap) in pl011_rx_chars() argument
1380 __releases(&uap->port.lock) in pl011_rx_chars()
1381 __acquires(&uap->port.lock) in pl011_rx_chars()
1383 pl011_fifo_to_tty(uap); in pl011_rx_chars()
1385 spin_unlock(&uap->port.lock); in pl011_rx_chars()
1386 tty_flip_buffer_push(&uap->port.state->port); in pl011_rx_chars()
1391 if (pl011_dma_rx_available(uap)) { in pl011_rx_chars()
1392 if (pl011_dma_rx_trigger_dma(uap)) { in pl011_rx_chars()
1393 dev_dbg(uap->port.dev, "could not trigger RX DMA job " in pl011_rx_chars()
1395 uap->im |= UART011_RXIM; in pl011_rx_chars()
1396 pl011_write(uap->im, uap, REG_IMSC); in pl011_rx_chars()
1400 if (uap->dmarx.poll_rate) { in pl011_rx_chars()
1401 uap->dmarx.last_jiffies = jiffies; in pl011_rx_chars()
1402 uap->dmarx.last_residue = PL011_DMA_BUFFER_SIZE; in pl011_rx_chars()
1403 mod_timer(&uap->dmarx.timer, in pl011_rx_chars()
1405 msecs_to_jiffies(uap->dmarx.poll_rate)); in pl011_rx_chars()
1410 spin_lock(&uap->port.lock); in pl011_rx_chars()
1413 static bool pl011_tx_char(struct uart_amba_port *uap, unsigned char c, in pl011_tx_char() argument
1417 pl011_read(uap, REG_FR) & UART01x_FR_TXFF) in pl011_tx_char()
1420 pl011_write(c, uap, REG_DR); in pl011_tx_char()
1421 uap->port.icount.tx++; in pl011_tx_char()
1426 static void pl011_rs485_tx_start(struct uart_amba_port *uap) in pl011_rs485_tx_start() argument
1428 struct uart_port *port = &uap->port; in pl011_rs485_tx_start()
1432 cr = pl011_read(uap, REG_CR); in pl011_rs485_tx_start()
1444 pl011_write(cr, uap, REG_CR); in pl011_rs485_tx_start()
1449 uap->rs485_tx_started = true; in pl011_rs485_tx_start()
1453 static bool pl011_tx_chars(struct uart_amba_port *uap, bool from_irq) in pl011_tx_chars() argument
1455 struct circ_buf *xmit = &uap->port.state->xmit; in pl011_tx_chars()
1456 int count = uap->fifosize >> 1; in pl011_tx_chars()
1458 if (uap->port.x_char) { in pl011_tx_chars()
1459 if (!pl011_tx_char(uap, uap->port.x_char, from_irq)) in pl011_tx_chars()
1461 uap->port.x_char = 0; in pl011_tx_chars()
1464 if (uart_circ_empty(xmit) || uart_tx_stopped(&uap->port)) { in pl011_tx_chars()
1465 pl011_stop_tx(&uap->port); in pl011_tx_chars()
1469 if ((uap->port.rs485.flags & SER_RS485_ENABLED) && in pl011_tx_chars()
1470 !uap->rs485_tx_started) in pl011_tx_chars()
1471 pl011_rs485_tx_start(uap); in pl011_tx_chars()
1474 if (pl011_dma_tx_irq(uap)) in pl011_tx_chars()
1481 if (!pl011_tx_char(uap, xmit->buf[xmit->tail], from_irq)) in pl011_tx_chars()
1488 uart_write_wakeup(&uap->port); in pl011_tx_chars()
1491 pl011_stop_tx(&uap->port); in pl011_tx_chars()
1497 static void pl011_modem_status(struct uart_amba_port *uap) in pl011_modem_status() argument
1501 status = pl011_read(uap, REG_FR) & UART01x_FR_MODEM_ANY; in pl011_modem_status()
1503 delta = status ^ uap->old_status; in pl011_modem_status()
1504 uap->old_status = status; in pl011_modem_status()
1510 uart_handle_dcd_change(&uap->port, status & UART01x_FR_DCD); in pl011_modem_status()
1512 if (delta & uap->vendor->fr_dsr) in pl011_modem_status()
1513 uap->port.icount.dsr++; in pl011_modem_status()
1515 if (delta & uap->vendor->fr_cts) in pl011_modem_status()
1516 uart_handle_cts_change(&uap->port, in pl011_modem_status()
1517 status & uap->vendor->fr_cts); in pl011_modem_status()
1519 wake_up_interruptible(&uap->port.state->port.delta_msr_wait); in pl011_modem_status()
1522 static void check_apply_cts_event_workaround(struct uart_amba_port *uap) in check_apply_cts_event_workaround() argument
1524 if (!uap->vendor->cts_event_workaround) in check_apply_cts_event_workaround()
1528 pl011_write(0x00, uap, REG_ICR); in check_apply_cts_event_workaround()
1535 pl011_read(uap, REG_ICR); in check_apply_cts_event_workaround()
1536 pl011_read(uap, REG_ICR); in check_apply_cts_event_workaround()
1541 struct uart_amba_port *uap = dev_id; in pl011_int() local
1546 spin_lock_irqsave(&uap->port.lock, flags); in pl011_int()
1547 status = pl011_read(uap, REG_RIS) & uap->im; in pl011_int()
1550 check_apply_cts_event_workaround(uap); in pl011_int()
1554 uap, REG_ICR); in pl011_int()
1557 if (pl011_dma_rx_running(uap)) in pl011_int()
1558 pl011_dma_rx_irq(uap); in pl011_int()
1560 pl011_rx_chars(uap); in pl011_int()
1564 pl011_modem_status(uap); in pl011_int()
1566 pl011_tx_chars(uap, true); in pl011_int()
1571 status = pl011_read(uap, REG_RIS) & uap->im; in pl011_int()
1576 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_int()
1583 struct uart_amba_port *uap = in pl011_tx_empty() local
1587 unsigned int status = pl011_read(uap, REG_FR) ^ uap->vendor->inv_fr; in pl011_tx_empty()
1589 return status & (uap->vendor->fr_busy | UART01x_FR_TXFF) ? in pl011_tx_empty()
1595 struct uart_amba_port *uap = in pl011_get_mctrl() local
1598 unsigned int status = pl011_read(uap, REG_FR); in pl011_get_mctrl()
1605 TIOCMBIT(uap->vendor->fr_dsr, TIOCM_DSR); in pl011_get_mctrl()
1606 TIOCMBIT(uap->vendor->fr_cts, TIOCM_CTS); in pl011_get_mctrl()
1607 TIOCMBIT(uap->vendor->fr_ri, TIOCM_RNG); in pl011_get_mctrl()
1614 struct uart_amba_port *uap = in pl011_set_mctrl() local
1621 cr = pl011_read(uap, REG_CR); in pl011_set_mctrl()
1641 pl011_write(cr, uap, REG_CR); in pl011_set_mctrl()
1646 struct uart_amba_port *uap = in pl011_break_ctl() local
1651 spin_lock_irqsave(&uap->port.lock, flags); in pl011_break_ctl()
1652 lcr_h = pl011_read(uap, REG_LCRH_TX); in pl011_break_ctl()
1657 pl011_write(lcr_h, uap, REG_LCRH_TX); in pl011_break_ctl()
1658 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_break_ctl()
1665 struct uart_amba_port *uap = in pl011_quiesce_irqs() local
1668 pl011_write(pl011_read(uap, REG_MIS), uap, REG_ICR); in pl011_quiesce_irqs()
1682 pl011_write(pl011_read(uap, REG_IMSC) & ~UART011_TXIM, uap, in pl011_quiesce_irqs()
1688 struct uart_amba_port *uap = in pl011_get_poll_char() local
1698 status = pl011_read(uap, REG_FR); in pl011_get_poll_char()
1702 return pl011_read(uap, REG_DR); in pl011_get_poll_char()
1708 struct uart_amba_port *uap = in pl011_put_poll_char() local
1711 while (pl011_read(uap, REG_FR) & UART01x_FR_TXFF) in pl011_put_poll_char()
1714 pl011_write(ch, uap, REG_DR); in pl011_put_poll_char()
1721 struct uart_amba_port *uap = in pl011_hwinit() local
1731 retval = clk_prepare_enable(uap->clk); in pl011_hwinit()
1735 uap->port.uartclk = clk_get_rate(uap->clk); in pl011_hwinit()
1740 uap, REG_ICR); in pl011_hwinit()
1746 uap->im = pl011_read(uap, REG_IMSC); in pl011_hwinit()
1747 pl011_write(UART011_RTIM | UART011_RXIM, uap, REG_IMSC); in pl011_hwinit()
1749 if (dev_get_platdata(uap->port.dev)) { in pl011_hwinit()
1752 plat = dev_get_platdata(uap->port.dev); in pl011_hwinit()
1759 static bool pl011_split_lcrh(const struct uart_amba_port *uap) in pl011_split_lcrh() argument
1761 return pl011_reg_to_offset(uap, REG_LCRH_RX) != in pl011_split_lcrh()
1762 pl011_reg_to_offset(uap, REG_LCRH_TX); in pl011_split_lcrh()
1765 static void pl011_write_lcr_h(struct uart_amba_port *uap, unsigned int lcr_h) in pl011_write_lcr_h() argument
1767 pl011_write(lcr_h, uap, REG_LCRH_RX); in pl011_write_lcr_h()
1768 if (pl011_split_lcrh(uap)) { in pl011_write_lcr_h()
1775 pl011_write(0xff, uap, REG_MIS); in pl011_write_lcr_h()
1776 pl011_write(lcr_h, uap, REG_LCRH_TX); in pl011_write_lcr_h()
1780 static int pl011_allocate_irq(struct uart_amba_port *uap) in pl011_allocate_irq() argument
1782 pl011_write(uap->im, uap, REG_IMSC); in pl011_allocate_irq()
1784 return request_irq(uap->port.irq, pl011_int, IRQF_SHARED, "uart-pl011", uap); in pl011_allocate_irq()
1792 static void pl011_enable_interrupts(struct uart_amba_port *uap) in pl011_enable_interrupts() argument
1796 spin_lock_irq(&uap->port.lock); in pl011_enable_interrupts()
1799 pl011_write(UART011_RTIS | UART011_RXIS, uap, REG_ICR); in pl011_enable_interrupts()
1807 for (i = 0; i < uap->fifosize * 2; ++i) { in pl011_enable_interrupts()
1808 if (pl011_read(uap, REG_FR) & UART01x_FR_RXFE) in pl011_enable_interrupts()
1811 pl011_read(uap, REG_DR); in pl011_enable_interrupts()
1814 uap->im = UART011_RTIM; in pl011_enable_interrupts()
1815 if (!pl011_dma_rx_running(uap)) in pl011_enable_interrupts()
1816 uap->im |= UART011_RXIM; in pl011_enable_interrupts()
1817 pl011_write(uap->im, uap, REG_IMSC); in pl011_enable_interrupts()
1818 spin_unlock_irq(&uap->port.lock); in pl011_enable_interrupts()
1823 struct uart_amba_port *uap = in pl011_startup() local
1832 retval = pl011_allocate_irq(uap); in pl011_startup()
1836 pl011_write(uap->vendor->ifls, uap, REG_IFLS); in pl011_startup()
1838 spin_lock_irq(&uap->port.lock); in pl011_startup()
1841 cr = uap->old_cr & (UART011_CR_RTS | UART011_CR_DTR); in pl011_startup()
1853 pl011_write(cr, uap, REG_CR); in pl011_startup()
1855 spin_unlock_irq(&uap->port.lock); in pl011_startup()
1860 uap->old_status = pl011_read(uap, REG_FR) & UART01x_FR_MODEM_ANY; in pl011_startup()
1863 pl011_dma_startup(uap); in pl011_startup()
1865 pl011_enable_interrupts(uap); in pl011_startup()
1870 clk_disable_unprepare(uap->clk); in pl011_startup()
1876 struct uart_amba_port *uap = in sbsa_uart_startup() local
1884 retval = pl011_allocate_irq(uap); in sbsa_uart_startup()
1889 uap->old_status = 0; in sbsa_uart_startup()
1891 pl011_enable_interrupts(uap); in sbsa_uart_startup()
1896 static void pl011_shutdown_channel(struct uart_amba_port *uap, in pl011_shutdown_channel() argument
1901 val = pl011_read(uap, lcrh); in pl011_shutdown_channel()
1903 pl011_write(val, uap, lcrh); in pl011_shutdown_channel()
1911 static void pl011_disable_uart(struct uart_amba_port *uap) in pl011_disable_uart() argument
1915 uap->port.status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS); in pl011_disable_uart()
1916 spin_lock_irq(&uap->port.lock); in pl011_disable_uart()
1917 cr = pl011_read(uap, REG_CR); in pl011_disable_uart()
1918 uap->old_cr = cr; in pl011_disable_uart()
1921 pl011_write(cr, uap, REG_CR); in pl011_disable_uart()
1922 spin_unlock_irq(&uap->port.lock); in pl011_disable_uart()
1927 pl011_shutdown_channel(uap, REG_LCRH_RX); in pl011_disable_uart()
1928 if (pl011_split_lcrh(uap)) in pl011_disable_uart()
1929 pl011_shutdown_channel(uap, REG_LCRH_TX); in pl011_disable_uart()
1932 static void pl011_disable_interrupts(struct uart_amba_port *uap) in pl011_disable_interrupts() argument
1934 spin_lock_irq(&uap->port.lock); in pl011_disable_interrupts()
1937 uap->im = 0; in pl011_disable_interrupts()
1938 pl011_write(uap->im, uap, REG_IMSC); in pl011_disable_interrupts()
1939 pl011_write(0xffff, uap, REG_ICR); in pl011_disable_interrupts()
1941 spin_unlock_irq(&uap->port.lock); in pl011_disable_interrupts()
1946 struct uart_amba_port *uap = in pl011_shutdown() local
1949 pl011_disable_interrupts(uap); in pl011_shutdown()
1951 pl011_dma_shutdown(uap); in pl011_shutdown()
1953 if ((port->rs485.flags & SER_RS485_ENABLED) && uap->rs485_tx_started) in pl011_shutdown()
1954 pl011_rs485_tx_stop(uap); in pl011_shutdown()
1956 free_irq(uap->port.irq, uap); in pl011_shutdown()
1958 pl011_disable_uart(uap); in pl011_shutdown()
1963 clk_disable_unprepare(uap->clk); in pl011_shutdown()
1967 if (dev_get_platdata(uap->port.dev)) { in pl011_shutdown()
1970 plat = dev_get_platdata(uap->port.dev); in pl011_shutdown()
1975 if (uap->port.ops->flush_buffer) in pl011_shutdown()
1976 uap->port.ops->flush_buffer(port); in pl011_shutdown()
1981 struct uart_amba_port *uap = in sbsa_uart_shutdown() local
1984 pl011_disable_interrupts(uap); in sbsa_uart_shutdown()
1986 free_irq(uap->port.irq, uap); in sbsa_uart_shutdown()
1988 if (uap->port.ops->flush_buffer) in sbsa_uart_shutdown()
1989 uap->port.ops->flush_buffer(port); in sbsa_uart_shutdown()
2028 struct uart_amba_port *uap = in pl011_set_termios() local
2035 if (uap->vendor->oversampling) in pl011_set_termios()
2049 if (uap->dmarx.auto_poll_rate) in pl011_set_termios()
2050 uap->dmarx.poll_rate = DIV_ROUND_UP(10000000, baud); in pl011_set_termios()
2081 if (uap->fifosize > 1) in pl011_set_termios()
2098 uap->rs485_tx_drain_interval = (bits * 1000 * 1000) / baud; in pl011_set_termios()
2109 old_cr = pl011_read(uap, REG_CR); in pl011_set_termios()
2110 pl011_write(0, uap, REG_CR); in pl011_set_termios()
2123 if (uap->vendor->oversampling) { in pl011_set_termios()
2136 if (uap->vendor->oversampling) { in pl011_set_termios()
2143 pl011_write(quot & 0x3f, uap, REG_FBRD); in pl011_set_termios()
2144 pl011_write(quot >> 6, uap, REG_IBRD); in pl011_set_termios()
2152 pl011_write_lcr_h(uap, lcr_h); in pl011_set_termios()
2153 pl011_write(old_cr, uap, REG_CR); in pl011_set_termios()
2162 struct uart_amba_port *uap = in sbsa_uart_set_termios() local
2166 tty_termios_encode_baud_rate(termios, uap->fixed_baud, uap->fixed_baud); in sbsa_uart_set_termios()
2174 uart_update_timeout(port, CS8, uap->fixed_baud); in sbsa_uart_set_termios()
2181 struct uart_amba_port *uap = in pl011_type() local
2183 return uap->port.type == PORT_AMBA ? uap->type : NULL; in pl011_type()
2232 struct uart_amba_port *uap = in pl011_rs485_config() local
2247 pl011_rs485_tx_stop(uap); in pl011_rs485_config()
2254 u32 cr = pl011_read(uap, REG_CR); in pl011_rs485_config()
2257 pl011_write(cr, uap, REG_CR); in pl011_rs485_config()
2326 struct uart_amba_port *uap = in pl011_console_putchar() local
2329 while (pl011_read(uap, REG_FR) & UART01x_FR_TXFF) in pl011_console_putchar()
2331 pl011_write(ch, uap, REG_DR); in pl011_console_putchar()
2337 struct uart_amba_port *uap = amba_ports[co->index]; in pl011_console_write() local
2342 clk_enable(uap->clk); in pl011_console_write()
2345 if (uap->port.sysrq) in pl011_console_write()
2348 locked = spin_trylock(&uap->port.lock); in pl011_console_write()
2350 spin_lock(&uap->port.lock); in pl011_console_write()
2355 if (!uap->vendor->always_enabled) { in pl011_console_write()
2356 old_cr = pl011_read(uap, REG_CR); in pl011_console_write()
2359 pl011_write(new_cr, uap, REG_CR); in pl011_console_write()
2362 uart_console_write(&uap->port, s, count, pl011_console_putchar); in pl011_console_write()
2369 while ((pl011_read(uap, REG_FR) ^ uap->vendor->inv_fr) in pl011_console_write()
2370 & uap->vendor->fr_busy) in pl011_console_write()
2372 if (!uap->vendor->always_enabled) in pl011_console_write()
2373 pl011_write(old_cr, uap, REG_CR); in pl011_console_write()
2376 spin_unlock(&uap->port.lock); in pl011_console_write()
2379 clk_disable(uap->clk); in pl011_console_write()
2382 static void pl011_console_get_options(struct uart_amba_port *uap, int *baud, in pl011_console_get_options() argument
2385 if (pl011_read(uap, REG_CR) & UART01x_CR_UARTEN) { in pl011_console_get_options()
2388 lcr_h = pl011_read(uap, REG_LCRH_TX); in pl011_console_get_options()
2403 ibrd = pl011_read(uap, REG_IBRD); in pl011_console_get_options()
2404 fbrd = pl011_read(uap, REG_FBRD); in pl011_console_get_options()
2406 *baud = uap->port.uartclk * 4 / (64 * ibrd + fbrd); in pl011_console_get_options()
2408 if (uap->vendor->oversampling) { in pl011_console_get_options()
2409 if (pl011_read(uap, REG_CR) in pl011_console_get_options()
2418 struct uart_amba_port *uap; in pl011_console_setup() local
2432 uap = amba_ports[co->index]; in pl011_console_setup()
2433 if (!uap) in pl011_console_setup()
2437 pinctrl_pm_select_default_state(uap->port.dev); in pl011_console_setup()
2439 ret = clk_prepare(uap->clk); in pl011_console_setup()
2443 if (dev_get_platdata(uap->port.dev)) { in pl011_console_setup()
2446 plat = dev_get_platdata(uap->port.dev); in pl011_console_setup()
2451 uap->port.uartclk = clk_get_rate(uap->clk); in pl011_console_setup()
2453 if (uap->vendor->fixed_options) { in pl011_console_setup()
2454 baud = uap->fixed_baud; in pl011_console_setup()
2460 pl011_console_get_options(uap, &baud, &parity, &bits); in pl011_console_setup()
2463 return uart_set_options(&uap->port, co, baud, parity, bits, flow); in pl011_console_setup()
2701 static void pl011_unregister_port(struct uart_amba_port *uap) in pl011_unregister_port() argument
2707 if (amba_ports[i] == uap) in pl011_unregister_port()
2712 pl011_dma_remove(uap); in pl011_unregister_port()
2728 static int pl011_get_rs485_mode(struct uart_amba_port *uap) in pl011_get_rs485_mode() argument
2730 struct uart_port *port = &uap->port; in pl011_get_rs485_mode()
2745 static int pl011_setup_port(struct device *dev, struct uart_amba_port *uap, in pl011_setup_port() argument
2757 uap->old_cr = 0; in pl011_setup_port()
2758 uap->port.dev = dev; in pl011_setup_port()
2759 uap->port.mapbase = mmiobase->start; in pl011_setup_port()
2760 uap->port.membase = base; in pl011_setup_port()
2761 uap->port.fifosize = uap->fifosize; in pl011_setup_port()
2762 uap->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_AMBA_PL011_CONSOLE); in pl011_setup_port()
2763 uap->port.flags = UPF_BOOT_AUTOCONF; in pl011_setup_port()
2764 uap->port.line = index; in pl011_setup_port()
2766 ret = pl011_get_rs485_mode(uap); in pl011_setup_port()
2770 amba_ports[index] = uap; in pl011_setup_port()
2775 static int pl011_register_port(struct uart_amba_port *uap) in pl011_register_port() argument
2780 pl011_write(0, uap, REG_IMSC); in pl011_register_port()
2781 pl011_write(0xffff, uap, REG_ICR); in pl011_register_port()
2786 dev_err(uap->port.dev, in pl011_register_port()
2789 if (amba_ports[i] == uap) in pl011_register_port()
2795 ret = uart_add_one_port(&amba_reg, &uap->port); in pl011_register_port()
2797 pl011_unregister_port(uap); in pl011_register_port()
2804 struct uart_amba_port *uap; in pl011_probe() local
2812 uap = devm_kzalloc(&dev->dev, sizeof(struct uart_amba_port), in pl011_probe()
2814 if (!uap) in pl011_probe()
2817 uap->clk = devm_clk_get(&dev->dev, NULL); in pl011_probe()
2818 if (IS_ERR(uap->clk)) in pl011_probe()
2819 return PTR_ERR(uap->clk); in pl011_probe()
2821 uap->reg_offset = vendor->reg_offset; in pl011_probe()
2822 uap->vendor = vendor; in pl011_probe()
2823 uap->fifosize = vendor->get_fifosize(dev); in pl011_probe()
2824 uap->port.iotype = vendor->access_32b ? UPIO_MEM32 : UPIO_MEM; in pl011_probe()
2825 uap->port.irq = dev->irq[0]; in pl011_probe()
2826 uap->port.ops = &amba_pl011_pops; in pl011_probe()
2827 uap->port.rs485_config = pl011_rs485_config; in pl011_probe()
2828 snprintf(uap->type, sizeof(uap->type), "PL011 rev%u", amba_rev(dev)); in pl011_probe()
2830 ret = pl011_setup_port(&dev->dev, uap, &dev->res, portnr); in pl011_probe()
2834 amba_set_drvdata(dev, uap); in pl011_probe()
2836 return pl011_register_port(uap); in pl011_probe()
2841 struct uart_amba_port *uap = amba_get_drvdata(dev); in pl011_remove() local
2843 uart_remove_one_port(&amba_reg, &uap->port); in pl011_remove()
2844 pl011_unregister_port(uap); in pl011_remove()
2850 struct uart_amba_port *uap = dev_get_drvdata(dev); in pl011_suspend() local
2852 if (!uap) in pl011_suspend()
2855 return uart_suspend_port(&amba_reg, &uap->port); in pl011_suspend()
2860 struct uart_amba_port *uap = dev_get_drvdata(dev); in pl011_resume() local
2862 if (!uap) in pl011_resume()
2865 return uart_resume_port(&amba_reg, &uap->port); in pl011_resume()
2873 struct uart_amba_port *uap; in sbsa_uart_probe() local
2896 uap = devm_kzalloc(&pdev->dev, sizeof(struct uart_amba_port), in sbsa_uart_probe()
2898 if (!uap) in sbsa_uart_probe()
2904 uap->port.irq = ret; in sbsa_uart_probe()
2909 uap->vendor = &vendor_qdt_qdf2400_e44; in sbsa_uart_probe()
2912 uap->vendor = &vendor_sbsa; in sbsa_uart_probe()
2914 uap->reg_offset = uap->vendor->reg_offset; in sbsa_uart_probe()
2915 uap->fifosize = 32; in sbsa_uart_probe()
2916 uap->port.iotype = uap->vendor->access_32b ? UPIO_MEM32 : UPIO_MEM; in sbsa_uart_probe()
2917 uap->port.ops = &sbsa_uart_pops; in sbsa_uart_probe()
2918 uap->fixed_baud = baudrate; in sbsa_uart_probe()
2920 snprintf(uap->type, sizeof(uap->type), "SBSA"); in sbsa_uart_probe()
2924 ret = pl011_setup_port(&pdev->dev, uap, r, portnr); in sbsa_uart_probe()
2928 platform_set_drvdata(pdev, uap); in sbsa_uart_probe()
2930 return pl011_register_port(uap); in sbsa_uart_probe()
2935 struct uart_amba_port *uap = platform_get_drvdata(pdev); in sbsa_uart_remove() local
2937 uart_remove_one_port(&amba_reg, &uap->port); in sbsa_uart_remove()
2938 pl011_unregister_port(uap); in sbsa_uart_remove()