Lines Matching +full:preserve +full:- +full:clocking
1 // SPDX-License-Identifier: GPL-2.0
3 * Probe module for 8250/16550-type PCI serial ports.
29 * > 0 - number of ports
30 * = 0 - use board->num_ports
31 * < 0 - error
78 dev_err(&dev->dev, in moan_device()
80 "Please send the output of lspci -vv, this\n" in moan_device()
83 "modem board to <linux-serial@vger.kernel.org>.\n", in moan_device()
84 pci_name(dev), str, dev->vendor, dev->device, in moan_device()
85 dev->subsystem_vendor, dev->subsystem_device); in moan_device()
92 struct pci_dev *dev = priv->dev; in setup_port()
95 return -EINVAL; in setup_port()
99 return -ENOMEM; in setup_port()
101 port->port.iotype = UPIO_MEM; in setup_port()
102 port->port.iobase = 0; in setup_port()
103 port->port.mapbase = pci_resource_start(dev, bar) + offset; in setup_port()
104 port->port.membase = pcim_iomap_table(dev)[bar] + offset; in setup_port()
105 port->port.regshift = regshift; in setup_port()
107 port->port.iotype = UPIO_PORT; in setup_port()
108 port->port.iobase = pci_resource_start(dev, bar) + offset; in setup_port()
109 port->port.mapbase = 0; in setup_port()
110 port->port.membase = NULL; in setup_port()
111 port->port.regshift = 0; in setup_port()
117 * ADDI-DATA GmbH communication cards <info@addi-data.com>
123 unsigned int bar = 0, offset = board->first_offset; in addidata_apci7800_setup()
124 bar = FL_GET_BASE(board->flags); in addidata_apci7800_setup()
127 offset += idx * board->uart_offset; in addidata_apci7800_setup()
130 offset += ((idx - 2) * board->uart_offset); in addidata_apci7800_setup()
133 offset += ((idx - 4) * board->uart_offset); in addidata_apci7800_setup()
136 offset += ((idx - 6) * board->uart_offset); in addidata_apci7800_setup()
139 return setup_port(priv, port, bar, offset, board->reg_shift); in addidata_apci7800_setup()
144 * Not that ugly ;) -- HW
150 unsigned int bar, offset = board->first_offset; in afavlab_setup()
152 bar = FL_GET_BASE(board->flags); in afavlab_setup()
157 offset += (idx - 4) * board->uart_offset; in afavlab_setup()
160 return setup_port(priv, port, bar, offset, board->reg_shift); in afavlab_setup()
165 * different versions. N-class, L2000 and A500 have two Diva chips, each
174 switch (dev->subsystem_device) { in pci_hp_diva_init()
205 unsigned int offset = board->first_offset; in pci_hp_diva_setup()
206 unsigned int bar = FL_GET_BASE(board->flags); in pci_hp_diva_setup()
208 switch (priv->dev->subsystem_device) { in pci_hp_diva_setup()
223 offset += idx * board->uart_offset; in pci_hp_diva_setup()
225 return setup_port(priv, port, bar, offset, board->reg_shift); in pci_hp_diva_setup()
235 if (!(dev->subsystem_device & 0x1000)) in pci_inteli960ni_init()
236 return -ENODEV; in pci_inteli960ni_init()
241 dev_dbg(&dev->dev, "Local i960 firmware missing\n"); in pci_inteli960ni_init()
242 return -ENODEV; in pci_inteli960ni_init()
264 if (dev->vendor == PCI_VENDOR_ID_PANACOM || in pci_plx9050_init()
265 dev->subsystem_vendor == PCI_SUBVENDOR_ID_EXSYS) in pci_plx9050_init()
268 if ((dev->vendor == PCI_VENDOR_ID_PLX) && in pci_plx9050_init()
269 (dev->device == PCI_DEVICE_ID_PLX_ROMULUS)) in pci_plx9050_init()
284 return -ENOMEM; in pci_plx9050_init()
369 /* SBS Technologies Inc. PMC-OCTPRO and P-OCTAL cards */
374 unsigned int bar, offset = board->first_offset; in sbs_setup()
380 offset += idx * board->uart_offset; in sbs_setup()
383 offset += idx * board->uart_offset + 0xC00; in sbs_setup()
384 } else /* we have only 8 ports on PMC-OCTALPRO */ in sbs_setup()
387 return setup_port(priv, port, bar, offset, board->reg_shift); in sbs_setup()
397 /* global control register offset for SBS PMC-OctalPro */
407 return -ENOMEM; in sbs_init()
408 /* Set bit-4 Control Register (UART RESET) in to reset the uarts */ in sbs_init()
413 /* Set bit-2 (INTENABLE) of Control Register */ in sbs_init()
421 * Disables the global interrupt of PMC-OctalPro
437 * the UART clocking frequency. Each UART can be clocked independently
438 * (except cards equipped with 4 UARTs) and initial clocking settings
442 * high frequency clocking for all UART's on given card. It is safe (I
450 * - 10x cards have control registers in IO and/or memory space;
451 * - 20x cards have control registers in standard PCI configuration space.
470 switch (dev->device & 0xfff8) { in pci_siig10x_init()
484 return -ENOMEM; in pci_siig10x_init()
504 if (((dev->device & 0xfffc) == PCI_DEVICE_ID_SIIG_2S_20x) || in pci_siig20x_init()
505 ((dev->device & 0xfffc) == PCI_DEVICE_ID_SIIG_2S1P_20x)) { in pci_siig20x_init()
514 unsigned int type = dev->device & 0xff00; in pci_siig_init()
522 return -ENODEV; in pci_siig_init()
529 unsigned int bar = FL_GET_BASE(board->flags) + idx, offset = 0; in pci_siig_setup()
533 offset = (idx - 4) * 8; in pci_siig_setup()
588 * (0,2,3,5,6: serial only -- 7,8,9: serial + parallel) in pci_timedia_probe()
590 if ((dev->subsystem_device & 0x00f0) >= 0x70) { in pci_timedia_probe()
591 dev_info(&dev->dev, in pci_timedia_probe()
593 dev->subsystem_device); in pci_timedia_probe()
594 return -ENODEV; in pci_timedia_probe()
608 if (dev->subsystem_device == ids[j]) in pci_timedia_init()
616 * Ugh, this is ugly as all hell --- TYT
623 unsigned int bar = 0, offset = board->first_offset; in pci_timedia_setup()
630 offset = board->uart_offset; in pci_timedia_setup()
637 offset = board->uart_offset; in pci_timedia_setup()
643 bar = idx - 2; in pci_timedia_setup()
646 return setup_port(priv, port, bar, offset, board->reg_shift); in pci_timedia_setup()
657 unsigned int bar, offset = board->first_offset; in titan_400l_800l_setup()
668 offset = (idx - 2) * board->uart_offset; in titan_400l_800l_setup()
671 return setup_port(priv, port, bar, offset, board->reg_shift); in titan_400l_800l_setup()
692 return -ENOMEM; in pci_ni8420_init()
723 return -ENOMEM; in pci_ni8430_init()
730 pcibios_resource_to_bus(dev->bus, ®ion, &dev->resource[bar]); in pci_ni8430_init()
758 struct pci_dev *dev = priv->dev; in pci_ni8430_setup()
760 unsigned int bar, offset = board->first_offset; in pci_ni8430_setup()
762 if (idx >= board->num_ports) in pci_ni8430_setup()
765 bar = FL_GET_BASE(board->flags); in pci_ni8430_setup()
766 offset += idx * board->uart_offset; in pci_ni8430_setup()
770 return -ENOMEM; in pci_ni8430_setup()
778 return setup_port(priv, port, bar, offset, board->reg_shift); in pci_ni8430_setup()
787 if ((priv->dev->device != PCI_DEVICE_ID_NETMOS_9865) && in pci_netmos_9900_setup()
788 (priv->dev->subsystem_device & 0xff00) == 0x3000) { in pci_netmos_9900_setup()
794 return setup_port(priv, port, bar, 0, board->reg_shift); in pci_netmos_9900_setup()
803 * 9900 has varying capabilities and can cascade to sub-controllers
810 unsigned int c = dev->class; in pci_netmos_9900_numports()
819 if ((pi == 0) && (dev->device == PCI_DEVICE_ID_NETMOS_9900)) { in pci_netmos_9900_numports()
826 sub_serports = dev->subsystem_device & 0xf; in pci_netmos_9900_numports()
830 dev_err(&dev->dev, in pci_netmos_9900_numports()
842 unsigned int num_serial = dev->subsystem_device & 0xf; in pci_netmos_init()
844 if ((dev->device == PCI_DEVICE_ID_NETMOS_9901) || in pci_netmos_init()
845 (dev->device == PCI_DEVICE_ID_NETMOS_9865)) in pci_netmos_init()
848 if (dev->subsystem_vendor == PCI_VENDOR_ID_IBM && in pci_netmos_init()
849 dev->subsystem_device == 0x0299) in pci_netmos_init()
852 switch (dev->device) { /* FALLTHROUGH on all */ in pci_netmos_init()
866 return -ENODEV; in pci_netmos_init()
891 /* I/O space size (bits 26-24; 8 bytes = 011b) */
893 /* I/O space size (bits 26-24; 32 bytes = 101b) */
909 /* search for the base-ioport */ in pci_ite887x_init()
915 /* write POSIO0R - speed | size | ioport */ in pci_ite887x_init()
919 /* write INTCBAR - ioport */ in pci_ite887x_init()
927 release_region(iobase->start, ITE_887x_IOSIZE); in pci_ite887x_init()
934 dev_err(&dev->dev, "ite887x: could not find iobase\n"); in pci_ite887x_init()
935 return -ENODEV; in pci_ite887x_init()
939 type = inb(iobase->start + 0x18) & 0x0f; in pci_ite887x_init()
957 ret = -ENODEV; in pci_ite887x_init()
979 miscr &= ~(0xf << (12 - 4 * i)); in pci_ite887x_init()
981 miscr |= 1 << (23 - i); in pci_ite887x_init()
988 release_region(iobase->start, ITE_887x_IOSIZE); in pci_ite887x_init()
997 /* the ioport is bit 0-15 in POSIO0R */ in pci_ite887x_exit()
1017 if (dev->vendor == PCI_VENDOR_ID_ENDRUN && in pci_endrun_init()
1018 (dev->device & 0xf000) != 0xe000) in pci_endrun_init()
1023 return -ENOMEM; in pci_endrun_init()
1029 dev_dbg(&dev->dev, in pci_endrun_init()
1049 if (dev->vendor == PCI_VENDOR_ID_OXSEMI && in pci_oxsemi_tornado_init()
1050 (dev->device & 0xF000) != 0xC000) in pci_oxsemi_tornado_init()
1055 return -ENOMEM; in pci_oxsemi_tornado_init()
1061 dev_dbg(&dev->dev, in pci_oxsemi_tornado_init()
1073 port->bugs |= UART_BUG_PARITY; in pci_asix_setup()
1126 while (qf->devid) { in pci_quatech_amcc()
1127 if (qf->devid == devid) in pci_quatech_amcc()
1128 return qf->amcc; in pci_quatech_amcc()
1137 unsigned long base = port->port.iobase; in pci_quatech_rqopr()
1149 unsigned long base = port->port.iobase; in pci_quatech_wqopr()
1161 unsigned long base = port->port.iobase; in pci_quatech_rqmcr()
1177 unsigned long base = port->port.iobase; in pci_quatech_wqmcr()
1191 unsigned long base = port->port.iobase; in pci_quatech_has_qmcr()
1215 return -EINVAL; in pci_quatech_test()
1219 return -EINVAL; in pci_quatech_test()
1223 return -EINVAL; in pci_quatech_test()
1227 return -EINVAL; in pci_quatech_test()
1294 if (pci_quatech_amcc(dev->device)) { in pci_quatech_init()
1313 port->port.iobase = pci_resource_start(priv->dev, FL_GET_BASE(board->flags)); in pci_quatech_setup()
1314 /* Set up the clocking */ in pci_quatech_setup()
1315 port->port.uartclk = pci_quatech_clock(port); in pci_quatech_setup()
1330 unsigned int bar, offset = board->first_offset, maxnr; in pci_default_setup()
1332 bar = FL_GET_BASE(board->flags); in pci_default_setup()
1333 if (board->flags & FL_BASE_BARS) in pci_default_setup()
1336 offset += idx * board->uart_offset; in pci_default_setup()
1338 maxnr = (pci_resource_len(priv->dev, bar) - board->first_offset) >> in pci_default_setup()
1339 (board->reg_shift + 3); in pci_default_setup()
1341 if (board->flags & FL_REGION_SZ_CAP && idx >= maxnr) in pci_default_setup()
1344 return setup_port(priv, port, bar, offset, board->reg_shift); in pci_default_setup()
1360 (baud > actual_baud - tolerance)) { in pericom_do_set_divisor()
1367 serial_port_out(port, 2, 16 - scr); in pericom_do_set_divisor()
1380 unsigned int bar, offset = board->first_offset, maxnr; in pci_pericom_setup()
1382 bar = FL_GET_BASE(board->flags); in pci_pericom_setup()
1383 if (board->flags & FL_BASE_BARS) in pci_pericom_setup()
1386 offset += idx * board->uart_offset; in pci_pericom_setup()
1389 maxnr = (pci_resource_len(priv->dev, bar) - board->first_offset) >> in pci_pericom_setup()
1390 (board->reg_shift + 3); in pci_pericom_setup()
1392 if (board->flags & FL_REGION_SZ_CAP && idx >= maxnr) in pci_pericom_setup()
1395 port->port.set_divisor = pericom_do_set_divisor; in pci_pericom_setup()
1397 return setup_port(priv, port, bar, offset, board->reg_shift); in pci_pericom_setup()
1404 unsigned int bar, offset = board->first_offset, maxnr; in pci_pericom_setup_four_at_eight()
1406 bar = FL_GET_BASE(board->flags); in pci_pericom_setup_four_at_eight()
1407 if (board->flags & FL_BASE_BARS) in pci_pericom_setup_four_at_eight()
1410 offset += idx * board->uart_offset; in pci_pericom_setup_four_at_eight()
1415 maxnr = (pci_resource_len(priv->dev, bar) - board->first_offset) >> in pci_pericom_setup_four_at_eight()
1416 (board->reg_shift + 3); in pci_pericom_setup_four_at_eight()
1418 if (board->flags & FL_REGION_SZ_CAP && idx >= maxnr) in pci_pericom_setup_four_at_eight()
1421 port->port.set_divisor = pericom_do_set_divisor; in pci_pericom_setup_four_at_eight()
1423 return setup_port(priv, port, bar, offset, board->reg_shift); in pci_pericom_setup_four_at_eight()
1433 ret = setup_port(priv, port, idx, 0, board->reg_shift); in ce4100_serial_setup()
1434 port->port.iotype = UPIO_MEM32; in ce4100_serial_setup()
1435 port->port.type = PORT_XSCALE; in ce4100_serial_setup()
1436 port->port.flags = (port->port.flags | UPF_FIXED_PORT | UPF_FIXED_TYPE); in ce4100_serial_setup()
1437 port->port.regshift = 2; in ce4100_serial_setup()
1457 port->port.type = PORT_BRCM_TRUMANAGE; in pci_brcm_trumanage_setup()
1458 port->port.flags = (port->port.flags | UPF_FIXED_PORT | UPF_FIXED_TYPE); in pci_brcm_trumanage_setup()
1471 struct pci_dev *pci_dev = to_pci_dev(port->dev); in pci_fintek_rs485_config()
1473 u8 *index = (u8 *) port->private_data; in pci_fintek_rs485_config()
1478 rs485 = &port->rs485; in pci_fintek_rs485_config()
1479 else if (rs485->flags & SER_RS485_ENABLED) in pci_fintek_rs485_config()
1480 memset(rs485->padding, 0, sizeof(rs485->padding)); in pci_fintek_rs485_config()
1485 rs485->flags &= SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND; in pci_fintek_rs485_config()
1487 if (rs485->flags & SER_RS485_ENABLED) { in pci_fintek_rs485_config()
1491 if (rs485->flags & SER_RS485_RTS_ON_SEND) { in pci_fintek_rs485_config()
1499 rs485->delay_rts_after_send = 0; in pci_fintek_rs485_config()
1500 rs485->delay_rts_before_send = 0; in pci_fintek_rs485_config()
1508 if (rs485 != &port->rs485) in pci_fintek_rs485_config()
1509 port->rs485 = *rs485; in pci_fintek_rs485_config()
1518 struct pci_dev *pdev = priv->dev; in pci_fintek_setup()
1528 dev_dbg(&pdev->dev, "%s: idx=%d iobase=0x%x", __func__, idx, iobase); in pci_fintek_setup()
1530 port->port.iotype = UPIO_PORT; in pci_fintek_setup()
1531 port->port.iobase = iobase; in pci_fintek_setup()
1532 port->port.rs485_config = pci_fintek_rs485_config; in pci_fintek_setup()
1534 data = devm_kzalloc(&pdev->dev, sizeof(u8), GFP_KERNEL); in pci_fintek_setup()
1536 return -ENOMEM; in pci_fintek_setup()
1538 /* preserve index in PCI configuration space */ in pci_fintek_setup()
1540 port->port.private_data = data; in pci_fintek_setup()
1557 return -ENODEV; in pci_fintek_init()
1559 switch (dev->device) { in pci_fintek_init()
1562 max_port = dev->device & 0xff; in pci_fintek_init()
1568 return -EINVAL; in pci_fintek_init()
1586 /* Select 128-byte FIFO and 8x FIFO threshold */ in pci_fintek_init()
1597 pci_write_config_byte(dev, config_base + 0x06, dev->irq); in pci_fintek_init()
1600 /* re-apply RS232/485 mode when in pci_fintek_init()
1603 port = serial8250_get_port(priv->line[i]); in pci_fintek_init()
1604 pci_fintek_rs485_config(&port->port, NULL); in pci_fintek_init()
1618 struct f815xxa_data *data = p->private_data; in f815xxa_mem_serial_out()
1621 spin_lock_irqsave(&data->lock, flags); in f815xxa_mem_serial_out()
1622 writeb(value, p->membase + offset); in f815xxa_mem_serial_out()
1623 readb(p->membase + UART_SCR); /* Dummy read for flush pcie tx queue */ in f815xxa_mem_serial_out()
1624 spin_unlock_irqrestore(&data->lock, flags); in f815xxa_mem_serial_out()
1631 struct pci_dev *pdev = priv->dev; in pci_fintek_f815xxa_setup()
1634 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); in pci_fintek_f815xxa_setup()
1636 return -ENOMEM; in pci_fintek_f815xxa_setup()
1638 data->idx = idx; in pci_fintek_f815xxa_setup()
1639 spin_lock_init(&data->lock); in pci_fintek_f815xxa_setup()
1641 port->port.private_data = data; in pci_fintek_f815xxa_setup()
1642 port->port.iotype = UPIO_MEM; in pci_fintek_f815xxa_setup()
1643 port->port.flags |= UPF_IOREMAP; in pci_fintek_f815xxa_setup()
1644 port->port.mapbase = pci_resource_start(pdev, 0) + 8 * idx; in pci_fintek_f815xxa_setup()
1645 port->port.serial_out = f815xxa_mem_serial_out; in pci_fintek_f815xxa_setup()
1656 return -ENODEV; in pci_fintek_f815xxa_init()
1658 switch (dev->device) { in pci_fintek_f815xxa_init()
1661 max_port = dev->device & 0xff; in pci_fintek_f815xxa_init()
1667 return -EINVAL; in pci_fintek_f815xxa_init()
1677 /* Select 128-byte FIFO and 8x FIFO threshold */ in pci_fintek_f815xxa_init()
1691 port->port.quirks |= UPQ_NO_TXEN_TEST; in skip_tx_en_setup()
1692 dev_dbg(&priv->dev->dev, in skip_tx_en_setup()
1694 priv->dev->vendor, priv->dev->device, in skip_tx_en_setup()
1695 priv->dev->subsystem_vendor, priv->dev->subsystem_device); in skip_tx_en_setup()
1723 * that instead. up->ier should be the same value as what is in kt_serial_in()
1726 val = inb(p->iobase + offset); in kt_serial_in()
1729 val = up->ier; in kt_serial_in()
1738 port->port.flags |= UPF_BUG_THRE; in kt_serial_setup()
1739 port->port.serial_in = kt_serial_in; in kt_serial_setup()
1740 port->port.handle_break = kt_handle_break; in kt_serial_setup()
1747 return -ENODEV; in pci_eg20t_init()
1758 port->port.flags |= UPF_FIXED_TYPE; in pci_wch_ch353_setup()
1759 port->port.type = PORT_16550A; in pci_wch_ch353_setup()
1768 port->port.flags |= UPF_FIXED_TYPE; in pci_wch_ch355_setup()
1769 port->port.type = PORT_16550A; in pci_wch_ch355_setup()
1778 port->port.flags |= UPF_FIXED_TYPE; in pci_wch_ch38x_setup()
1779 port->port.type = PORT_16850; in pci_wch_ch38x_setup()
1793 switch (dev->device) { in pci_wch_ch38x_init()
1798 return -EINVAL; in pci_wch_ch38x_init()
1824 port->port.flags |= UPF_FIXED_TYPE; in pci_sunix_setup()
1825 port->port.type = PORT_SUNIX; in pci_sunix_setup()
1829 offset = idx * board->uart_offset; in pci_sunix_setup()
1832 idx -= 4; in pci_sunix_setup()
1834 offset = idx * 64 + offset * board->uart_offset; in pci_sunix_setup()
1845 unsigned int bar = FL_GET_BASE(board->flags); in pci_moxa_setup()
1848 if (board->num_ports == 4 && idx == 3) in pci_moxa_setup()
1849 offset = 7 * board->uart_offset; in pci_moxa_setup()
1851 offset = idx * board->uart_offset; in pci_moxa_setup()
1959 /* Unknown vendors/cards - this should not be in linux/pci_ids.h */
1973 * ADDI-DATA GmbH communication cards <info@addi-data.com>
1983 * AFAVLAB cards - these may be called via parport_serial
2224 * Pericom (Only 7954 - It have a offset jump for port 4)
2375 * SBS Technologies, Inc., PMC-OCTALPRO 232
2387 * SBS Technologies, Inc., PMC-OCTALPRO 422
2399 * SBS Technologies, Inc., P-Octal 232
2411 * SBS Technologies, Inc., P-Octal 422
2423 * SIIG cards - these may be called via parport_serial
2491 * Netmos cards - these may be called via parport_serial
2612 * Cronyx Omega PCI (PLX-chip based)
2804 if (quirk_id_matches(quirk->vendor, dev->vendor) && in find_quirk()
2805 quirk_id_matches(quirk->device, dev->device) && in find_quirk()
2806 quirk_id_matches(quirk->subvendor, dev->subsystem_vendor) && in find_quirk()
2807 quirk_id_matches(quirk->subdevice, dev->subsystem_device)) in find_quirk()
2926 * Board-specific versions.
2985 * uart_offset - the space between channels
2986 * reg_shift - describes how the UART registers are mapped
2988 * For example IER register on SBS, Inc. PMC-OctPro is located at
3420 * Entries following this are board-specific.
3424 * Panacom - IOMEM
3448 /* I think this entry is broken - the first_offset looks wrong --rmk */
3534 * Computone - uses IOMEM.
3568 * PA Semi PWRficient PA6T-1682M on-chip UART
3607 * ADDI-DATA GmbH PCI-Express communication cards <info@addi-data.com>
3817 { PCI_VDEVICE(MOTOROLA, 0x3052), }, /* Motorola Si3052-based modem */
3818 { PCI_DEVICE(0x1543, 0x3052), }, /* Si3052-based modem, default IDs */
3820 /* multi-io cards handled by parport_serial */
3862 if ((((dev->class >> 8) != PCI_CLASS_COMMUNICATION_SERIAL) && in serial_pci_is_class_communication()
3863 ((dev->class >> 8) != PCI_CLASS_COMMUNICATION_MULTISERIAL) && in serial_pci_is_class_communication()
3864 ((dev->class >> 8) != PCI_CLASS_COMMUNICATION_MODEM)) || in serial_pci_is_class_communication()
3865 (dev->class & 0xff) > 6) in serial_pci_is_class_communication()
3866 return -ENODEV; in serial_pci_is_class_communication()
3874 * serial specs. Returns 0 on success, -ENODEV on failure.
3879 int num_iomem, num_port, first_port = -1, i; in serial_pci_guess_board()
3889 if ((dev->class >> 8) == PCI_CLASS_COMMUNICATION_MULTISERIAL) in serial_pci_guess_board()
3890 return -ENODEV; in serial_pci_guess_board()
3896 if (first_port == -1) in serial_pci_guess_board()
3909 board->flags = first_port; in serial_pci_guess_board()
3910 board->num_ports = pci_resource_len(dev, first_port) / 8; in serial_pci_guess_board()
3919 first_port = -1; in serial_pci_guess_board()
3924 (first_port == -1 || (first_port + num_port) == i)) { in serial_pci_guess_board()
3926 if (first_port == -1) in serial_pci_guess_board()
3932 board->flags = first_port | FL_BASE_BARS; in serial_pci_guess_board()
3933 board->num_ports = num_port; in serial_pci_guess_board()
3937 return -ENODEV; in serial_pci_guess_board()
3945 board->num_ports == guessed->num_ports && in serial_pci_matches()
3946 board->base_baud == guessed->base_baud && in serial_pci_matches()
3947 board->uart_offset == guessed->uart_offset && in serial_pci_matches()
3948 board->reg_shift == guessed->reg_shift && in serial_pci_matches()
3949 board->first_offset == guessed->first_offset; in serial_pci_matches()
3960 nr_ports = board->num_ports; in pciserial_init_ports()
3968 * Run the new-style initialization function. in pciserial_init_ports()
3970 * <0 - error in pciserial_init_ports()
3971 * 0 - use board->num_ports in pciserial_init_ports()
3972 * >0 - number of ports in pciserial_init_ports()
3974 if (quirk->init) { in pciserial_init_ports()
3975 rc = quirk->init(dev); in pciserial_init_ports()
3988 priv = ERR_PTR(-ENOMEM); in pciserial_init_ports()
3992 priv->dev = dev; in pciserial_init_ports()
3993 priv->quirk = quirk; in pciserial_init_ports()
3997 uart.port.uartclk = board->base_baud * 16; in pciserial_init_ports()
3999 if (board->flags & FL_NOIRQ) { in pciserial_init_ports()
4003 dev_dbg(&dev->dev, "Using MSI(-X) interrupts\n"); in pciserial_init_ports()
4008 dev_dbg(&dev->dev, "Using legacy interrupts\n"); in pciserial_init_ports()
4020 uart.port.dev = &dev->dev; in pciserial_init_ports()
4023 if (quirk->setup(priv, board, &uart, i)) in pciserial_init_ports()
4026 dev_dbg(&dev->dev, "Setup PCI port: port %lx, irq %d, type %d\n", in pciserial_init_ports()
4029 priv->line[i] = serial8250_register_8250_port(&uart); in pciserial_init_ports()
4030 if (priv->line[i] < 0) { in pciserial_init_ports()
4031 dev_err(&dev->dev, in pciserial_init_ports()
4034 uart.port.iotype, priv->line[i]); in pciserial_init_ports()
4038 priv->nr = i; in pciserial_init_ports()
4039 priv->board = board; in pciserial_init_ports()
4043 if (quirk->exit) in pciserial_init_ports()
4044 quirk->exit(dev); in pciserial_init_ports()
4055 for (i = 0; i < priv->nr; i++) in pciserial_detach_ports()
4056 serial8250_unregister_port(priv->line[i]); in pciserial_detach_ports()
4061 quirk = find_quirk(priv->dev); in pciserial_detach_ports()
4062 if (quirk->exit) in pciserial_detach_ports()
4063 quirk->exit(priv->dev); in pciserial_detach_ports()
4077 for (i = 0; i < priv->nr; i++) in pciserial_suspend_ports()
4078 if (priv->line[i] >= 0) in pciserial_suspend_ports()
4079 serial8250_suspend_port(priv->line[i]); in pciserial_suspend_ports()
4084 if (priv->quirk->exit) in pciserial_suspend_ports()
4085 priv->quirk->exit(priv->dev); in pciserial_suspend_ports()
4096 if (priv->quirk->init) in pciserial_resume_ports()
4097 priv->quirk->init(priv->dev); in pciserial_resume_ports()
4099 for (i = 0; i < priv->nr; i++) in pciserial_resume_ports()
4100 if (priv->line[i] >= 0) in pciserial_resume_ports()
4101 serial8250_resume_port(priv->line[i]); in pciserial_resume_ports()
4120 if (quirk->probe) { in pciserial_init_one()
4121 rc = quirk->probe(dev); in pciserial_init_one()
4126 if (ent->driver_data >= ARRAY_SIZE(pci_boards)) { in pciserial_init_one()
4127 dev_err(&dev->dev, "invalid driver_data: %ld\n", in pciserial_init_one()
4128 ent->driver_data); in pciserial_init_one()
4129 return -EINVAL; in pciserial_init_one()
4132 board = &pci_boards[ent->driver_data]; in pciserial_init_one()
4136 return -ENODEV; in pciserial_init_one()
4143 if (ent->driver_data == pbn_default) { in pciserial_init_one()
4206 * The device may have been disabled. Re-enable it. in pciserial_resume_one()
4211 dev_err(dev, "Unable to re-enable ports, trying to continue.\n"); in pciserial_resume_one()
4345 /* Unknown card - subdevice 0x1584 */
4350 /* Unknown card - subdevice 0x1588 */
4653 { PCI_VENDOR_ID_MAINPINE, 0x4000, /* IQ Express 1 Port V.34 Super-G3 Fax */
4656 { PCI_VENDOR_ID_MAINPINE, 0x4000, /* IQ Express 2 Port V.34 Super-G3 Fax */
4659 { PCI_VENDOR_ID_MAINPINE, 0x4000, /* IQ Express 4 Port V.34 Super-G3 Fax */
4662 { PCI_VENDOR_ID_MAINPINE, 0x4000, /* IQ Express 8 Port V.34 Super-G3 Fax */
4667 * Digi/IBM PCIe 2-port Async EIA-232 Adapter utilizing OxSemi Tornado
4674 * SBS Technologies, Inc. P-Octal and PMC-OCTPRO cards,
4691 * Digitan DS560-558, from jimd@esoft.com
4967 * Dell Remote Access Card 4 - Tim_T_Murphy@Dell.com
4974 * Dell Remote Access Card III - Tim_T_Murphy@Dell.com
5001 * Xircom RBM56G cardbus modem - Dirk Arnold (temp entry)
5184 * IntaShield IS-200
5190 * IntaShield IS-400
5196 * BrainBoxes UC-260
5207 * Perle PCI-RAS cards
5329 * PA Semi PA6T-1682M on-chip UART
5452 * ADDI-DATA GmbH communication cards <info@addi-data.com>
5644 * AgeStar as-prs2-009
5696 /* MKS Tenta SCOM-080x serial cards */
5761 new = pciserial_init_ports(dev, priv->board); in serial8250_io_resume()