Lines Matching +full:wakeup +full:- +full:latency +full:- +full:us
1 // SPDX-License-Identifier: GPL-2.0
3 * 8250-core based driver for the OMAP internal UART
5 * based on omap-serial.c, Copyright (C) 2010 Texas Instruments.
29 #include <linux/dma-mapping.h>
128 u32 latency; member
157 return readl(up->port.membase + (reg << up->port.regshift)); in uart_read()
163 struct omap8250_priv *priv = up->port.private_data; in omap8250_set_mctrl()
168 if (!mctrl_gpio_to_gpiod(up->gpios, UART_GPIO_RTS)) { in omap8250_set_mctrl()
175 if ((mctrl & TIOCM_RTS) && (port->status & UPSTAT_AUTORTS)) in omap8250_set_mctrl()
176 priv->efr |= UART_EFR_RTS; in omap8250_set_mctrl()
178 priv->efr &= ~UART_EFR_RTS; in omap8250_set_mctrl()
179 serial_out(up, UART_EFR, priv->efr); in omap8250_set_mctrl()
190 * 5 L4 clock cycles + 5 UART functional clock cycle (@48MHz = ~0.2uS)
198 serial_out(up, UART_OMAP_MDR1, priv->mdr1); in omap_8250_mdr1_errataset()
200 serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT | in omap_8250_mdr1_errataset()
208 timeout--; in omap_8250_mdr1_errataset()
211 dev_crit(up->port.dev, "Errata i202: timedout %x\n", in omap_8250_mdr1_errataset()
222 unsigned int uartclk = port->uartclk; in omap_8250_get_divisor()
229 if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST) { in omap_8250_get_divisor()
230 priv->quot = port->custom_divisor & UART_DIV_MAX; in omap_8250_get_divisor()
236 if (port->custom_divisor & (1 << 16)) in omap_8250_get_divisor()
237 priv->mdr1 = UART_OMAP_MDR1_13X_MODE; in omap_8250_get_divisor()
239 priv->mdr1 = UART_OMAP_MDR1_16X_MODE; in omap_8250_get_divisor()
250 abs_d13 = abs(baud - uartclk / 13 / div_13); in omap_8250_get_divisor()
251 abs_d16 = abs(baud - uartclk / 16 / div_16); in omap_8250_get_divisor()
254 priv->mdr1 = UART_OMAP_MDR1_16X_MODE; in omap_8250_get_divisor()
255 priv->quot = div_16; in omap_8250_get_divisor()
257 priv->mdr1 = UART_OMAP_MDR1_13X_MODE; in omap_8250_get_divisor()
258 priv->quot = div_13; in omap_8250_get_divisor()
268 if (old_scr == priv->scr) in omap8250_update_scr()
276 if (priv->scr & OMAP_UART_SCR_DMAMODE_MASK) in omap8250_update_scr()
278 priv->scr & ~OMAP_UART_SCR_DMAMODE_MASK); in omap8250_update_scr()
279 serial_out(up, UART_OMAP_SCR, priv->scr); in omap8250_update_scr()
285 if (priv->habit & UART_ERRATA_i202_MDR1_ACCESS) in omap8250_update_mdr1()
288 serial_out(up, UART_OMAP_MDR1, priv->mdr1); in omap8250_update_mdr1()
293 struct omap8250_priv *priv = up->port.private_data; in omap8250_restore_regs()
294 struct uart_8250_dma *dma = up->dma; in omap8250_restore_regs()
296 if (dma && dma->tx_running) { in omap8250_restore_regs()
299 * we have a TX-DMA operation in progress then it has been in omap8250_restore_regs()
303 priv->delayed_restore = 1; in omap8250_restore_regs()
312 serial_out(up, UART_FCR, up->fcr); in omap8250_restore_regs()
321 TRIGGER_TLR_MASK(priv->tx_trigger) << UART_TI752_TLR_TX | in omap8250_restore_regs()
322 TRIGGER_TLR_MASK(priv->rx_trigger) << UART_TI752_TLR_RX); in omap8250_restore_regs()
327 serial8250_out_MCR(up, up->mcr); in omap8250_restore_regs()
328 serial_out(up, UART_IER, up->ier); in omap8250_restore_regs()
331 serial_dl_write(up, priv->quot); in omap8250_restore_regs()
333 serial_out(up, UART_EFR, priv->efr); in omap8250_restore_regs()
337 serial_out(up, UART_XON1, priv->xon); in omap8250_restore_regs()
338 serial_out(up, UART_XOFF1, priv->xoff); in omap8250_restore_regs()
340 serial_out(up, UART_LCR, up->lcr); in omap8250_restore_regs()
344 up->port.ops->set_mctrl(&up->port, up->port.mctrl); in omap8250_restore_regs()
356 struct omap8250_priv *priv = up->port.private_data; in omap_8250_set_termios()
360 switch (termios->c_cflag & CSIZE) { in omap_8250_set_termios()
376 if (termios->c_cflag & CSTOPB) in omap_8250_set_termios()
378 if (termios->c_cflag & PARENB) in omap_8250_set_termios()
380 if (!(termios->c_cflag & PARODD)) in omap_8250_set_termios()
382 if (termios->c_cflag & CMSPAR) in omap_8250_set_termios()
386 * Ask the core to calculate the divisor for us. in omap_8250_set_termios()
389 port->uartclk / 16 / UART_DIV_MAX, in omap_8250_set_termios()
390 port->uartclk / 13); in omap_8250_set_termios()
397 pm_runtime_get_sync(port->dev); in omap_8250_set_termios()
398 spin_lock_irq(&port->lock); in omap_8250_set_termios()
401 * Update the per-port timeout. in omap_8250_set_termios()
403 uart_update_timeout(port, termios->c_cflag, baud); in omap_8250_set_termios()
405 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; in omap_8250_set_termios()
406 if (termios->c_iflag & INPCK) in omap_8250_set_termios()
407 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE; in omap_8250_set_termios()
408 if (termios->c_iflag & (IGNBRK | PARMRK)) in omap_8250_set_termios()
409 up->port.read_status_mask |= UART_LSR_BI; in omap_8250_set_termios()
414 up->port.ignore_status_mask = 0; in omap_8250_set_termios()
415 if (termios->c_iflag & IGNPAR) in omap_8250_set_termios()
416 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; in omap_8250_set_termios()
417 if (termios->c_iflag & IGNBRK) { in omap_8250_set_termios()
418 up->port.ignore_status_mask |= UART_LSR_BI; in omap_8250_set_termios()
423 if (termios->c_iflag & IGNPAR) in omap_8250_set_termios()
424 up->port.ignore_status_mask |= UART_LSR_OE; in omap_8250_set_termios()
430 if ((termios->c_cflag & CREAD) == 0) in omap_8250_set_termios()
431 up->port.ignore_status_mask |= UART_LSR_DR; in omap_8250_set_termios()
436 up->ier &= ~UART_IER_MSI; in omap_8250_set_termios()
437 if (UART_ENABLE_MS(&up->port, termios->c_cflag)) in omap_8250_set_termios()
438 up->ier |= UART_IER_MSI; in omap_8250_set_termios()
440 up->lcr = cval; in omap_8250_set_termios()
446 * - RX_TRIGGER amount of bytes in the FIFO will cause an interrupt. in omap_8250_set_termios()
447 * - less than RX_TRIGGER number of bytes will also cause an interrupt in omap_8250_set_termios()
449 * - Once THRE is enabled, the interrupt will be fired once the FIFO is in omap_8250_set_termios()
450 * empty - the trigger level is ignored here. in omap_8250_set_termios()
453 * - UART will assert the TX DMA line once there is room for TX_TRIGGER in omap_8250_set_termios()
456 * - UART will assert the RX DMA line once there are RX_TRIGGER bytes in in omap_8250_set_termios()
460 up->fcr = UART_FCR_ENABLE_FIFO; in omap_8250_set_termios()
461 up->fcr |= TRIGGER_FCR_MASK(priv->tx_trigger) << OMAP_UART_FCR_TX_TRIG; in omap_8250_set_termios()
462 up->fcr |= TRIGGER_FCR_MASK(priv->rx_trigger) << OMAP_UART_FCR_RX_TRIG; in omap_8250_set_termios()
464 priv->scr = OMAP_UART_SCR_RX_TRIG_GRANU1_MASK | OMAP_UART_SCR_TX_EMPTY | in omap_8250_set_termios()
467 if (up->dma) in omap_8250_set_termios()
468 priv->scr |= OMAP_UART_SCR_DMAMODE_1 | in omap_8250_set_termios()
471 priv->xon = termios->c_cc[VSTART]; in omap_8250_set_termios()
472 priv->xoff = termios->c_cc[VSTOP]; in omap_8250_set_termios()
474 priv->efr = 0; in omap_8250_set_termios()
475 up->port.status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS | UPSTAT_AUTOXOFF); in omap_8250_set_termios()
477 if (termios->c_cflag & CRTSCTS && up->port.flags & UPF_HARD_FLOW && in omap_8250_set_termios()
478 !mctrl_gpio_to_gpiod(up->gpios, UART_GPIO_RTS) && in omap_8250_set_termios()
479 !mctrl_gpio_to_gpiod(up->gpios, UART_GPIO_CTS)) { in omap_8250_set_termios()
481 up->port.status |= UPSTAT_AUTOCTS | UPSTAT_AUTORTS; in omap_8250_set_termios()
482 priv->efr |= UART_EFR_CTS; in omap_8250_set_termios()
483 } else if (up->port.flags & UPF_SOFT_FLOW) { in omap_8250_set_termios()
494 if (termios->c_iflag & IXOFF) { in omap_8250_set_termios()
495 up->port.status |= UPSTAT_AUTOXOFF; in omap_8250_set_termios()
496 priv->efr |= OMAP_UART_SW_TX; in omap_8250_set_termios()
501 spin_unlock_irq(&up->port.lock); in omap_8250_set_termios()
502 pm_runtime_mark_last_busy(port->dev); in omap_8250_set_termios()
503 pm_runtime_put_autosuspend(port->dev); in omap_8250_set_termios()
505 /* calculate wakeup latency constraint */ in omap_8250_set_termios()
506 priv->calc_latency = USEC_PER_SEC * 64 * 8 / baud; in omap_8250_set_termios()
507 priv->latency = priv->calc_latency; in omap_8250_set_termios()
509 schedule_work(&priv->qos_work); in omap_8250_set_termios()
523 pm_runtime_get_sync(port->dev); in omap_8250_pm()
534 pm_runtime_mark_last_busy(port->dev); in omap_8250_pm()
535 pm_runtime_put_autosuspend(port->dev); in omap_8250_pm()
569 dev_warn(up->port.dev, in omap_serial_fill_features_erratas()
580 priv->habit |= UART_ERRATA_i202_MDR1_ACCESS; in omap_serial_fill_features_erratas()
583 priv->habit |= UART_ERRATA_i202_MDR1_ACCESS | in omap_serial_fill_features_erratas()
587 priv->habit |= UART_ERRATA_i202_MDR1_ACCESS | in omap_serial_fill_features_erratas()
600 priv->habit &= ~UART_HAS_RHR_IT_DIS; in omap_serial_fill_features_erratas()
608 cpu_latency_qos_update_request(&priv->pm_qos_request, priv->latency); in omap8250_uart_qos_work()
618 struct omap8250_priv *priv = port->private_data; in omap8250_irq()
624 if (up->dma) { in omap8250_irq()
640 if (priv->habit & UART_RX_TIMEOUT_QUIRK && in omap8250_irq()
647 if ((lsr & UART_LSR_OE) && up->overrun_backoff_time_ms > 0) { in omap8250_irq()
650 up->ier = port->serial_in(port, UART_IER); in omap8250_irq()
651 if (up->ier & (UART_IER_RLSI | UART_IER_RDI)) { in omap8250_irq()
652 port->ops->stop_rx(port); in omap8250_irq()
657 cancel_delayed_work(&up->overrun_backoff); in omap8250_irq()
660 delay = msecs_to_jiffies(up->overrun_backoff_time_ms); in omap8250_irq()
661 schedule_delayed_work(&up->overrun_backoff, delay); in omap8250_irq()
672 struct omap8250_priv *priv = port->private_data; in omap_8250_startup()
675 if (priv->wakeirq) { in omap_8250_startup()
676 ret = dev_pm_set_dedicated_wake_irq(port->dev, priv->wakeirq); in omap_8250_startup()
681 pm_runtime_get_sync(port->dev); in omap_8250_startup()
683 up->mcr = 0; in omap_8250_startup()
688 up->lsr_saved_flags = 0; in omap_8250_startup()
689 up->msr_saved_flags = 0; in omap_8250_startup()
693 up->dma = NULL; in omap_8250_startup()
695 if (up->dma) { in omap_8250_startup()
698 dev_warn_ratelimited(port->dev, in omap_8250_startup()
700 up->dma = NULL; in omap_8250_startup()
704 ret = request_irq(port->irq, omap8250_irq, IRQF_SHARED, in omap_8250_startup()
705 dev_name(port->dev), port); in omap_8250_startup()
709 up->ier = UART_IER_RLSI | UART_IER_RDI; in omap_8250_startup()
710 serial_out(up, UART_IER, up->ier); in omap_8250_startup()
713 up->capabilities |= UART_CAP_RPM; in omap_8250_startup()
717 priv->wer = OMAP_UART_WER_MOD_WKUP; in omap_8250_startup()
718 if (priv->habit & OMAP_UART_WER_HAS_TX_WAKEUP) in omap_8250_startup()
719 priv->wer |= OMAP_UART_TX_WAKEUP_EN; in omap_8250_startup()
720 serial_out(up, UART_OMAP_WER, priv->wer); in omap_8250_startup()
722 if (up->dma && !(priv->habit & UART_HAS_EFR2)) in omap_8250_startup()
723 up->dma->rx_dma(up); in omap_8250_startup()
725 pm_runtime_mark_last_busy(port->dev); in omap_8250_startup()
726 pm_runtime_put_autosuspend(port->dev); in omap_8250_startup()
729 pm_runtime_mark_last_busy(port->dev); in omap_8250_startup()
730 pm_runtime_put_autosuspend(port->dev); in omap_8250_startup()
731 dev_pm_clear_wake_irq(port->dev); in omap_8250_startup()
738 struct omap8250_priv *priv = port->private_data; in omap_8250_shutdown()
740 flush_work(&priv->qos_work); in omap_8250_shutdown()
741 if (up->dma) in omap_8250_shutdown()
744 pm_runtime_get_sync(port->dev); in omap_8250_shutdown()
747 if (priv->habit & UART_HAS_EFR2) in omap_8250_shutdown()
750 up->ier = 0; in omap_8250_shutdown()
753 if (up->dma) in omap_8250_shutdown()
759 if (up->lcr & UART_LCR_SBC) in omap_8250_shutdown()
760 serial_out(up, UART_LCR, up->lcr & ~UART_LCR_SBC); in omap_8250_shutdown()
763 pm_runtime_mark_last_busy(port->dev); in omap_8250_shutdown()
764 pm_runtime_put_autosuspend(port->dev); in omap_8250_shutdown()
765 free_irq(port->irq, port); in omap_8250_shutdown()
766 dev_pm_clear_wake_irq(port->dev); in omap_8250_shutdown()
771 struct omap8250_priv *priv = port->private_data; in omap_8250_throttle()
774 pm_runtime_get_sync(port->dev); in omap_8250_throttle()
776 spin_lock_irqsave(&port->lock, flags); in omap_8250_throttle()
777 port->ops->stop_rx(port); in omap_8250_throttle()
778 priv->throttled = true; in omap_8250_throttle()
779 spin_unlock_irqrestore(&port->lock, flags); in omap_8250_throttle()
781 pm_runtime_mark_last_busy(port->dev); in omap_8250_throttle()
782 pm_runtime_put_autosuspend(port->dev); in omap_8250_throttle()
787 struct omap8250_priv *priv = port->private_data; in omap_8250_unthrottle()
791 pm_runtime_get_sync(port->dev); in omap_8250_unthrottle()
793 spin_lock_irqsave(&port->lock, flags); in omap_8250_unthrottle()
794 priv->throttled = false; in omap_8250_unthrottle()
795 if (up->dma) in omap_8250_unthrottle()
796 up->dma->rx_dma(up); in omap_8250_unthrottle()
797 up->ier |= UART_IER_RLSI | UART_IER_RDI; in omap_8250_unthrottle()
798 port->read_status_mask |= UART_LSR_DR; in omap_8250_unthrottle()
799 serial_out(up, UART_IER, up->ier); in omap_8250_unthrottle()
800 spin_unlock_irqrestore(&port->lock, flags); in omap_8250_unthrottle()
802 pm_runtime_mark_last_busy(port->dev); in omap_8250_unthrottle()
803 pm_runtime_put_autosuspend(port->dev); in omap_8250_unthrottle()
809 /* Must be called while priv->rx_dma_lock is held */
812 struct uart_8250_dma *dma = p->dma; in __dma_rx_do_complete()
813 struct tty_port *tty_port = &p->port.state->port; in __dma_rx_do_complete()
814 struct omap8250_priv *priv = p->port.private_data; in __dma_rx_do_complete()
815 struct dma_chan *rxchan = dma->rxchan; in __dma_rx_do_complete()
822 if (!dma->rx_running) in __dma_rx_do_complete()
825 cookie = dma->rx_cookie; in __dma_rx_do_complete()
826 dma->rx_running = 0; in __dma_rx_do_complete()
828 /* Re-enable RX FIFO interrupt now that transfer is complete */ in __dma_rx_do_complete()
829 if (priv->habit & UART_HAS_RHR_IT_DIS) { in __dma_rx_do_complete()
837 count = dma->rx_size - state.residue + state.in_flight_bytes; in __dma_rx_do_complete()
838 if (count < dma->rx_size) { in __dma_rx_do_complete()
849 poll_count--) in __dma_rx_do_complete()
852 if (poll_count == -1) in __dma_rx_do_complete()
853 dev_err(p->port.dev, "teardown incomplete\n"); in __dma_rx_do_complete()
858 ret = tty_insert_flip_string(tty_port, dma->rx_buf, count); in __dma_rx_do_complete()
860 p->port.icount.rx += ret; in __dma_rx_do_complete()
861 p->port.icount.buf_overrun += count - ret; in __dma_rx_do_complete()
870 struct omap8250_priv *priv = p->port.private_data; in __dma_rx_complete()
871 struct uart_8250_dma *dma = p->dma; in __dma_rx_complete()
875 spin_lock_irqsave(&p->port.lock, flags); in __dma_rx_complete()
882 if (dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state) != in __dma_rx_complete()
884 spin_unlock_irqrestore(&p->port.lock, flags); in __dma_rx_complete()
888 if (!priv->throttled) { in __dma_rx_complete()
889 p->ier |= UART_IER_RLSI | UART_IER_RDI; in __dma_rx_complete()
890 serial_out(p, UART_IER, p->ier); in __dma_rx_complete()
891 if (!(priv->habit & UART_HAS_EFR2)) in __dma_rx_complete()
895 spin_unlock_irqrestore(&p->port.lock, flags); in __dma_rx_complete()
900 struct omap8250_priv *priv = p->port.private_data; in omap_8250_rx_dma_flush()
901 struct uart_8250_dma *dma = p->dma; in omap_8250_rx_dma_flush()
906 spin_lock_irqsave(&priv->rx_dma_lock, flags); in omap_8250_rx_dma_flush()
908 if (!dma->rx_running) { in omap_8250_rx_dma_flush()
909 spin_unlock_irqrestore(&priv->rx_dma_lock, flags); in omap_8250_rx_dma_flush()
913 ret = dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state); in omap_8250_rx_dma_flush()
915 ret = dmaengine_pause(dma->rxchan); in omap_8250_rx_dma_flush()
917 priv->rx_dma_broken = true; in omap_8250_rx_dma_flush()
920 spin_unlock_irqrestore(&priv->rx_dma_lock, flags); in omap_8250_rx_dma_flush()
925 struct omap8250_priv *priv = p->port.private_data; in omap_8250_rx_dma()
926 struct uart_8250_dma *dma = p->dma; in omap_8250_rx_dma()
932 if (priv->rx_dma_broken) in omap_8250_rx_dma()
933 return -EINVAL; in omap_8250_rx_dma()
935 spin_lock_irqsave(&priv->rx_dma_lock, flags); in omap_8250_rx_dma()
937 if (dma->rx_running) { in omap_8250_rx_dma()
940 state = dmaengine_tx_status(dma->rxchan, dma->rx_cookie, NULL); in omap_8250_rx_dma()
946 p->ier &= ~(UART_IER_RLSI | UART_IER_RDI); in omap_8250_rx_dma()
947 serial_out(p, UART_IER, p->ier); in omap_8250_rx_dma()
952 desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr, in omap_8250_rx_dma()
953 dma->rx_size, DMA_DEV_TO_MEM, in omap_8250_rx_dma()
956 err = -EBUSY; in omap_8250_rx_dma()
960 dma->rx_running = 1; in omap_8250_rx_dma()
961 desc->callback = __dma_rx_complete; in omap_8250_rx_dma()
962 desc->callback_param = p; in omap_8250_rx_dma()
964 dma->rx_cookie = dmaengine_submit(desc); in omap_8250_rx_dma()
971 if (priv->habit & UART_HAS_RHR_IT_DIS) { in omap_8250_rx_dma()
977 dma_async_issue_pending(dma->rxchan); in omap_8250_rx_dma()
979 spin_unlock_irqrestore(&priv->rx_dma_lock, flags); in omap_8250_rx_dma()
988 struct uart_8250_dma *dma = p->dma; in omap_8250_dma_tx_complete()
989 struct circ_buf *xmit = &p->port.state->xmit; in omap_8250_dma_tx_complete()
992 struct omap8250_priv *priv = p->port.private_data; in omap_8250_dma_tx_complete()
994 dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr, in omap_8250_dma_tx_complete()
997 spin_lock_irqsave(&p->port.lock, flags); in omap_8250_dma_tx_complete()
999 dma->tx_running = 0; in omap_8250_dma_tx_complete()
1001 xmit->tail += dma->tx_size; in omap_8250_dma_tx_complete()
1002 xmit->tail &= UART_XMIT_SIZE - 1; in omap_8250_dma_tx_complete()
1003 p->port.icount.tx += dma->tx_size; in omap_8250_dma_tx_complete()
1005 if (priv->delayed_restore) { in omap_8250_dma_tx_complete()
1006 priv->delayed_restore = 0; in omap_8250_dma_tx_complete()
1011 uart_write_wakeup(&p->port); in omap_8250_dma_tx_complete()
1013 if (!uart_circ_empty(xmit) && !uart_tx_stopped(&p->port)) { in omap_8250_dma_tx_complete()
1019 } else if (p->capabilities & UART_CAP_RPM) { in omap_8250_dma_tx_complete()
1024 dma->tx_err = 1; in omap_8250_dma_tx_complete()
1028 spin_unlock_irqrestore(&p->port.lock, flags); in omap_8250_dma_tx_complete()
1033 struct uart_8250_dma *dma = p->dma; in omap_8250_tx_dma()
1034 struct omap8250_priv *priv = p->port.private_data; in omap_8250_tx_dma()
1035 struct circ_buf *xmit = &p->port.state->xmit; in omap_8250_tx_dma()
1040 if (dma->tx_running) in omap_8250_tx_dma()
1042 if (uart_tx_stopped(&p->port) || uart_circ_empty(xmit)) { in omap_8250_tx_dma()
1049 if (dma->tx_err || p->capabilities & UART_CAP_RPM) { in omap_8250_tx_dma()
1050 ret = -EBUSY; in omap_8250_tx_dma()
1057 dma->tx_size = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); in omap_8250_tx_dma()
1058 if (priv->habit & OMAP_DMA_TX_KICK) { in omap_8250_tx_dma()
1072 * 86us at 115200,8n1 but around 60us (not to mention lower in omap_8250_tx_dma()
1077 if (tx_lvl == p->tx_loadsz) { in omap_8250_tx_dma()
1078 ret = -EBUSY; in omap_8250_tx_dma()
1081 if (dma->tx_size < 4) { in omap_8250_tx_dma()
1082 ret = -EINVAL; in omap_8250_tx_dma()
1088 desc = dmaengine_prep_slave_single(dma->txchan, in omap_8250_tx_dma()
1089 dma->tx_addr + xmit->tail + skip_byte, in omap_8250_tx_dma()
1090 dma->tx_size - skip_byte, DMA_MEM_TO_DEV, in omap_8250_tx_dma()
1093 ret = -EBUSY; in omap_8250_tx_dma()
1097 dma->tx_running = 1; in omap_8250_tx_dma()
1099 desc->callback = omap_8250_dma_tx_complete; in omap_8250_tx_dma()
1100 desc->callback_param = p; in omap_8250_tx_dma()
1102 dma->tx_cookie = dmaengine_submit(desc); in omap_8250_tx_dma()
1104 dma_sync_single_for_device(dma->txchan->device->dev, dma->tx_addr, in omap_8250_tx_dma()
1107 dma_async_issue_pending(dma->txchan); in omap_8250_tx_dma()
1108 if (dma->tx_err) in omap_8250_tx_dma()
1109 dma->tx_err = 0; in omap_8250_tx_dma()
1113 serial_out(p, UART_TX, xmit->buf[xmit->tail]); in omap_8250_tx_dma()
1116 dma->tx_err = 1; in omap_8250_tx_dma()
1153 (up->ier & UART_IER_RDI)) { in am654_8250_handle_rx_dma()
1160 * periodic timeouts, re-enable interrupts. in am654_8250_handle_rx_dma()
1162 up->ier &= ~(UART_IER_RLSI | UART_IER_RDI); in am654_8250_handle_rx_dma()
1163 serial_out(up, UART_IER, up->ier); in am654_8250_handle_rx_dma()
1167 up->ier |= UART_IER_RLSI | UART_IER_RDI; in am654_8250_handle_rx_dma()
1168 serial_out(up, UART_IER, up->ier); in am654_8250_handle_rx_dma()
1175 * use the default routine in the non-DMA case and this one for with DMA.
1180 struct omap8250_priv *priv = up->port.private_data; in omap_8250_dma_handle_irq()
1192 spin_lock(&port->lock); in omap_8250_dma_handle_irq()
1196 if (priv->habit & UART_HAS_EFR2) in omap_8250_dma_handle_irq()
1202 if (status & UART_LSR_THRE && up->dma->tx_err) { in omap_8250_dma_handle_irq()
1203 if (uart_tx_stopped(&up->port) || in omap_8250_dma_handle_irq()
1204 uart_circ_empty(&up->port.state->xmit)) { in omap_8250_dma_handle_irq()
1205 up->dma->tx_err = 0; in omap_8250_dma_handle_irq()
1232 return -EINVAL; in omap_8250_rx_dma()
1272 { .compatible = "ti,am654-uart", .data = &am654_platdata, },
1273 { .compatible = "ti,omap2-uart" },
1274 { .compatible = "ti,omap3-uart" },
1275 { .compatible = "ti,omap4-uart", .data = &omap4_platdata, },
1276 { .compatible = "ti,am3352-uart", .data = &am33xx_platdata, },
1277 { .compatible = "ti,am4372-uart", .data = &am33xx_platdata, },
1278 { .compatible = "ti,dra742-uart", .data = &omap4_platdata, },
1285 struct device_node *np = pdev->dev.of_node; in omap8250_probe()
1299 dev_err(&pdev->dev, "missing registers\n"); in omap8250_probe()
1300 return -EINVAL; in omap8250_probe()
1303 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); in omap8250_probe()
1305 return -ENOMEM; in omap8250_probe()
1307 membase = devm_ioremap(&pdev->dev, regs->start, in omap8250_probe()
1310 return -ENODEV; in omap8250_probe()
1313 up.port.dev = &pdev->dev; in omap8250_probe()
1314 up.port.mapbase = regs->start; in omap8250_probe()
1358 dev_err(&pdev->dev, "failed to get alias\n"); in omap8250_probe()
1363 if (of_property_read_u32(np, "clock-frequency", &up.port.uartclk)) { in omap8250_probe()
1366 clk = devm_clk_get(&pdev->dev, NULL); in omap8250_probe()
1368 if (PTR_ERR(clk) == -EPROBE_DEFER) in omap8250_probe()
1369 return -EPROBE_DEFER; in omap8250_probe()
1375 if (of_property_read_u32(np, "overrun-throttle-ms", in omap8250_probe()
1379 priv->wakeirq = irq_of_parse_and_map(np, 1); in omap8250_probe()
1381 pdata = of_device_get_match_data(&pdev->dev); in omap8250_probe()
1383 priv->habit |= pdata->habit; in omap8250_probe()
1387 dev_warn(&pdev->dev, in omap8250_probe()
1392 priv->latency = PM_QOS_CPU_LATENCY_DEFAULT_VALUE; in omap8250_probe()
1393 priv->calc_latency = PM_QOS_CPU_LATENCY_DEFAULT_VALUE; in omap8250_probe()
1394 cpu_latency_qos_add_request(&priv->pm_qos_request, priv->latency); in omap8250_probe()
1395 INIT_WORK(&priv->qos_work, omap8250_uart_qos_work); in omap8250_probe()
1397 spin_lock_init(&priv->rx_dma_lock); in omap8250_probe()
1399 device_init_wakeup(&pdev->dev, true); in omap8250_probe()
1400 pm_runtime_enable(&pdev->dev); in omap8250_probe()
1401 pm_runtime_use_autosuspend(&pdev->dev); in omap8250_probe()
1406 * prevent an unsafe default policy with lossy characters on wake-up. in omap8250_probe()
1410 if (!of_get_available_child_count(pdev->dev.of_node)) in omap8250_probe()
1411 pm_runtime_set_autosuspend_delay(&pdev->dev, -1); in omap8250_probe()
1413 pm_runtime_irq_safe(&pdev->dev); in omap8250_probe()
1415 pm_runtime_get_sync(&pdev->dev); in omap8250_probe()
1419 priv->rx_trigger = RX_TRIGGER; in omap8250_probe()
1420 priv->tx_trigger = TX_TRIGGER; in omap8250_probe()
1430 ret = of_property_count_strings(np, "dma-names"); in omap8250_probe()
1434 up.dma = &priv->omap8250_dma; in omap8250_probe()
1435 up.dma->fn = the_no_dma_filter_fn; in omap8250_probe()
1436 up.dma->tx_dma = omap_8250_tx_dma; in omap8250_probe()
1437 up.dma->rx_dma = omap_8250_rx_dma; in omap8250_probe()
1439 dma_params = pdata->dma_params; in omap8250_probe()
1442 up.dma->rx_size = dma_params->rx_size; in omap8250_probe()
1443 up.dma->rxconf.src_maxburst = dma_params->rx_trigger; in omap8250_probe()
1444 up.dma->txconf.dst_maxburst = dma_params->tx_trigger; in omap8250_probe()
1445 priv->rx_trigger = dma_params->rx_trigger; in omap8250_probe()
1446 priv->tx_trigger = dma_params->tx_trigger; in omap8250_probe()
1448 up.dma->rx_size = RX_TRIGGER; in omap8250_probe()
1449 up.dma->rxconf.src_maxburst = RX_TRIGGER; in omap8250_probe()
1450 up.dma->txconf.dst_maxburst = TX_TRIGGER; in omap8250_probe()
1456 dev_err(&pdev->dev, "unable to register 8250 port\n"); in omap8250_probe()
1459 priv->line = ret; in omap8250_probe()
1461 pm_runtime_mark_last_busy(&pdev->dev); in omap8250_probe()
1462 pm_runtime_put_autosuspend(&pdev->dev); in omap8250_probe()
1465 pm_runtime_dont_use_autosuspend(&pdev->dev); in omap8250_probe()
1466 pm_runtime_put_sync(&pdev->dev); in omap8250_probe()
1467 pm_runtime_disable(&pdev->dev); in omap8250_probe()
1475 pm_runtime_dont_use_autosuspend(&pdev->dev); in omap8250_remove()
1476 pm_runtime_put_sync(&pdev->dev); in omap8250_remove()
1477 pm_runtime_disable(&pdev->dev); in omap8250_remove()
1478 serial8250_unregister_port(priv->line); in omap8250_remove()
1479 cpu_latency_qos_remove_request(&priv->pm_qos_request); in omap8250_remove()
1480 device_init_wakeup(&pdev->dev, false); in omap8250_remove()
1491 priv->is_suspending = true; in omap8250_prepare()
1501 priv->is_suspending = false; in omap8250_complete()
1507 struct uart_8250_port *up = serial8250_get_port(priv->line); in omap8250_suspend()
1509 serial8250_suspend_port(priv->line); in omap8250_suspend()
1513 priv->wer = 0; in omap8250_suspend()
1514 serial_out(up, UART_OMAP_WER, priv->wer); in omap8250_suspend()
1518 flush_work(&priv->qos_work); in omap8250_suspend()
1526 serial8250_resume_port(priv->line); in omap8250_resume()
1554 struct uart_8250_port *up = serial8250_get_port(priv->line); in omap8250_soft_reset()
1578 /* By experiments, 1us enough for reset complete on AM335x */ in omap8250_soft_reset()
1582 } while (--timeout && !(syss & OMAP_UART_SYSS_RESETDONE)); in omap8250_soft_reset()
1586 return -ETIMEDOUT; in omap8250_soft_reset()
1597 /* In case runtime-pm tries this before we are setup */ in omap8250_runtime_suspend()
1601 up = serial8250_get_port(priv->line); in omap8250_runtime_suspend()
1608 if (priv->is_suspending && !console_suspend_enabled) { in omap8250_runtime_suspend()
1609 if (uart_console(&up->port)) in omap8250_runtime_suspend()
1610 return -EBUSY; in omap8250_runtime_suspend()
1613 if (priv->habit & UART_ERRATA_CLOCK_DISABLE) { in omap8250_runtime_suspend()
1620 /* Restore to UART mode after reset (for wakeup) */ in omap8250_runtime_suspend()
1622 /* Restore wakeup enable register */ in omap8250_runtime_suspend()
1623 serial_out(up, UART_OMAP_WER, priv->wer); in omap8250_runtime_suspend()
1626 if (up->dma && up->dma->rxchan) in omap8250_runtime_suspend()
1629 priv->latency = PM_QOS_CPU_LATENCY_DEFAULT_VALUE; in omap8250_runtime_suspend()
1630 schedule_work(&priv->qos_work); in omap8250_runtime_suspend()
1640 /* In case runtime-pm tries this before we are setup */ in omap8250_runtime_resume()
1644 up = serial8250_get_port(priv->line); in omap8250_runtime_resume()
1649 if (up->dma && up->dma->rxchan && !(priv->habit & UART_HAS_EFR2)) in omap8250_runtime_resume()
1652 priv->latency = priv->calc_latency; in omap8250_runtime_resume()
1653 schedule_work(&priv->qos_work); in omap8250_runtime_resume()
1676 idx = *omap_str - '0'; in omap8250_console_fixup()