Lines Matching +full:bcm7271 +full:- +full:uart

1 // SPDX-License-Identifier: GPL-2.0-only
4 * 8250-core based driver for Broadcom ns16550a UARTs
20 #include <linux/dma-mapping.h>
28 /* Register definitions for UART DMA block. Version 1.1 or later. */
157 #define UDMA_RX_BUFS_REG_OFFSET (UDMA_RX_BUF1_PTR_LO - UDMA_RX_BUF0_PTR_LO)
169 #define UDMA_TX_BUFS_REG_OFFSET (UDMA_TX_BUF1_PTR_LO - UDMA_TX_BUF0_PTR_LO)
250 return readl(priv->regs[reg_type] + offset); in udma_readl()
256 writel(value, priv->regs[reg_type] + offset); in udma_writel()
262 void __iomem *reg = priv->regs[reg_type] + offset; in udma_set()
273 void __iomem *reg = priv->regs[reg_type] + offset; in udma_unset()
282 * The UART DMA engine hardware can be used by multiple UARTS, but
284 * the first UART to request the DMA engine will get it and any
304 if (waits-- == 0) in brcmuart_arbitration()
338 daddr = priv->rx_addr; in brcmuart_init_dma_hardware()
351 daddr = priv->tx_addr; in brcmuart_init_dma_hardware()
368 struct brcmuart_priv *priv = p->port.private_data; in start_rx_dma()
381 priv->rx_next_buf = 0; in start_rx_dma()
384 priv->rx_running = true; in start_rx_dma()
389 struct brcmuart_priv *priv = p->port.private_data; in stop_rx_dma()
392 if (priv->rx_running) in stop_rx_dma()
398 struct brcmuart_priv *priv = p->port.private_data; in stop_tx_dma()
405 priv->tx_running = false; in stop_tx_dma()
415 struct brcmuart_priv *priv = p->port.private_data; in brcmuart_tx_dma()
416 struct circ_buf *xmit = &p->port.state->xmit; in brcmuart_tx_dma()
419 if (uart_tx_stopped(&p->port) || priv->tx_running || in brcmuart_tx_dma()
423 tx_size = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); in brcmuart_tx_dma()
425 priv->dma.tx_err = 0; in brcmuart_tx_dma()
426 memcpy(priv->tx_buf, &xmit->buf[xmit->tail], tx_size); in brcmuart_tx_dma()
427 xmit->tail += tx_size; in brcmuart_tx_dma()
428 xmit->tail &= UART_XMIT_SIZE - 1; in brcmuart_tx_dma()
429 p->port.icount.tx += tx_size; in brcmuart_tx_dma()
432 uart_write_wakeup(&p->port); in brcmuart_tx_dma()
438 priv->tx_running = true; in brcmuart_tx_dma()
445 struct brcmuart_priv *priv = up->private_data; in brcmuart_rx_buf_done_isr()
446 struct tty_port *tty_port = &up->state->port; in brcmuart_rx_buf_done_isr()
456 dev_err(up->dev, "RX done interrupt but DATA_RDY not found\n"); in brcmuart_rx_buf_done_isr()
463 up->icount.overrun++; in brcmuart_rx_buf_done_isr()
464 dev_warn(up->dev, "RX OVERRUN Error\n"); in brcmuart_rx_buf_done_isr()
467 up->icount.frame++; in brcmuart_rx_buf_done_isr()
468 dev_warn(up->dev, "RX FRAMING Error\n"); in brcmuart_rx_buf_done_isr()
471 up->icount.parity++; in brcmuart_rx_buf_done_isr()
472 dev_warn(up->dev, "RX PARITY Error\n"); in brcmuart_rx_buf_done_isr()
477 priv->rx_bufs + (index * RX_BUF_SIZE), in brcmuart_rx_buf_done_isr()
480 dev_warn(up->dev, "Flip buffer overrun of %d bytes\n", in brcmuart_rx_buf_done_isr()
481 length - copied); in brcmuart_rx_buf_done_isr()
482 up->icount.overrun += length - copied; in brcmuart_rx_buf_done_isr()
484 up->icount.rx += length; in brcmuart_rx_buf_done_isr()
486 priv->dma_rx_partial_buf++; in brcmuart_rx_buf_done_isr()
492 priv->rx_missing_close_timeout++; in brcmuart_rx_buf_done_isr()
494 priv->dma_rx_full_buf++; in brcmuart_rx_buf_done_isr()
501 struct brcmuart_priv *priv = up->private_data; in brcmuart_rx_isr()
502 struct device *dev = up->dev; in brcmuart_rx_isr()
508 check_isr = UDMA_INTR_RX_READY_BUF0 << priv->rx_next_buf; in brcmuart_rx_isr()
510 brcmuart_rx_buf_done_isr(up, priv->rx_next_buf); in brcmuart_rx_isr()
519 priv->rx_err++; in brcmuart_rx_isr()
521 priv->rx_timeout++; in brcmuart_rx_isr()
525 priv->rx_abort++; in brcmuart_rx_isr()
526 priv->rx_running = false; in brcmuart_rx_isr()
528 /* If not ABORT, re-enable RX buffer */ in brcmuart_rx_isr()
531 UDMA_RX_BUFx_STATUS(priv->rx_next_buf), in brcmuart_rx_isr()
534 priv->rx_next_buf++; in brcmuart_rx_isr()
535 if (priv->rx_next_buf == RX_BUFS_COUNT) in brcmuart_rx_isr()
536 priv->rx_next_buf = 0; in brcmuart_rx_isr()
542 struct brcmuart_priv *priv = up->private_data; in brcmuart_tx_isr()
543 struct device *dev = up->dev; in brcmuart_tx_isr()
545 struct circ_buf *xmit = &port_8250->port.state->xmit; in brcmuart_tx_isr()
548 if (priv->tx_running) in brcmuart_tx_isr()
552 priv->tx_running = false; in brcmuart_tx_isr()
560 struct device *dev = up->dev; in brcmuart_isr()
561 struct brcmuart_priv *priv = up->private_data; in brcmuart_isr()
571 spin_lock_irqsave(&up->lock, flags); in brcmuart_isr()
585 spin_unlock_irqrestore(&up->lock, flags); in brcmuart_isr()
593 struct brcmuart_priv *priv = up->port.private_data; in brcmuart_startup()
595 priv->shutdown = false; in brcmuart_startup()
598 * prevent serial8250_do_startup() from allocating non-existent in brcmuart_startup()
601 up->dma = NULL; in brcmuart_startup()
604 if (!priv->dma_enabled) in brcmuart_startup()
610 up->ier &= ~UART_IER_RDI; in brcmuart_startup()
611 serial_port_out(port, UART_IER, up->ier); in brcmuart_startup()
613 priv->tx_running = false; in brcmuart_startup()
614 priv->dma.rx_dma = NULL; in brcmuart_startup()
615 priv->dma.tx_dma = brcmuart_tx_dma; in brcmuart_startup()
616 up->dma = &priv->dma; in brcmuart_startup()
626 struct brcmuart_priv *priv = up->port.private_data; in brcmuart_shutdown()
629 spin_lock_irqsave(&port->lock, flags); in brcmuart_shutdown()
630 priv->shutdown = true; in brcmuart_shutdown()
631 if (priv->dma_enabled) { in brcmuart_shutdown()
643 up->dma = NULL; in brcmuart_shutdown()
645 spin_unlock_irqrestore(&port->lock, flags); in brcmuart_shutdown()
658 priv->default_mux_rate = clk_get_rate(priv->baud_mux_clk); in init_real_clk_rates()
659 for (x = 0; x < ARRAY_SIZE(priv->real_rates); x++) { in init_real_clk_rates()
660 if (priv->rate_table[x] == 0) { in init_real_clk_rates()
661 priv->real_rates[x] = 0; in init_real_clk_rates()
664 rc = clk_set_rate(priv->baud_mux_clk, priv->rate_table[x]); in init_real_clk_rates()
667 priv->rate_table[x]); in init_real_clk_rates()
668 priv->real_rates[x] = priv->rate_table[x]; in init_real_clk_rates()
670 priv->real_rates[x] = clk_get_rate(priv->baud_mux_clk); in init_real_clk_rates()
673 clk_set_rate(priv->baud_mux_clk, priv->default_mux_rate); in init_real_clk_rates()
684 int best_index = -1; in set_clock_mux()
693 if (priv->baud_mux_clk == NULL) in set_clock_mux()
697 for (i = 0; i < ARRAY_SIZE(priv->real_rates); i++) { in set_clock_mux()
698 if (priv->real_rates[i] == 0) in set_clock_mux()
700 rate = priv->real_rates[i] / 16; in set_clock_mux()
713 hires_err = (hires_err - hires_baud); in set_clock_mux()
715 hires_err = (hires_baud - hires_err); in set_clock_mux()
718 dev_dbg(up->dev, in set_clock_mux()
720 baud, priv->real_rates[i], percent / 100, in set_clock_mux()
728 if (best_index == -1) { in set_clock_mux()
729 dev_err(up->dev, "Error, %d BAUD rate is too fast.\n", baud); in set_clock_mux()
732 rate = priv->real_rates[best_index]; in set_clock_mux()
733 rc = clk_set_rate(priv->baud_mux_clk, rate); in set_clock_mux()
735 dev_err(up->dev, "Error selecting BAUD MUX clock\n"); in set_clock_mux()
739 dev_err(up->dev, "Error, baud: %d has %u.%u%% error\n", in set_clock_mux()
743 dev_dbg(up->dev, "Selecting BAUD MUX rate: %u\n", rate); in set_clock_mux()
744 dev_dbg(up->dev, "Requested baud: %u, Actual baud: %u\n", in set_clock_mux()
750 priv->char_wait = ns_to_ktime(i); in set_clock_mux()
752 up->uartclk = rate; in set_clock_mux()
760 struct brcmuart_priv *priv = up->private_data; in brcmstb_set_termios()
762 if (priv->dma_enabled) in brcmstb_set_termios()
766 if (p8250->mcr & UART_MCR_AFE) in brcmstb_set_termios()
767 p8250->port.status |= UPSTAT_AUTOCTS; in brcmstb_set_termios()
768 if (priv->dma_enabled) in brcmstb_set_termios()
775 struct brcmuart_priv *priv = p->private_data; in brcmuart_handle_irq()
787 if (((iir & UART_IIR_ID) == UART_IIR_RX_TIMEOUT) && !(priv->shutdown)) { in brcmuart_handle_irq()
788 spin_lock_irqsave(&p->lock, flags); in brcmuart_handle_irq()
799 if ((ier & UART_IER_RDI) && (up->mcr & UART_MCR_AFE)) { in brcmuart_handle_irq()
805 hrtimer_start(&priv->hrt, priv->char_wait, in brcmuart_handle_irq()
813 spin_unlock_irqrestore(&p->lock, flags); in brcmuart_handle_irq()
823 struct uart_port *p = priv->up; in brcmuart_hrtimer_func()
828 if (priv->shutdown) in brcmuart_hrtimer_func()
831 spin_lock_irqsave(&p->lock, flags); in brcmuart_hrtimer_func()
840 priv->rx_bad_timeout_no_char++; in brcmuart_hrtimer_func()
842 priv->rx_bad_timeout_late_char++; in brcmuart_hrtimer_func()
845 /* re-enable receive unless upper layer has disabled it */ in brcmuart_hrtimer_func()
846 if ((up->ier & (UART_IER_RLSI | UART_IER_RDI)) == in brcmuart_hrtimer_func()
855 spin_unlock_irqrestore(&p->lock, flags); in brcmuart_hrtimer_func()
861 .compatible = "brcm,bcm7278-uart",
865 .compatible = "brcm,bcm7271-uart",
875 if (priv->rx_bufs) in brcmuart_free_bufs()
876 dma_free_coherent(dev, priv->rx_size, priv->rx_bufs, in brcmuart_free_bufs()
877 priv->rx_addr); in brcmuart_free_bufs()
878 if (priv->tx_buf) in brcmuart_free_bufs()
879 dma_free_coherent(dev, priv->tx_size, priv->tx_buf, in brcmuart_free_bufs()
880 priv->tx_addr); in brcmuart_free_bufs()
885 struct brcmuart_priv *priv = port->private_data; in brcmuart_throttle()
892 struct brcmuart_priv *priv = port->private_data; in brcmuart_unthrottle()
900 struct brcmuart_priv *priv = s->private; in debugfs_stats_show()
903 priv->rx_err); in debugfs_stats_show()
905 priv->rx_timeout); in debugfs_stats_show()
907 priv->rx_abort); in debugfs_stats_show()
909 priv->rx_bad_timeout_late_char); in debugfs_stats_show()
911 priv->rx_bad_timeout_no_char); in debugfs_stats_show()
913 priv->rx_missing_close_timeout); in debugfs_stats_show()
914 if (priv->dma_enabled) { in debugfs_stats_show()
916 priv->dma_rx_partial_buf); in debugfs_stats_show()
918 priv->dma_rx_full_buf); in debugfs_stats_show()
927 priv->debugfs_dir = debugfs_create_dir(device, brcmuart_debugfs_root); in brcmuart_init_debugfs()
928 debugfs_create_file("stats", 0444, priv->debugfs_dir, priv, in brcmuart_init_debugfs()
936 struct device_node *np = pdev->dev.of_node; in brcmuart_probe()
939 struct device *dev = &pdev->dev; in brcmuart_probe()
951 "uart", "dma_rx", "dma_tx", "dma_intr2", "dma_arb" in brcmuart_probe()
957 return -EINVAL; in brcmuart_probe()
962 return -ENOMEM; in brcmuart_probe()
965 if (!of_id || !of_id->data) in brcmuart_probe()
966 priv->rate_table = brcmstb_rate_table; in brcmuart_probe()
968 priv->rate_table = of_id->data; in brcmuart_probe()
975 priv->regs[x] = devm_ioremap(dev, regs->start, in brcmuart_probe()
977 if (!priv->regs[x]) in brcmuart_probe()
978 return -ENOMEM; in brcmuart_probe()
980 mapbase = regs->start; in brcmuart_probe()
981 membase = priv->regs[x]; in brcmuart_probe()
985 /* We should have just the uart base registers or all the registers */ in brcmuart_probe()
988 return -EINVAL; in brcmuart_probe()
1003 priv->dma_enabled = true; in brcmuart_probe()
1011 "Timeout arbitrating for UART DMA hardware\n"); in brcmuart_probe()
1015 of_property_read_u32(np, "clock-frequency", &clk_rate); in brcmuart_probe()
1020 if (PTR_ERR(baud_mux_clk) == -EPROBE_DEFER) in brcmuart_probe()
1021 return -EPROBE_DEFER; in brcmuart_probe()
1028 priv->baud_mux_clk = baud_mux_clk; in brcmuart_probe()
1030 clk_rate = priv->default_mux_rate; in brcmuart_probe()
1034 dev_err(dev, "clock-frequency or clk not defined\n"); in brcmuart_probe()
1035 return -EINVAL; in brcmuart_probe()
1038 dev_dbg(dev, "DMA is %senabled\n", priv->dma_enabled ? "" : "not "); in brcmuart_probe()
1046 up.port.irq = irq->start; in brcmuart_probe()
1064 hrtimer_init(&priv->hrt, CLOCK_MONOTONIC, HRTIMER_MODE_ABS); in brcmuart_probe()
1065 priv->hrt.function = brcmuart_hrtimer_func; in brcmuart_probe()
1073 if (priv->dma_enabled) { in brcmuart_probe()
1074 priv->rx_size = RX_BUF_SIZE * RX_BUFS_COUNT; in brcmuart_probe()
1075 priv->rx_bufs = dma_alloc_coherent(dev, in brcmuart_probe()
1076 priv->rx_size, in brcmuart_probe()
1077 &priv->rx_addr, GFP_KERNEL); in brcmuart_probe()
1078 if (!priv->rx_bufs) in brcmuart_probe()
1080 priv->tx_size = UART_XMIT_SIZE; in brcmuart_probe()
1081 priv->tx_buf = dma_alloc_coherent(dev, in brcmuart_probe()
1082 priv->tx_size, in brcmuart_probe()
1083 &priv->tx_addr, GFP_KERNEL); in brcmuart_probe()
1084 if (!priv->tx_buf) in brcmuart_probe()
1093 priv->line = ret; in brcmuart_probe()
1095 priv->up = &new_port->port; in brcmuart_probe()
1096 if (priv->dma_enabled) { in brcmuart_probe()
1103 IRQF_SHARED, "uart DMA irq", &new_port->port); in brcmuart_probe()
1110 brcmuart_init_debugfs(priv, dev_name(&pdev->dev)); in brcmuart_probe()
1114 serial8250_unregister_port(priv->line); in brcmuart_probe()
1118 return -ENODEV; in brcmuart_probe()
1125 debugfs_remove_recursive(priv->debugfs_dir); in brcmuart_remove()
1126 hrtimer_cancel(&priv->hrt); in brcmuart_remove()
1127 serial8250_unregister_port(priv->line); in brcmuart_remove()
1128 brcmuart_free_bufs(&pdev->dev, priv); in brcmuart_remove()
1137 serial8250_suspend_port(priv->line); in brcmuart_suspend()
1138 clk_disable_unprepare(priv->baud_mux_clk); in brcmuart_suspend()
1148 ret = clk_prepare_enable(priv->baud_mux_clk); in brcmuart_resume()
1156 ret = clk_set_rate(priv->baud_mux_clk, priv->default_mux_rate); in brcmuart_resume()
1159 if (priv->dma_enabled) { in brcmuart_resume()
1162 return(-EBUSY); in brcmuart_resume()
1165 start_rx_dma(serial8250_get_port(priv->line)); in brcmuart_resume()
1167 serial8250_resume_port(priv->line); in brcmuart_resume()
1177 .name = "bcm7271-uart",