190 static inline u32 tegra_qspi_readl(struct tegra_qspi *tqspi, unsigned long offset)  in tegra_qspi_readl()  function
209 	value = tegra_qspi_readl(tqspi, QSPI_TRANS_STATUS);  in tegra_qspi_mask_clear_irq()
212 	value = tegra_qspi_readl(tqspi, QSPI_INTR_MASK);  in tegra_qspi_mask_clear_irq()
219 	value = tegra_qspi_readl(tqspi, QSPI_FIFO_STATUS);  in tegra_qspi_mask_clear_irq()
271 	fifo_status = tegra_qspi_readl(tqspi, QSPI_FIFO_STATUS);  in tegra_qspi_fill_tx_fifo_from_client_txbuf()
320 	fifo_status = tegra_qspi_readl(tqspi, QSPI_FIFO_STATUS);  in tegra_qspi_read_rx_fifo_to_client_rxbuf()
325 			x = tegra_qspi_readl(tqspi, QSPI_RX_FIFO);  in tegra_qspi_read_rx_fifo_to_client_rxbuf()
343 			x = tegra_qspi_readl(tqspi, QSPI_RX_FIFO) & rx_mask;  in tegra_qspi_read_rx_fifo_to_client_rxbuf()
503 	val = tegra_qspi_readl(tqspi, QSPI_FIFO_STATUS);  in tegra_qspi_flush_fifos()
524 	intr_mask = tegra_qspi_readl(tqspi, QSPI_INTR_MASK);  in tegra_qspi_unmask_irq()
941 		tegra_qspi_readl(tqspi, QSPI_COMMAND1),  in tegra_qspi_dump_regs()
942 		tegra_qspi_readl(tqspi, QSPI_COMMAND2));  in tegra_qspi_dump_regs()
944 		tegra_qspi_readl(tqspi, QSPI_DMA_CTL),  in tegra_qspi_dump_regs()
945 		tegra_qspi_readl(tqspi, QSPI_DMA_BLK));  in tegra_qspi_dump_regs()
947 		tegra_qspi_readl(tqspi, QSPI_INTR_MASK),  in tegra_qspi_dump_regs()
948 		tegra_qspi_readl(tqspi, QSPI_MISC_REG));  in tegra_qspi_dump_regs()
950 		tegra_qspi_readl(tqspi, QSPI_TRANS_STATUS),  in tegra_qspi_dump_regs()
951 		tegra_qspi_readl(tqspi, QSPI_FIFO_STATUS));  in tegra_qspi_dump_regs()
1188 	tqspi->status_reg = tegra_qspi_readl(tqspi, QSPI_FIFO_STATUS);  in tegra_qspi_isr_thread()
1295 	tqspi->spi_cs_timing1 = tegra_qspi_readl(tqspi, QSPI_CS_TIMING1);  in tegra_qspi_probe()
1296 	tqspi->spi_cs_timing2 = tegra_qspi_readl(tqspi, QSPI_CS_TIMING2);  in tegra_qspi_probe()
1297 	tqspi->def_command2_reg = tegra_qspi_readl(tqspi, QSPI_COMMAND2);  in tegra_qspi_probe()
1371 	tegra_qspi_readl(tqspi, QSPI_COMMAND1);  in tegra_qspi_runtime_suspend()