765 	u32 command1, command2, speed = t->speed_hz;  in tegra_qspi_setup_transfer_one()  local
783 		command1 = tqspi->def_command1_reg;  in tegra_qspi_setup_transfer_one()
784 		command1 |= QSPI_BIT_LENGTH(bits_per_word - 1);  in tegra_qspi_setup_transfer_one()
786 		command1 &= ~QSPI_CONTROL_MODE_MASK;  in tegra_qspi_setup_transfer_one()
789 			command1 |= QSPI_CONTROL_MODE_3;  in tegra_qspi_setup_transfer_one()
791 			command1 |= QSPI_CONTROL_MODE_0;  in tegra_qspi_setup_transfer_one()
794 			command1 |= QSPI_CS_SW_VAL;  in tegra_qspi_setup_transfer_one()
796 			command1 &= ~QSPI_CS_SW_VAL;  in tegra_qspi_setup_transfer_one()
797 		tegra_qspi_writel(tqspi, command1, QSPI_COMMAND1);  in tegra_qspi_setup_transfer_one()
810 		command1 = tqspi->command1_reg;  in tegra_qspi_setup_transfer_one()
811 		command1 &= ~QSPI_BIT_LENGTH(~0);  in tegra_qspi_setup_transfer_one()
812 		command1 |= QSPI_BIT_LENGTH(bits_per_word - 1);  in tegra_qspi_setup_transfer_one()
815 	command1 &= ~QSPI_SDR_DDR_SEL;  in tegra_qspi_setup_transfer_one()
817 	return command1;  in tegra_qspi_setup_transfer_one()
821 					 struct spi_transfer *t, u32 command1)  in tegra_qspi_start_transfer_one()  argument
830 	command1 &= ~QSPI_PACKED;  in tegra_qspi_start_transfer_one()
832 		command1 |= QSPI_PACKED;  in tegra_qspi_start_transfer_one()
833 	tegra_qspi_writel(tqspi, command1, QSPI_COMMAND1);  in tegra_qspi_start_transfer_one()
837 	command1 &= ~(QSPI_TX_EN | QSPI_RX_EN);  in tegra_qspi_start_transfer_one()
839 		command1 |= QSPI_RX_EN;  in tegra_qspi_start_transfer_one()
845 		command1 |= QSPI_TX_EN;  in tegra_qspi_start_transfer_one()
850 	command1 &= ~QSPI_INTERFACE_WIDTH_MASK;  in tegra_qspi_start_transfer_one()
853 		command1 |= QSPI_INTERFACE_WIDTH_QUAD;  in tegra_qspi_start_transfer_one()
855 		command1 |= QSPI_INTERFACE_WIDTH_DUAL;  in tegra_qspi_start_transfer_one()
857 		command1 |= QSPI_INTERFACE_WIDTH_SINGLE;  in tegra_qspi_start_transfer_one()
859 	tqspi->command1_reg = command1;  in tegra_qspi_start_transfer_one()