Lines Matching +full:stm32f469 +full:- +full:qspi
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
9 #include <linux/dma-mapping.h>
23 #include <linux/spi/spi-mem.h>
93 #define STM32_AUTOSUSPEND_DELAY -1
131 struct stm32_qspi *qspi = (struct stm32_qspi *)dev_id; in stm32_qspi_irq() local
134 cr = readl_relaxed(qspi->io_base + QSPI_CR); in stm32_qspi_irq()
135 sr = readl_relaxed(qspi->io_base + QSPI_SR); in stm32_qspi_irq()
140 writel_relaxed(cr, qspi->io_base + QSPI_CR); in stm32_qspi_irq()
141 complete(&qspi->match_completion); in stm32_qspi_irq()
149 writel_relaxed(cr, qspi->io_base + QSPI_CR); in stm32_qspi_irq()
150 complete(&qspi->data_completion); in stm32_qspi_irq()
166 static int stm32_qspi_tx_poll(struct stm32_qspi *qspi, in stm32_qspi_tx_poll() argument
170 u32 len = op->data.nbytes, sr; in stm32_qspi_tx_poll()
174 if (op->data.dir == SPI_MEM_DATA_IN) { in stm32_qspi_tx_poll()
176 buf = op->data.buf.in; in stm32_qspi_tx_poll()
180 buf = (u8 *)op->data.buf.out; in stm32_qspi_tx_poll()
183 while (len--) { in stm32_qspi_tx_poll()
184 ret = readl_relaxed_poll_timeout_atomic(qspi->io_base + QSPI_SR, in stm32_qspi_tx_poll()
188 dev_err(qspi->dev, "fifo timeout (len:%d stat:%#x)\n", in stm32_qspi_tx_poll()
192 tx_fifo(buf++, qspi->io_base + QSPI_DR); in stm32_qspi_tx_poll()
198 static int stm32_qspi_tx_mm(struct stm32_qspi *qspi, in stm32_qspi_tx_mm() argument
201 memcpy_fromio(op->data.buf.in, qspi->mm_base + op->addr.val, in stm32_qspi_tx_mm()
202 op->data.nbytes); in stm32_qspi_tx_mm()
213 static int stm32_qspi_tx_dma(struct stm32_qspi *qspi, in stm32_qspi_tx_dma() argument
224 if (op->data.dir == SPI_MEM_DATA_IN) { in stm32_qspi_tx_dma()
226 dma_ch = qspi->dma_chrx; in stm32_qspi_tx_dma()
229 dma_ch = qspi->dma_chtx; in stm32_qspi_tx_dma()
233 * spi_map_buf return -EINVAL if the buffer is not DMA-able in stm32_qspi_tx_dma()
234 * (DMA-able: in vmalloc | kmap | virt_addr_valid) in stm32_qspi_tx_dma()
236 err = spi_controller_dma_map_mem_op_data(qspi->ctrl, op, &sgt); in stm32_qspi_tx_dma()
243 err = -ENOMEM; in stm32_qspi_tx_dma()
247 cr = readl_relaxed(qspi->io_base + QSPI_CR); in stm32_qspi_tx_dma()
249 reinit_completion(&qspi->dma_completion); in stm32_qspi_tx_dma()
250 desc->callback = stm32_qspi_dma_callback; in stm32_qspi_tx_dma()
251 desc->callback_param = &qspi->dma_completion; in stm32_qspi_tx_dma()
259 writel_relaxed(cr | CR_DMAEN, qspi->io_base + QSPI_CR); in stm32_qspi_tx_dma()
262 if (!wait_for_completion_timeout(&qspi->dma_completion, in stm32_qspi_tx_dma()
264 err = -ETIMEDOUT; in stm32_qspi_tx_dma()
270 writel_relaxed(cr & ~CR_DMAEN, qspi->io_base + QSPI_CR); in stm32_qspi_tx_dma()
272 spi_controller_dma_unmap_mem_op_data(qspi->ctrl, op, &sgt); in stm32_qspi_tx_dma()
277 static int stm32_qspi_tx(struct stm32_qspi *qspi, const struct spi_mem_op *op) in stm32_qspi_tx() argument
279 if (!op->data.nbytes) in stm32_qspi_tx()
282 if (qspi->fmode == CCR_FMODE_MM) in stm32_qspi_tx()
283 return stm32_qspi_tx_mm(qspi, op); in stm32_qspi_tx()
284 else if (((op->data.dir == SPI_MEM_DATA_IN && qspi->dma_chrx) || in stm32_qspi_tx()
285 (op->data.dir == SPI_MEM_DATA_OUT && qspi->dma_chtx)) && in stm32_qspi_tx()
286 op->data.nbytes > 4) in stm32_qspi_tx()
287 if (!stm32_qspi_tx_dma(qspi, op)) in stm32_qspi_tx()
290 return stm32_qspi_tx_poll(qspi, op); in stm32_qspi_tx()
293 static int stm32_qspi_wait_nobusy(struct stm32_qspi *qspi) in stm32_qspi_wait_nobusy() argument
297 return readl_relaxed_poll_timeout_atomic(qspi->io_base + QSPI_SR, sr, in stm32_qspi_wait_nobusy()
302 static int stm32_qspi_wait_cmd(struct stm32_qspi *qspi, in stm32_qspi_wait_cmd() argument
308 if (!op->data.nbytes) in stm32_qspi_wait_cmd()
311 if (readl_relaxed(qspi->io_base + QSPI_SR) & SR_TCF) in stm32_qspi_wait_cmd()
314 reinit_completion(&qspi->data_completion); in stm32_qspi_wait_cmd()
315 cr = readl_relaxed(qspi->io_base + QSPI_CR); in stm32_qspi_wait_cmd()
316 writel_relaxed(cr | CR_TCIE | CR_TEIE, qspi->io_base + QSPI_CR); in stm32_qspi_wait_cmd()
318 if (!wait_for_completion_timeout(&qspi->data_completion, in stm32_qspi_wait_cmd()
320 err = -ETIMEDOUT; in stm32_qspi_wait_cmd()
322 sr = readl_relaxed(qspi->io_base + QSPI_SR); in stm32_qspi_wait_cmd()
324 err = -EIO; in stm32_qspi_wait_cmd()
329 writel_relaxed(FCR_CTCF | FCR_CTEF, qspi->io_base + QSPI_FCR); in stm32_qspi_wait_cmd()
332 err = stm32_qspi_wait_nobusy(qspi); in stm32_qspi_wait_cmd()
337 static int stm32_qspi_wait_poll_status(struct stm32_qspi *qspi, in stm32_qspi_wait_poll_status() argument
342 reinit_completion(&qspi->match_completion); in stm32_qspi_wait_poll_status()
343 cr = readl_relaxed(qspi->io_base + QSPI_CR); in stm32_qspi_wait_poll_status()
344 writel_relaxed(cr | CR_SMIE, qspi->io_base + QSPI_CR); in stm32_qspi_wait_poll_status()
346 if (!wait_for_completion_timeout(&qspi->match_completion, in stm32_qspi_wait_poll_status()
347 msecs_to_jiffies(qspi->status_timeout))) in stm32_qspi_wait_poll_status()
348 return -ETIMEDOUT; in stm32_qspi_wait_poll_status()
350 writel_relaxed(FCR_CSMF, qspi->io_base + QSPI_FCR); in stm32_qspi_wait_poll_status()
355 static int stm32_qspi_get_mode(struct stm32_qspi *qspi, u8 buswidth) in stm32_qspi_get_mode() argument
365 struct stm32_qspi *qspi = spi_controller_get_devdata(mem->spi->master); in stm32_qspi_send() local
366 struct stm32_qspi_flash *flash = &qspi->flash[mem->spi->chip_select]; in stm32_qspi_send()
370 dev_dbg(qspi->dev, "cmd:%#x mode:%d.%d.%d.%d addr:%#llx len:%#x\n", in stm32_qspi_send()
371 op->cmd.opcode, op->cmd.buswidth, op->addr.buswidth, in stm32_qspi_send()
372 op->dummy.buswidth, op->data.buswidth, in stm32_qspi_send()
373 op->addr.val, op->data.nbytes); in stm32_qspi_send()
375 err = stm32_qspi_wait_nobusy(qspi); in stm32_qspi_send()
379 cr = readl_relaxed(qspi->io_base + QSPI_CR); in stm32_qspi_send()
381 cr |= FIELD_PREP(CR_PRESC_MASK, flash->presc); in stm32_qspi_send()
382 cr |= FIELD_PREP(CR_FSEL, flash->cs); in stm32_qspi_send()
383 writel_relaxed(cr, qspi->io_base + QSPI_CR); in stm32_qspi_send()
385 if (op->data.nbytes) in stm32_qspi_send()
386 writel_relaxed(op->data.nbytes - 1, in stm32_qspi_send()
387 qspi->io_base + QSPI_DLR); in stm32_qspi_send()
389 ccr = qspi->fmode; in stm32_qspi_send()
390 ccr |= FIELD_PREP(CCR_INST_MASK, op->cmd.opcode); in stm32_qspi_send()
392 stm32_qspi_get_mode(qspi, op->cmd.buswidth)); in stm32_qspi_send()
394 if (op->addr.nbytes) { in stm32_qspi_send()
396 stm32_qspi_get_mode(qspi, op->addr.buswidth)); in stm32_qspi_send()
397 ccr |= FIELD_PREP(CCR_ADSIZE_MASK, op->addr.nbytes - 1); in stm32_qspi_send()
400 if (op->dummy.buswidth && op->dummy.nbytes) in stm32_qspi_send()
402 op->dummy.nbytes * 8 / op->dummy.buswidth); in stm32_qspi_send()
404 if (op->data.nbytes) { in stm32_qspi_send()
406 stm32_qspi_get_mode(qspi, op->data.buswidth)); in stm32_qspi_send()
409 writel_relaxed(ccr, qspi->io_base + QSPI_CCR); in stm32_qspi_send()
411 if (op->addr.nbytes && qspi->fmode != CCR_FMODE_MM) in stm32_qspi_send()
412 writel_relaxed(op->addr.val, qspi->io_base + QSPI_AR); in stm32_qspi_send()
414 if (qspi->fmode == CCR_FMODE_APM) in stm32_qspi_send()
415 err_poll_status = stm32_qspi_wait_poll_status(qspi, op); in stm32_qspi_send()
417 err = stm32_qspi_tx(qspi, op); in stm32_qspi_send()
421 * -error case in stm32_qspi_send()
422 * -read memory map: prefetching must be stopped if we read the last in stm32_qspi_send()
423 * byte of device (device size - fifo size). like device size is not in stm32_qspi_send()
426 if (err || err_poll_status || qspi->fmode == CCR_FMODE_MM) in stm32_qspi_send()
430 err = stm32_qspi_wait_cmd(qspi, op); in stm32_qspi_send()
437 cr = readl_relaxed(qspi->io_base + QSPI_CR) | CR_ABORT; in stm32_qspi_send()
438 writel_relaxed(cr, qspi->io_base + QSPI_CR); in stm32_qspi_send()
441 timeout = readl_relaxed_poll_timeout_atomic(qspi->io_base + QSPI_CR, in stm32_qspi_send()
445 writel_relaxed(FCR_CTCF | FCR_CSMF, qspi->io_base + QSPI_FCR); in stm32_qspi_send()
448 dev_err(qspi->dev, "%s err:%d err_poll_status:%d abort timeout:%d\n", in stm32_qspi_send()
460 struct stm32_qspi *qspi = spi_controller_get_devdata(mem->spi->master); in stm32_qspi_poll_status() local
464 return -EOPNOTSUPP; in stm32_qspi_poll_status()
466 ret = pm_runtime_get_sync(qspi->dev); in stm32_qspi_poll_status()
468 pm_runtime_put_noidle(qspi->dev); in stm32_qspi_poll_status()
472 mutex_lock(&qspi->lock); in stm32_qspi_poll_status()
474 writel_relaxed(mask, qspi->io_base + QSPI_PSMKR); in stm32_qspi_poll_status()
475 writel_relaxed(match, qspi->io_base + QSPI_PSMAR); in stm32_qspi_poll_status()
476 qspi->fmode = CCR_FMODE_APM; in stm32_qspi_poll_status()
477 qspi->status_timeout = timeout_ms; in stm32_qspi_poll_status()
480 mutex_unlock(&qspi->lock); in stm32_qspi_poll_status()
482 pm_runtime_mark_last_busy(qspi->dev); in stm32_qspi_poll_status()
483 pm_runtime_put_autosuspend(qspi->dev); in stm32_qspi_poll_status()
490 struct stm32_qspi *qspi = spi_controller_get_devdata(mem->spi->master); in stm32_qspi_exec_op() local
493 ret = pm_runtime_get_sync(qspi->dev); in stm32_qspi_exec_op()
495 pm_runtime_put_noidle(qspi->dev); in stm32_qspi_exec_op()
499 mutex_lock(&qspi->lock); in stm32_qspi_exec_op()
500 if (op->data.dir == SPI_MEM_DATA_IN && op->data.nbytes) in stm32_qspi_exec_op()
501 qspi->fmode = CCR_FMODE_INDR; in stm32_qspi_exec_op()
503 qspi->fmode = CCR_FMODE_INDW; in stm32_qspi_exec_op()
506 mutex_unlock(&qspi->lock); in stm32_qspi_exec_op()
508 pm_runtime_mark_last_busy(qspi->dev); in stm32_qspi_exec_op()
509 pm_runtime_put_autosuspend(qspi->dev); in stm32_qspi_exec_op()
516 struct stm32_qspi *qspi = spi_controller_get_devdata(desc->mem->spi->master); in stm32_qspi_dirmap_create() local
518 if (desc->info.op_tmpl.data.dir == SPI_MEM_DATA_OUT) in stm32_qspi_dirmap_create()
519 return -EOPNOTSUPP; in stm32_qspi_dirmap_create()
522 if (!qspi->mm_base && desc->info.op_tmpl.data.dir == SPI_MEM_DATA_IN) in stm32_qspi_dirmap_create()
523 return -EOPNOTSUPP; in stm32_qspi_dirmap_create()
525 if (!qspi->mm_size) in stm32_qspi_dirmap_create()
526 return -EOPNOTSUPP; in stm32_qspi_dirmap_create()
534 struct stm32_qspi *qspi = spi_controller_get_devdata(desc->mem->spi->master); in stm32_qspi_dirmap_read() local
539 ret = pm_runtime_get_sync(qspi->dev); in stm32_qspi_dirmap_read()
541 pm_runtime_put_noidle(qspi->dev); in stm32_qspi_dirmap_read()
545 mutex_lock(&qspi->lock); in stm32_qspi_dirmap_read()
550 memcpy(&op, &desc->info.op_tmpl, sizeof(struct spi_mem_op)); in stm32_qspi_dirmap_read()
551 dev_dbg(qspi->dev, "%s len = 0x%zx offs = 0x%llx buf = 0x%p\n", __func__, len, offs, buf); in stm32_qspi_dirmap_read()
554 op.addr.val = desc->info.offset + offs; in stm32_qspi_dirmap_read()
558 if (addr_max < qspi->mm_size && op.addr.buswidth) in stm32_qspi_dirmap_read()
559 qspi->fmode = CCR_FMODE_MM; in stm32_qspi_dirmap_read()
561 qspi->fmode = CCR_FMODE_INDR; in stm32_qspi_dirmap_read()
563 ret = stm32_qspi_send(desc->mem, &op); in stm32_qspi_dirmap_read()
564 mutex_unlock(&qspi->lock); in stm32_qspi_dirmap_read()
566 pm_runtime_mark_last_busy(qspi->dev); in stm32_qspi_dirmap_read()
567 pm_runtime_put_autosuspend(qspi->dev); in stm32_qspi_dirmap_read()
574 struct spi_controller *ctrl = spi->master; in stm32_qspi_setup()
575 struct stm32_qspi *qspi = spi_controller_get_devdata(ctrl); in stm32_qspi_setup() local
580 if (ctrl->busy) in stm32_qspi_setup()
581 return -EBUSY; in stm32_qspi_setup()
583 if (!spi->max_speed_hz) in stm32_qspi_setup()
584 return -EINVAL; in stm32_qspi_setup()
586 ret = pm_runtime_get_sync(qspi->dev); in stm32_qspi_setup()
588 pm_runtime_put_noidle(qspi->dev); in stm32_qspi_setup()
592 presc = DIV_ROUND_UP(qspi->clk_rate, spi->max_speed_hz) - 1; in stm32_qspi_setup()
594 flash = &qspi->flash[spi->chip_select]; in stm32_qspi_setup()
595 flash->cs = spi->chip_select; in stm32_qspi_setup()
596 flash->presc = presc; in stm32_qspi_setup()
598 mutex_lock(&qspi->lock); in stm32_qspi_setup()
599 qspi->cr_reg = CR_APMS | 3 << CR_FTHRES_SHIFT | CR_SSHIFT | CR_EN; in stm32_qspi_setup()
600 writel_relaxed(qspi->cr_reg, qspi->io_base + QSPI_CR); in stm32_qspi_setup()
603 qspi->dcr_reg = DCR_FSIZE_MASK; in stm32_qspi_setup()
604 writel_relaxed(qspi->dcr_reg, qspi->io_base + QSPI_DCR); in stm32_qspi_setup()
605 mutex_unlock(&qspi->lock); in stm32_qspi_setup()
607 pm_runtime_mark_last_busy(qspi->dev); in stm32_qspi_setup()
608 pm_runtime_put_autosuspend(qspi->dev); in stm32_qspi_setup()
613 static int stm32_qspi_dma_setup(struct stm32_qspi *qspi) in stm32_qspi_dma_setup() argument
616 struct device *dev = qspi->dev; in stm32_qspi_dma_setup()
623 dma_cfg.src_addr = qspi->phys_base + QSPI_DR; in stm32_qspi_dma_setup()
624 dma_cfg.dst_addr = qspi->phys_base + QSPI_DR; in stm32_qspi_dma_setup()
628 qspi->dma_chrx = dma_request_chan(dev, "rx"); in stm32_qspi_dma_setup()
629 if (IS_ERR(qspi->dma_chrx)) { in stm32_qspi_dma_setup()
630 ret = PTR_ERR(qspi->dma_chrx); in stm32_qspi_dma_setup()
631 qspi->dma_chrx = NULL; in stm32_qspi_dma_setup()
632 if (ret == -EPROBE_DEFER) in stm32_qspi_dma_setup()
635 if (dmaengine_slave_config(qspi->dma_chrx, &dma_cfg)) { in stm32_qspi_dma_setup()
637 dma_release_channel(qspi->dma_chrx); in stm32_qspi_dma_setup()
638 qspi->dma_chrx = NULL; in stm32_qspi_dma_setup()
642 qspi->dma_chtx = dma_request_chan(dev, "tx"); in stm32_qspi_dma_setup()
643 if (IS_ERR(qspi->dma_chtx)) { in stm32_qspi_dma_setup()
644 ret = PTR_ERR(qspi->dma_chtx); in stm32_qspi_dma_setup()
645 qspi->dma_chtx = NULL; in stm32_qspi_dma_setup()
647 if (dmaengine_slave_config(qspi->dma_chtx, &dma_cfg)) { in stm32_qspi_dma_setup()
649 dma_release_channel(qspi->dma_chtx); in stm32_qspi_dma_setup()
650 qspi->dma_chtx = NULL; in stm32_qspi_dma_setup()
655 init_completion(&qspi->dma_completion); in stm32_qspi_dma_setup()
657 if (ret != -EPROBE_DEFER) in stm32_qspi_dma_setup()
663 static void stm32_qspi_dma_free(struct stm32_qspi *qspi) in stm32_qspi_dma_free() argument
665 if (qspi->dma_chtx) in stm32_qspi_dma_free()
666 dma_release_channel(qspi->dma_chtx); in stm32_qspi_dma_free()
667 if (qspi->dma_chrx) in stm32_qspi_dma_free()
668 dma_release_channel(qspi->dma_chrx); in stm32_qspi_dma_free()
684 struct device *dev = &pdev->dev; in stm32_qspi_probe()
687 struct stm32_qspi *qspi; in stm32_qspi_probe() local
691 ctrl = spi_alloc_master(dev, sizeof(*qspi)); in stm32_qspi_probe()
693 return -ENOMEM; in stm32_qspi_probe()
695 qspi = spi_controller_get_devdata(ctrl); in stm32_qspi_probe()
696 qspi->ctrl = ctrl; in stm32_qspi_probe()
698 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "qspi"); in stm32_qspi_probe()
699 qspi->io_base = devm_ioremap_resource(dev, res); in stm32_qspi_probe()
700 if (IS_ERR(qspi->io_base)) { in stm32_qspi_probe()
701 ret = PTR_ERR(qspi->io_base); in stm32_qspi_probe()
705 qspi->phys_base = res->start; in stm32_qspi_probe()
708 qspi->mm_base = devm_ioremap_resource(dev, res); in stm32_qspi_probe()
709 if (IS_ERR(qspi->mm_base)) { in stm32_qspi_probe()
710 ret = PTR_ERR(qspi->mm_base); in stm32_qspi_probe()
714 qspi->mm_size = resource_size(res); in stm32_qspi_probe()
715 if (qspi->mm_size > STM32_QSPI_MAX_MMAP_SZ) { in stm32_qspi_probe()
716 ret = -EINVAL; in stm32_qspi_probe()
727 dev_name(dev), qspi); in stm32_qspi_probe()
733 init_completion(&qspi->data_completion); in stm32_qspi_probe()
734 init_completion(&qspi->match_completion); in stm32_qspi_probe()
736 qspi->clk = devm_clk_get(dev, NULL); in stm32_qspi_probe()
737 if (IS_ERR(qspi->clk)) { in stm32_qspi_probe()
738 ret = PTR_ERR(qspi->clk); in stm32_qspi_probe()
742 qspi->clk_rate = clk_get_rate(qspi->clk); in stm32_qspi_probe()
743 if (!qspi->clk_rate) { in stm32_qspi_probe()
744 ret = -EINVAL; in stm32_qspi_probe()
748 ret = clk_prepare_enable(qspi->clk); in stm32_qspi_probe()
757 if (ret == -EPROBE_DEFER) in stm32_qspi_probe()
765 qspi->dev = dev; in stm32_qspi_probe()
766 platform_set_drvdata(pdev, qspi); in stm32_qspi_probe()
767 ret = stm32_qspi_dma_setup(qspi); in stm32_qspi_probe()
771 mutex_init(&qspi->lock); in stm32_qspi_probe()
773 ctrl->mode_bits = SPI_RX_DUAL | SPI_RX_QUAD in stm32_qspi_probe()
775 ctrl->setup = stm32_qspi_setup; in stm32_qspi_probe()
776 ctrl->bus_num = -1; in stm32_qspi_probe()
777 ctrl->mem_ops = &stm32_qspi_mem_ops; in stm32_qspi_probe()
778 ctrl->num_chipselect = STM32_QSPI_MAX_NORCHIP; in stm32_qspi_probe()
779 ctrl->dev.of_node = dev->of_node; in stm32_qspi_probe()
797 pm_runtime_get_sync(qspi->dev); in stm32_qspi_probe()
798 /* disable qspi */ in stm32_qspi_probe()
799 writel_relaxed(0, qspi->io_base + QSPI_CR); in stm32_qspi_probe()
800 mutex_destroy(&qspi->lock); in stm32_qspi_probe()
801 pm_runtime_put_noidle(qspi->dev); in stm32_qspi_probe()
802 pm_runtime_disable(qspi->dev); in stm32_qspi_probe()
803 pm_runtime_set_suspended(qspi->dev); in stm32_qspi_probe()
804 pm_runtime_dont_use_autosuspend(qspi->dev); in stm32_qspi_probe()
806 stm32_qspi_dma_free(qspi); in stm32_qspi_probe()
808 clk_disable_unprepare(qspi->clk); in stm32_qspi_probe()
810 spi_master_put(qspi->ctrl); in stm32_qspi_probe()
817 struct stm32_qspi *qspi = platform_get_drvdata(pdev); in stm32_qspi_remove() local
819 pm_runtime_get_sync(qspi->dev); in stm32_qspi_remove()
820 /* disable qspi */ in stm32_qspi_remove()
821 writel_relaxed(0, qspi->io_base + QSPI_CR); in stm32_qspi_remove()
822 stm32_qspi_dma_free(qspi); in stm32_qspi_remove()
823 mutex_destroy(&qspi->lock); in stm32_qspi_remove()
824 pm_runtime_put_noidle(qspi->dev); in stm32_qspi_remove()
825 pm_runtime_disable(qspi->dev); in stm32_qspi_remove()
826 pm_runtime_set_suspended(qspi->dev); in stm32_qspi_remove()
827 pm_runtime_dont_use_autosuspend(qspi->dev); in stm32_qspi_remove()
828 clk_disable_unprepare(qspi->clk); in stm32_qspi_remove()
835 struct stm32_qspi *qspi = dev_get_drvdata(dev); in stm32_qspi_runtime_suspend() local
837 clk_disable_unprepare(qspi->clk); in stm32_qspi_runtime_suspend()
844 struct stm32_qspi *qspi = dev_get_drvdata(dev); in stm32_qspi_runtime_resume() local
846 return clk_prepare_enable(qspi->clk); in stm32_qspi_runtime_resume()
858 struct stm32_qspi *qspi = dev_get_drvdata(dev); in stm32_qspi_resume() local
873 writel_relaxed(qspi->cr_reg, qspi->io_base + QSPI_CR); in stm32_qspi_resume()
874 writel_relaxed(qspi->dcr_reg, qspi->io_base + QSPI_DCR); in stm32_qspi_resume()
889 {.compatible = "st,stm32f469-qspi"},
898 .name = "stm32-qspi",