Lines Matching +full:spi +full:- +full:rdy +full:- +full:drctl
1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
9 #include <linux/dma-mapping.h>
20 #include <linux/spi/spi.h>
21 #include <linux/spi/spi_bitbang.h>
27 #include <linux/platform_data/dma-imx.h>
128 return d->devtype_data->devtype == IMX27_CSPI; in is_imx27_cspi()
133 return d->devtype_data->devtype == IMX35_CSPI; in is_imx35_cspi()
138 return d->devtype_data->devtype == IMX51_ECSPI; in is_imx51_ecspi()
143 return d->devtype_data->devtype == IMX53_ECSPI; in is_imx53_ecspi()
149 unsigned int val = readl(spi_imx->base + MXC_CSPIRXDATA); \
151 if (spi_imx->rx_buf) { \
152 *(type *)spi_imx->rx_buf = val; \
153 spi_imx->rx_buf += sizeof(type); \
156 spi_imx->remainder -= sizeof(type); \
164 if (spi_imx->tx_buf) { \
165 val = *(type *)spi_imx->tx_buf; \
166 spi_imx->tx_buf += sizeof(type); \
169 spi_imx->count -= sizeof(type); \
171 writel(val, spi_imx->base + MXC_CSPITXDATA); \
228 static bool spi_imx_can_dma(struct spi_master *master, struct spi_device *spi, in spi_imx_can_dma() argument
233 if (!use_dma || master->fallback) in spi_imx_can_dma()
236 if (!master->dma_rx) in spi_imx_can_dma()
239 if (spi_imx->slave_mode) in spi_imx_can_dma()
242 if (transfer->len < spi_imx->devtype_data->fifo_size) in spi_imx_can_dma()
245 spi_imx->dynamic_burst = 0; in spi_imx_can_dma()
255 #define MX51_ECSPI_CTRL_DRCTL(drctl) ((drctl) << 16) argument
291 unsigned int val = readl(spi_imx->base + MXC_CSPIRXDATA); in spi_imx_buf_rx_swap_u32()
296 if (spi_imx->rx_buf) { in spi_imx_buf_rx_swap_u32()
298 bytes_per_word = spi_imx_bytes_per_word(spi_imx->bits_per_word); in spi_imx_buf_rx_swap_u32()
304 *(u32 *)spi_imx->rx_buf = val; in spi_imx_buf_rx_swap_u32()
305 spi_imx->rx_buf += sizeof(u32); in spi_imx_buf_rx_swap_u32()
308 spi_imx->remainder -= sizeof(u32); in spi_imx_buf_rx_swap_u32()
316 unaligned = spi_imx->remainder % 4; in spi_imx_buf_rx_swap()
323 if (spi_imx_bytes_per_word(spi_imx->bits_per_word) == 2) { in spi_imx_buf_rx_swap()
328 val = readl(spi_imx->base + MXC_CSPIRXDATA); in spi_imx_buf_rx_swap()
330 while (unaligned--) { in spi_imx_buf_rx_swap()
331 if (spi_imx->rx_buf) { in spi_imx_buf_rx_swap()
332 *(u8 *)spi_imx->rx_buf = (val >> (8 * unaligned)) & 0xff; in spi_imx_buf_rx_swap()
333 spi_imx->rx_buf++; in spi_imx_buf_rx_swap()
335 spi_imx->remainder--; in spi_imx_buf_rx_swap()
346 if (spi_imx->tx_buf) { in spi_imx_buf_tx_swap_u32()
347 val = *(u32 *)spi_imx->tx_buf; in spi_imx_buf_tx_swap_u32()
348 spi_imx->tx_buf += sizeof(u32); in spi_imx_buf_tx_swap_u32()
351 spi_imx->count -= sizeof(u32); in spi_imx_buf_tx_swap_u32()
353 bytes_per_word = spi_imx_bytes_per_word(spi_imx->bits_per_word); in spi_imx_buf_tx_swap_u32()
360 writel(val, spi_imx->base + MXC_CSPITXDATA); in spi_imx_buf_tx_swap_u32()
368 unaligned = spi_imx->count % 4; in spi_imx_buf_tx_swap()
375 if (spi_imx_bytes_per_word(spi_imx->bits_per_word) == 2) { in spi_imx_buf_tx_swap()
380 while (unaligned--) { in spi_imx_buf_tx_swap()
381 if (spi_imx->tx_buf) { in spi_imx_buf_tx_swap()
382 val |= *(u8 *)spi_imx->tx_buf << (8 * unaligned); in spi_imx_buf_tx_swap()
383 spi_imx->tx_buf++; in spi_imx_buf_tx_swap()
385 spi_imx->count--; in spi_imx_buf_tx_swap()
388 writel(val, spi_imx->base + MXC_CSPITXDATA); in spi_imx_buf_tx_swap()
393 u32 val = be32_to_cpu(readl(spi_imx->base + MXC_CSPIRXDATA)); in mx53_ecspi_rx_slave()
395 if (spi_imx->rx_buf) { in mx53_ecspi_rx_slave()
396 int n_bytes = spi_imx->slave_burst % sizeof(val); in mx53_ecspi_rx_slave()
401 memcpy(spi_imx->rx_buf, in mx53_ecspi_rx_slave()
402 ((u8 *)&val) + sizeof(val) - n_bytes, n_bytes); in mx53_ecspi_rx_slave()
404 spi_imx->rx_buf += n_bytes; in mx53_ecspi_rx_slave()
405 spi_imx->slave_burst -= n_bytes; in mx53_ecspi_rx_slave()
408 spi_imx->remainder -= sizeof(u32); in mx53_ecspi_rx_slave()
414 int n_bytes = spi_imx->count % sizeof(val); in mx53_ecspi_tx_slave()
419 if (spi_imx->tx_buf) { in mx53_ecspi_tx_slave()
420 memcpy(((u8 *)&val) + sizeof(val) - n_bytes, in mx53_ecspi_tx_slave()
421 spi_imx->tx_buf, n_bytes); in mx53_ecspi_tx_slave()
423 spi_imx->tx_buf += n_bytes; in mx53_ecspi_tx_slave()
426 spi_imx->count -= n_bytes; in mx53_ecspi_tx_slave()
428 writel(val, spi_imx->base + MXC_CSPITXDATA); in mx53_ecspi_tx_slave()
436 * there are two 4-bit dividers, the pre-divider divides by in mx51_ecspi_clkdiv()
437 * $pre, the post-divider by 2^$post in mx51_ecspi_clkdiv()
440 unsigned int fin = spi_imx->spi_clk; in mx51_ecspi_clkdiv()
445 post = fls(fin) - fls(fspi); in mx51_ecspi_clkdiv()
451 post = max(4U, post) - 4; in mx51_ecspi_clkdiv()
453 dev_err(spi_imx->dev, "cannot set clock freq: %u (base freq: %u)\n", in mx51_ecspi_clkdiv()
458 pre = DIV_ROUND_UP(fin, fspi << post) - 1; in mx51_ecspi_clkdiv()
460 dev_dbg(spi_imx->dev, "%s: fin: %u, fspi: %u, post: %u, pre: %u\n", in mx51_ecspi_clkdiv()
483 writel(val, spi_imx->base + MX51_ECSPI_INT); in mx51_ecspi_intctrl()
490 reg = readl(spi_imx->base + MX51_ECSPI_CTRL); in mx51_ecspi_trigger()
492 writel(reg, spi_imx->base + MX51_ECSPI_CTRL); in mx51_ecspi_trigger()
497 writel(0, spi_imx->base + MX51_ECSPI_DMA); in mx51_disable_dma()
504 ctrl = readl(spi_imx->base + MX51_ECSPI_CTRL); in mx51_ecspi_disable()
506 writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL); in mx51_ecspi_disable()
512 struct spi_device *spi = msg->spi; in mx51_ecspi_prepare_message() local
517 u32 cfg = readl(spi_imx->base + MX51_ECSPI_CONFIG); in mx51_ecspi_prepare_message()
520 if (spi_imx->slave_mode) in mx51_ecspi_prepare_message()
528 if (spi->mode & SPI_READY) in mx51_ecspi_prepare_message()
529 ctrl |= MX51_ECSPI_CTRL_DRCTL(spi_imx->spi_drctl); in mx51_ecspi_prepare_message()
532 ctrl |= MX51_ECSPI_CTRL_CS(spi->chip_select); in mx51_ecspi_prepare_message()
538 writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL); in mx51_ecspi_prepare_message()
540 testreg = readl(spi_imx->base + MX51_ECSPI_TESTREG); in mx51_ecspi_prepare_message()
541 if (spi->mode & SPI_LOOP) in mx51_ecspi_prepare_message()
545 writel(testreg, spi_imx->base + MX51_ECSPI_TESTREG); in mx51_ecspi_prepare_message()
549 * is not functional for imx53 Soc, config SPI burst completed when in mx51_ecspi_prepare_message()
552 if (spi_imx->slave_mode && is_imx53_ecspi(spi_imx)) in mx51_ecspi_prepare_message()
553 cfg &= ~MX51_ECSPI_CONFIG_SBBCTRL(spi->chip_select); in mx51_ecspi_prepare_message()
555 cfg |= MX51_ECSPI_CONFIG_SBBCTRL(spi->chip_select); in mx51_ecspi_prepare_message()
557 if (spi->mode & SPI_CPHA) in mx51_ecspi_prepare_message()
558 cfg |= MX51_ECSPI_CONFIG_SCLKPHA(spi->chip_select); in mx51_ecspi_prepare_message()
560 cfg &= ~MX51_ECSPI_CONFIG_SCLKPHA(spi->chip_select); in mx51_ecspi_prepare_message()
562 if (spi->mode & SPI_CPOL) { in mx51_ecspi_prepare_message()
563 cfg |= MX51_ECSPI_CONFIG_SCLKPOL(spi->chip_select); in mx51_ecspi_prepare_message()
564 cfg |= MX51_ECSPI_CONFIG_SCLKCTL(spi->chip_select); in mx51_ecspi_prepare_message()
566 cfg &= ~MX51_ECSPI_CONFIG_SCLKPOL(spi->chip_select); in mx51_ecspi_prepare_message()
567 cfg &= ~MX51_ECSPI_CONFIG_SCLKCTL(spi->chip_select); in mx51_ecspi_prepare_message()
570 if (spi->mode & SPI_CS_HIGH) in mx51_ecspi_prepare_message()
571 cfg |= MX51_ECSPI_CONFIG_SSBPOL(spi->chip_select); in mx51_ecspi_prepare_message()
573 cfg &= ~MX51_ECSPI_CONFIG_SSBPOL(spi->chip_select); in mx51_ecspi_prepare_message()
575 writel(cfg, spi_imx->base + MX51_ECSPI_CONFIG); in mx51_ecspi_prepare_message()
585 * the SPI communication as the device on the other end would consider in mx51_ecspi_prepare_message()
588 * Because spi_imx->spi_bus_clk is only set in bitbang prepare_message in mx51_ecspi_prepare_message()
594 list_for_each_entry(xfer, &msg->transfers, transfer_list) { in mx51_ecspi_prepare_message()
595 if (!xfer->speed_hz) in mx51_ecspi_prepare_message()
597 min_speed_hz = min(xfer->speed_hz, min_speed_hz); in mx51_ecspi_prepare_message()
610 struct spi_device *spi) in mx51_ecspi_prepare_transfer() argument
612 u32 ctrl = readl(spi_imx->base + MX51_ECSPI_CTRL); in mx51_ecspi_prepare_transfer()
617 if (spi_imx->slave_mode && is_imx53_ecspi(spi_imx)) in mx51_ecspi_prepare_transfer()
618 ctrl |= (spi_imx->slave_burst * 8 - 1) in mx51_ecspi_prepare_transfer()
621 ctrl |= (spi_imx->bits_per_word - 1) in mx51_ecspi_prepare_transfer()
627 ctrl |= mx51_ecspi_clkdiv(spi_imx, spi_imx->spi_bus_clk, &clk); in mx51_ecspi_prepare_transfer()
628 spi_imx->spi_bus_clk = clk; in mx51_ecspi_prepare_transfer()
634 if (spi_imx->usedma && spi_imx->devtype_data->tx_glitch_fixed) in mx51_ecspi_prepare_transfer()
639 writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL); in mx51_ecspi_prepare_transfer()
648 if (spi_imx->devtype_data->tx_glitch_fixed) in mx51_setup_wml()
649 tx_wml = spi_imx->wml; in mx51_setup_wml()
654 writel(MX51_ECSPI_DMA_RX_WML(spi_imx->wml - 1) | in mx51_setup_wml()
656 MX51_ECSPI_DMA_RXT_WML(spi_imx->wml) | in mx51_setup_wml()
658 MX51_ECSPI_DMA_RXTDEN, spi_imx->base + MX51_ECSPI_DMA); in mx51_setup_wml()
663 return readl(spi_imx->base + MX51_ECSPI_STAT) & MX51_ECSPI_STAT_RR; in mx51_ecspi_rx_available()
670 readl(spi_imx->base + MXC_CSPIRXDATA); in mx51_ecspi_reset()
713 writel(val, spi_imx->base + MXC_CSPIINT); in mx31_intctrl()
720 reg = readl(spi_imx->base + MXC_CSPICTRL); in mx31_trigger()
722 writel(reg, spi_imx->base + MXC_CSPICTRL); in mx31_trigger()
732 struct spi_device *spi) in mx31_prepare_transfer() argument
737 reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, spi_imx->spi_bus_clk, &clk) << in mx31_prepare_transfer()
739 spi_imx->spi_bus_clk = clk; in mx31_prepare_transfer()
742 reg |= (spi_imx->bits_per_word - 1) << MX35_CSPICTRL_BL_SHIFT; in mx31_prepare_transfer()
745 reg |= (spi_imx->bits_per_word - 1) << MX31_CSPICTRL_BC_SHIFT; in mx31_prepare_transfer()
748 if (spi->mode & SPI_CPHA) in mx31_prepare_transfer()
750 if (spi->mode & SPI_CPOL) in mx31_prepare_transfer()
752 if (spi->mode & SPI_CS_HIGH) in mx31_prepare_transfer()
754 if (!spi->cs_gpiod) in mx31_prepare_transfer()
755 reg |= (spi->chip_select) << in mx31_prepare_transfer()
759 if (spi_imx->usedma) in mx31_prepare_transfer()
762 writel(reg, spi_imx->base + MXC_CSPICTRL); in mx31_prepare_transfer()
764 reg = readl(spi_imx->base + MX31_CSPI_TESTREG); in mx31_prepare_transfer()
765 if (spi->mode & SPI_LOOP) in mx31_prepare_transfer()
769 writel(reg, spi_imx->base + MX31_CSPI_TESTREG); in mx31_prepare_transfer()
771 if (spi_imx->usedma) { in mx31_prepare_transfer()
777 spi_imx->base + MX31_CSPI_DMAREG); in mx31_prepare_transfer()
785 return readl(spi_imx->base + MX31_CSPISTATUS) & MX31_STATUS_RR; in mx31_rx_available()
791 while (readl(spi_imx->base + MX31_CSPISTATUS) & MX31_STATUS_RR) in mx31_reset()
792 readl(spi_imx->base + MXC_CSPIRXDATA); in mx31_reset()
817 writel(val, spi_imx->base + MXC_CSPIINT); in mx21_intctrl()
824 reg = readl(spi_imx->base + MXC_CSPICTRL); in mx21_trigger()
826 writel(reg, spi_imx->base + MXC_CSPICTRL); in mx21_trigger()
836 struct spi_device *spi) in mx21_prepare_transfer() argument
842 reg |= spi_imx_clkdiv_1(spi_imx->spi_clk, spi_imx->spi_bus_clk, max, &clk) in mx21_prepare_transfer()
844 spi_imx->spi_bus_clk = clk; in mx21_prepare_transfer()
846 reg |= spi_imx->bits_per_word - 1; in mx21_prepare_transfer()
848 if (spi->mode & SPI_CPHA) in mx21_prepare_transfer()
850 if (spi->mode & SPI_CPOL) in mx21_prepare_transfer()
852 if (spi->mode & SPI_CS_HIGH) in mx21_prepare_transfer()
854 if (!spi->cs_gpiod) in mx21_prepare_transfer()
855 reg |= spi->chip_select << MX21_CSPICTRL_CS_SHIFT; in mx21_prepare_transfer()
857 writel(reg, spi_imx->base + MXC_CSPICTRL); in mx21_prepare_transfer()
864 return readl(spi_imx->base + MXC_CSPIINT) & MX21_INTREG_RR; in mx21_rx_available()
869 writel(1, spi_imx->base + MXC_RESET); in mx21_reset()
892 writel(val, spi_imx->base + MXC_CSPIINT); in mx1_intctrl()
899 reg = readl(spi_imx->base + MXC_CSPICTRL); in mx1_trigger()
901 writel(reg, spi_imx->base + MXC_CSPICTRL); in mx1_trigger()
911 struct spi_device *spi) in mx1_prepare_transfer() argument
916 reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, spi_imx->spi_bus_clk, &clk) << in mx1_prepare_transfer()
918 spi_imx->spi_bus_clk = clk; in mx1_prepare_transfer()
920 reg |= spi_imx->bits_per_word - 1; in mx1_prepare_transfer()
922 if (spi->mode & SPI_CPHA) in mx1_prepare_transfer()
924 if (spi->mode & SPI_CPOL) in mx1_prepare_transfer()
927 writel(reg, spi_imx->base + MXC_CSPICTRL); in mx1_prepare_transfer()
934 return readl(spi_imx->base + MXC_CSPIINT) & MX1_INTREG_RR; in mx1_rx_available()
939 writel(1, spi_imx->base + MXC_RESET); in mx1_reset()
1064 { .compatible = "fsl,imx1-cspi", .data = &imx1_cspi_devtype_data, },
1065 { .compatible = "fsl,imx21-cspi", .data = &imx21_cspi_devtype_data, },
1066 { .compatible = "fsl,imx27-cspi", .data = &imx27_cspi_devtype_data, },
1067 { .compatible = "fsl,imx31-cspi", .data = &imx31_cspi_devtype_data, },
1068 { .compatible = "fsl,imx35-cspi", .data = &imx35_cspi_devtype_data, },
1069 { .compatible = "fsl,imx51-ecspi", .data = &imx51_ecspi_devtype_data, },
1070 { .compatible = "fsl,imx53-ecspi", .data = &imx53_ecspi_devtype_data, },
1071 { .compatible = "fsl,imx6ul-ecspi", .data = &imx6ul_ecspi_devtype_data, },
1080 ctrl = readl(spi_imx->base + MX51_ECSPI_CTRL); in spi_imx_set_burst_len()
1082 ctrl |= ((n_bits - 1) << MX51_ECSPI_CTRL_BL_OFFSET); in spi_imx_set_burst_len()
1083 writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL); in spi_imx_set_burst_len()
1095 if (!spi_imx->remainder) { in spi_imx_push()
1096 if (spi_imx->dynamic_burst) { in spi_imx_push()
1099 burst_len = spi_imx->count % MX51_ECSPI_CTRL_MAX_BURST; in spi_imx_push()
1106 spi_imx->remainder = burst_len; in spi_imx_push()
1108 spi_imx->remainder = spi_imx_bytes_per_word(spi_imx->bits_per_word); in spi_imx_push()
1112 while (spi_imx->txfifo < spi_imx->devtype_data->fifo_size) { in spi_imx_push()
1113 if (!spi_imx->count) in spi_imx_push()
1115 if (spi_imx->dynamic_burst && in spi_imx_push()
1116 spi_imx->txfifo >= DIV_ROUND_UP(spi_imx->remainder, 4)) in spi_imx_push()
1118 spi_imx->tx(spi_imx); in spi_imx_push()
1119 spi_imx->txfifo++; in spi_imx_push()
1122 if (!spi_imx->slave_mode) in spi_imx_push()
1123 spi_imx->devtype_data->trigger(spi_imx); in spi_imx_push()
1130 while (spi_imx->txfifo && in spi_imx_isr()
1131 spi_imx->devtype_data->rx_available(spi_imx)) { in spi_imx_isr()
1132 spi_imx->rx(spi_imx); in spi_imx_isr()
1133 spi_imx->txfifo--; in spi_imx_isr()
1136 if (spi_imx->count) { in spi_imx_isr()
1141 if (spi_imx->txfifo) { in spi_imx_isr()
1145 spi_imx->devtype_data->intctrl( in spi_imx_isr()
1150 spi_imx->devtype_data->intctrl(spi_imx, 0); in spi_imx_isr()
1151 complete(&spi_imx->xfer_done); in spi_imx_isr()
1163 switch (spi_imx_bytes_per_word(spi_imx->bits_per_word)) { in spi_imx_dma_configure()
1174 return -EINVAL; in spi_imx_dma_configure()
1178 tx.dst_addr = spi_imx->base_phys + MXC_CSPITXDATA; in spi_imx_dma_configure()
1180 tx.dst_maxburst = spi_imx->wml; in spi_imx_dma_configure()
1181 ret = dmaengine_slave_config(master->dma_tx, &tx); in spi_imx_dma_configure()
1183 dev_err(spi_imx->dev, "TX dma configuration failed with %d\n", ret); in spi_imx_dma_configure()
1188 rx.src_addr = spi_imx->base_phys + MXC_CSPIRXDATA; in spi_imx_dma_configure()
1190 rx.src_maxburst = spi_imx->wml; in spi_imx_dma_configure()
1191 ret = dmaengine_slave_config(master->dma_rx, &rx); in spi_imx_dma_configure()
1193 dev_err(spi_imx->dev, "RX dma configuration failed with %d\n", ret); in spi_imx_dma_configure()
1200 static int spi_imx_setupxfer(struct spi_device *spi, in spi_imx_setupxfer() argument
1203 struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master); in spi_imx_setupxfer()
1208 if (!t->speed_hz) { in spi_imx_setupxfer()
1209 if (!spi->max_speed_hz) { in spi_imx_setupxfer()
1210 dev_err(&spi->dev, "no speed_hz provided!\n"); in spi_imx_setupxfer()
1211 return -EINVAL; in spi_imx_setupxfer()
1213 dev_dbg(&spi->dev, "using spi->max_speed_hz!\n"); in spi_imx_setupxfer()
1214 spi_imx->spi_bus_clk = spi->max_speed_hz; in spi_imx_setupxfer()
1216 spi_imx->spi_bus_clk = t->speed_hz; in spi_imx_setupxfer()
1218 spi_imx->bits_per_word = t->bits_per_word; in spi_imx_setupxfer()
1221 * Initialize the functions for transfer. To transfer non byte-aligned in spi_imx_setupxfer()
1222 * words, we have to use multiple word-size bursts, we can't use in spi_imx_setupxfer()
1225 if (spi_imx->devtype_data->dynamic_burst && !spi_imx->slave_mode && in spi_imx_setupxfer()
1226 !(spi->mode & SPI_CS_WORD) && in spi_imx_setupxfer()
1227 (spi_imx->bits_per_word == 8 || in spi_imx_setupxfer()
1228 spi_imx->bits_per_word == 16 || in spi_imx_setupxfer()
1229 spi_imx->bits_per_word == 32)) { in spi_imx_setupxfer()
1231 spi_imx->rx = spi_imx_buf_rx_swap; in spi_imx_setupxfer()
1232 spi_imx->tx = spi_imx_buf_tx_swap; in spi_imx_setupxfer()
1233 spi_imx->dynamic_burst = 1; in spi_imx_setupxfer()
1236 if (spi_imx->bits_per_word <= 8) { in spi_imx_setupxfer()
1237 spi_imx->rx = spi_imx_buf_rx_u8; in spi_imx_setupxfer()
1238 spi_imx->tx = spi_imx_buf_tx_u8; in spi_imx_setupxfer()
1239 } else if (spi_imx->bits_per_word <= 16) { in spi_imx_setupxfer()
1240 spi_imx->rx = spi_imx_buf_rx_u16; in spi_imx_setupxfer()
1241 spi_imx->tx = spi_imx_buf_tx_u16; in spi_imx_setupxfer()
1243 spi_imx->rx = spi_imx_buf_rx_u32; in spi_imx_setupxfer()
1244 spi_imx->tx = spi_imx_buf_tx_u32; in spi_imx_setupxfer()
1246 spi_imx->dynamic_burst = 0; in spi_imx_setupxfer()
1249 if (spi_imx_can_dma(spi_imx->bitbang.master, spi, t)) in spi_imx_setupxfer()
1250 spi_imx->usedma = true; in spi_imx_setupxfer()
1252 spi_imx->usedma = false; in spi_imx_setupxfer()
1254 if (is_imx53_ecspi(spi_imx) && spi_imx->slave_mode) { in spi_imx_setupxfer()
1255 spi_imx->rx = mx53_ecspi_rx_slave; in spi_imx_setupxfer()
1256 spi_imx->tx = mx53_ecspi_tx_slave; in spi_imx_setupxfer()
1257 spi_imx->slave_burst = t->len; in spi_imx_setupxfer()
1260 spi_imx->devtype_data->prepare_transfer(spi_imx, spi); in spi_imx_setupxfer()
1267 struct spi_master *master = spi_imx->bitbang.master; in spi_imx_sdma_exit()
1269 if (master->dma_rx) { in spi_imx_sdma_exit()
1270 dma_release_channel(master->dma_rx); in spi_imx_sdma_exit()
1271 master->dma_rx = NULL; in spi_imx_sdma_exit()
1274 if (master->dma_tx) { in spi_imx_sdma_exit()
1275 dma_release_channel(master->dma_tx); in spi_imx_sdma_exit()
1276 master->dma_tx = NULL; in spi_imx_sdma_exit()
1285 spi_imx->wml = spi_imx->devtype_data->fifo_size / 2; in spi_imx_sdma_init()
1288 master->dma_tx = dma_request_chan(dev, "tx"); in spi_imx_sdma_init()
1289 if (IS_ERR(master->dma_tx)) { in spi_imx_sdma_init()
1290 ret = PTR_ERR(master->dma_tx); in spi_imx_sdma_init()
1292 master->dma_tx = NULL; in spi_imx_sdma_init()
1297 master->dma_rx = dma_request_chan(dev, "rx"); in spi_imx_sdma_init()
1298 if (IS_ERR(master->dma_rx)) { in spi_imx_sdma_init()
1299 ret = PTR_ERR(master->dma_rx); in spi_imx_sdma_init()
1301 master->dma_rx = NULL; in spi_imx_sdma_init()
1305 init_completion(&spi_imx->dma_rx_completion); in spi_imx_sdma_init()
1306 init_completion(&spi_imx->dma_tx_completion); in spi_imx_sdma_init()
1307 master->can_dma = spi_imx_can_dma; in spi_imx_sdma_init()
1308 master->max_dma_len = MAX_SDMA_BD_BYTES; in spi_imx_sdma_init()
1309 spi_imx->bitbang.master->flags = SPI_MASTER_MUST_RX | in spi_imx_sdma_init()
1322 complete(&spi_imx->dma_rx_completion); in spi_imx_dma_rx_callback()
1329 complete(&spi_imx->dma_tx_completion); in spi_imx_dma_tx_callback()
1337 timeout = (8 + 4) * size / spi_imx->spi_bus_clk; in spi_imx_calculate_timeout()
1352 struct spi_master *master = spi_imx->bitbang.master; in spi_imx_dma_transfer()
1353 struct sg_table *tx = &transfer->tx_sg, *rx = &transfer->rx_sg; in spi_imx_dma_transfer()
1354 struct scatterlist *last_sg = sg_last(rx->sgl, rx->nents); in spi_imx_dma_transfer()
1359 bytes_per_word = spi_imx_bytes_per_word(transfer->bits_per_word); in spi_imx_dma_transfer()
1360 for (i = spi_imx->devtype_data->fifo_size / 2; i > 0; i--) { in spi_imx_dma_transfer()
1368 spi_imx->wml = i; in spi_imx_dma_transfer()
1374 if (!spi_imx->devtype_data->setup_wml) { in spi_imx_dma_transfer()
1375 dev_err(spi_imx->dev, "No setup_wml()?\n"); in spi_imx_dma_transfer()
1376 ret = -EINVAL; in spi_imx_dma_transfer()
1379 spi_imx->devtype_data->setup_wml(spi_imx); in spi_imx_dma_transfer()
1385 desc_rx = dmaengine_prep_slave_sg(master->dma_rx, in spi_imx_dma_transfer()
1386 rx->sgl, rx->nents, DMA_DEV_TO_MEM, in spi_imx_dma_transfer()
1389 ret = -EINVAL; in spi_imx_dma_transfer()
1393 desc_rx->callback = spi_imx_dma_rx_callback; in spi_imx_dma_transfer()
1394 desc_rx->callback_param = (void *)spi_imx; in spi_imx_dma_transfer()
1396 reinit_completion(&spi_imx->dma_rx_completion); in spi_imx_dma_transfer()
1397 dma_async_issue_pending(master->dma_rx); in spi_imx_dma_transfer()
1399 desc_tx = dmaengine_prep_slave_sg(master->dma_tx, in spi_imx_dma_transfer()
1400 tx->sgl, tx->nents, DMA_MEM_TO_DEV, in spi_imx_dma_transfer()
1403 dmaengine_terminate_all(master->dma_tx); in spi_imx_dma_transfer()
1404 dmaengine_terminate_all(master->dma_rx); in spi_imx_dma_transfer()
1405 return -EINVAL; in spi_imx_dma_transfer()
1408 desc_tx->callback = spi_imx_dma_tx_callback; in spi_imx_dma_transfer()
1409 desc_tx->callback_param = (void *)spi_imx; in spi_imx_dma_transfer()
1411 reinit_completion(&spi_imx->dma_tx_completion); in spi_imx_dma_transfer()
1412 dma_async_issue_pending(master->dma_tx); in spi_imx_dma_transfer()
1414 transfer_timeout = spi_imx_calculate_timeout(spi_imx, transfer->len); in spi_imx_dma_transfer()
1417 timeout = wait_for_completion_timeout(&spi_imx->dma_tx_completion, in spi_imx_dma_transfer()
1420 dev_err(spi_imx->dev, "I/O Error in DMA TX\n"); in spi_imx_dma_transfer()
1421 dmaengine_terminate_all(master->dma_tx); in spi_imx_dma_transfer()
1422 dmaengine_terminate_all(master->dma_rx); in spi_imx_dma_transfer()
1423 return -ETIMEDOUT; in spi_imx_dma_transfer()
1426 timeout = wait_for_completion_timeout(&spi_imx->dma_rx_completion, in spi_imx_dma_transfer()
1429 dev_err(&master->dev, "I/O Error in DMA RX\n"); in spi_imx_dma_transfer()
1430 spi_imx->devtype_data->reset(spi_imx); in spi_imx_dma_transfer()
1431 dmaengine_terminate_all(master->dma_rx); in spi_imx_dma_transfer()
1432 return -ETIMEDOUT; in spi_imx_dma_transfer()
1435 return transfer->len; in spi_imx_dma_transfer()
1438 transfer->error |= SPI_TRANS_FAIL_NO_START; in spi_imx_dma_transfer()
1442 static int spi_imx_pio_transfer(struct spi_device *spi, in spi_imx_pio_transfer() argument
1445 struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master); in spi_imx_pio_transfer()
1449 spi_imx->tx_buf = transfer->tx_buf; in spi_imx_pio_transfer()
1450 spi_imx->rx_buf = transfer->rx_buf; in spi_imx_pio_transfer()
1451 spi_imx->count = transfer->len; in spi_imx_pio_transfer()
1452 spi_imx->txfifo = 0; in spi_imx_pio_transfer()
1453 spi_imx->remainder = 0; in spi_imx_pio_transfer()
1455 reinit_completion(&spi_imx->xfer_done); in spi_imx_pio_transfer()
1459 spi_imx->devtype_data->intctrl(spi_imx, MXC_INT_TE); in spi_imx_pio_transfer()
1461 transfer_timeout = spi_imx_calculate_timeout(spi_imx, transfer->len); in spi_imx_pio_transfer()
1463 timeout = wait_for_completion_timeout(&spi_imx->xfer_done, in spi_imx_pio_transfer()
1466 dev_err(&spi->dev, "I/O Error in PIO\n"); in spi_imx_pio_transfer()
1467 spi_imx->devtype_data->reset(spi_imx); in spi_imx_pio_transfer()
1468 return -ETIMEDOUT; in spi_imx_pio_transfer()
1471 return transfer->len; in spi_imx_pio_transfer()
1474 static int spi_imx_pio_transfer_slave(struct spi_device *spi, in spi_imx_pio_transfer_slave() argument
1477 struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master); in spi_imx_pio_transfer_slave()
1478 int ret = transfer->len; in spi_imx_pio_transfer_slave()
1481 transfer->len > MX53_MAX_TRANSFER_BYTES) { in spi_imx_pio_transfer_slave()
1482 dev_err(&spi->dev, "Transaction too big, max size is %d bytes\n", in spi_imx_pio_transfer_slave()
1484 return -EMSGSIZE; in spi_imx_pio_transfer_slave()
1487 spi_imx->tx_buf = transfer->tx_buf; in spi_imx_pio_transfer_slave()
1488 spi_imx->rx_buf = transfer->rx_buf; in spi_imx_pio_transfer_slave()
1489 spi_imx->count = transfer->len; in spi_imx_pio_transfer_slave()
1490 spi_imx->txfifo = 0; in spi_imx_pio_transfer_slave()
1491 spi_imx->remainder = 0; in spi_imx_pio_transfer_slave()
1493 reinit_completion(&spi_imx->xfer_done); in spi_imx_pio_transfer_slave()
1494 spi_imx->slave_aborted = false; in spi_imx_pio_transfer_slave()
1498 spi_imx->devtype_data->intctrl(spi_imx, MXC_INT_TE | MXC_INT_RDR); in spi_imx_pio_transfer_slave()
1500 if (wait_for_completion_interruptible(&spi_imx->xfer_done) || in spi_imx_pio_transfer_slave()
1501 spi_imx->slave_aborted) { in spi_imx_pio_transfer_slave()
1502 dev_dbg(&spi->dev, "interrupted\n"); in spi_imx_pio_transfer_slave()
1503 ret = -EINTR; in spi_imx_pio_transfer_slave()
1512 if (spi_imx->devtype_data->disable) in spi_imx_pio_transfer_slave()
1513 spi_imx->devtype_data->disable(spi_imx); in spi_imx_pio_transfer_slave()
1518 static int spi_imx_transfer(struct spi_device *spi, in spi_imx_transfer() argument
1521 struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master); in spi_imx_transfer()
1523 transfer->effective_speed_hz = spi_imx->spi_bus_clk; in spi_imx_transfer()
1526 while (spi_imx->devtype_data->rx_available(spi_imx)) in spi_imx_transfer()
1527 readl(spi_imx->base + MXC_CSPIRXDATA); in spi_imx_transfer()
1529 if (spi_imx->slave_mode) in spi_imx_transfer()
1530 return spi_imx_pio_transfer_slave(spi, transfer); in spi_imx_transfer()
1532 if (spi_imx->usedma) in spi_imx_transfer()
1535 return spi_imx_pio_transfer(spi, transfer); in spi_imx_transfer()
1538 static int spi_imx_setup(struct spi_device *spi) in spi_imx_setup() argument
1540 dev_dbg(&spi->dev, "%s: mode %d, %u bpw, %d hz\n", __func__, in spi_imx_setup()
1541 spi->mode, spi->bits_per_word, spi->max_speed_hz); in spi_imx_setup()
1546 static void spi_imx_cleanup(struct spi_device *spi) in spi_imx_cleanup() argument
1556 ret = pm_runtime_get_sync(spi_imx->dev); in spi_imx_prepare_message()
1558 pm_runtime_put_noidle(spi_imx->dev); in spi_imx_prepare_message()
1559 dev_err(spi_imx->dev, "failed to enable clock\n"); in spi_imx_prepare_message()
1563 ret = spi_imx->devtype_data->prepare_message(spi_imx, msg); in spi_imx_prepare_message()
1565 pm_runtime_mark_last_busy(spi_imx->dev); in spi_imx_prepare_message()
1566 pm_runtime_put_autosuspend(spi_imx->dev); in spi_imx_prepare_message()
1577 pm_runtime_mark_last_busy(spi_imx->dev); in spi_imx_unprepare_message()
1578 pm_runtime_put_autosuspend(spi_imx->dev); in spi_imx_unprepare_message()
1586 spi_imx->slave_aborted = true; in spi_imx_slave_abort()
1587 complete(&spi_imx->xfer_done); in spi_imx_slave_abort()
1594 struct device_node *np = pdev->dev.of_node; in spi_imx_probe()
1600 of_device_get_match_data(&pdev->dev); in spi_imx_probe()
1604 slave_mode = devtype_data->has_slavemode && in spi_imx_probe()
1605 of_property_read_bool(np, "spi-slave"); in spi_imx_probe()
1607 master = spi_alloc_slave(&pdev->dev, in spi_imx_probe()
1610 master = spi_alloc_master(&pdev->dev, in spi_imx_probe()
1613 return -ENOMEM; in spi_imx_probe()
1615 ret = of_property_read_u32(np, "fsl,spi-rdy-drctl", &spi_drctl); in spi_imx_probe()
1623 master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); in spi_imx_probe()
1624 master->bus_num = np ? -1 : pdev->id; in spi_imx_probe()
1625 master->use_gpio_descriptors = true; in spi_imx_probe()
1628 spi_imx->bitbang.master = master; in spi_imx_probe()
1629 spi_imx->dev = &pdev->dev; in spi_imx_probe()
1630 spi_imx->slave_mode = slave_mode; in spi_imx_probe()
1632 spi_imx->devtype_data = devtype_data; in spi_imx_probe()
1640 if (!device_property_read_u32(&pdev->dev, "num-cs", &val)) in spi_imx_probe()
1641 master->num_chipselect = val; in spi_imx_probe()
1643 master->num_chipselect = 3; in spi_imx_probe()
1645 spi_imx->bitbang.setup_transfer = spi_imx_setupxfer; in spi_imx_probe()
1646 spi_imx->bitbang.txrx_bufs = spi_imx_transfer; in spi_imx_probe()
1647 spi_imx->bitbang.master->setup = spi_imx_setup; in spi_imx_probe()
1648 spi_imx->bitbang.master->cleanup = spi_imx_cleanup; in spi_imx_probe()
1649 spi_imx->bitbang.master->prepare_message = spi_imx_prepare_message; in spi_imx_probe()
1650 spi_imx->bitbang.master->unprepare_message = spi_imx_unprepare_message; in spi_imx_probe()
1651 spi_imx->bitbang.master->slave_abort = spi_imx_slave_abort; in spi_imx_probe()
1652 spi_imx->bitbang.master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH \ in spi_imx_probe()
1656 spi_imx->bitbang.master->mode_bits |= SPI_LOOP | SPI_READY; in spi_imx_probe()
1659 device_property_read_u32(&pdev->dev, "cs-gpios", NULL)) in spi_imx_probe()
1661 * When using HW-CS implementing SPI_CS_WORD can be done by just in spi_imx_probe()
1665 spi_imx->bitbang.master->mode_bits |= SPI_CS_WORD; in spi_imx_probe()
1667 spi_imx->spi_drctl = spi_drctl; in spi_imx_probe()
1669 init_completion(&spi_imx->xfer_done); in spi_imx_probe()
1672 spi_imx->base = devm_ioremap_resource(&pdev->dev, res); in spi_imx_probe()
1673 if (IS_ERR(spi_imx->base)) { in spi_imx_probe()
1674 ret = PTR_ERR(spi_imx->base); in spi_imx_probe()
1677 spi_imx->base_phys = res->start; in spi_imx_probe()
1685 ret = devm_request_irq(&pdev->dev, irq, spi_imx_isr, 0, in spi_imx_probe()
1686 dev_name(&pdev->dev), spi_imx); in spi_imx_probe()
1688 dev_err(&pdev->dev, "can't get irq%d: %d\n", irq, ret); in spi_imx_probe()
1692 spi_imx->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); in spi_imx_probe()
1693 if (IS_ERR(spi_imx->clk_ipg)) { in spi_imx_probe()
1694 ret = PTR_ERR(spi_imx->clk_ipg); in spi_imx_probe()
1698 spi_imx->clk_per = devm_clk_get(&pdev->dev, "per"); in spi_imx_probe()
1699 if (IS_ERR(spi_imx->clk_per)) { in spi_imx_probe()
1700 ret = PTR_ERR(spi_imx->clk_per); in spi_imx_probe()
1704 ret = clk_prepare_enable(spi_imx->clk_per); in spi_imx_probe()
1708 ret = clk_prepare_enable(spi_imx->clk_ipg); in spi_imx_probe()
1712 pm_runtime_set_autosuspend_delay(spi_imx->dev, MXC_RPM_TIMEOUT); in spi_imx_probe()
1713 pm_runtime_use_autosuspend(spi_imx->dev); in spi_imx_probe()
1714 pm_runtime_get_noresume(spi_imx->dev); in spi_imx_probe()
1715 pm_runtime_set_active(spi_imx->dev); in spi_imx_probe()
1716 pm_runtime_enable(spi_imx->dev); in spi_imx_probe()
1718 spi_imx->spi_clk = clk_get_rate(spi_imx->clk_per); in spi_imx_probe()
1723 if (spi_imx->devtype_data->has_dmamode) { in spi_imx_probe()
1724 ret = spi_imx_sdma_init(&pdev->dev, spi_imx, master); in spi_imx_probe()
1725 if (ret == -EPROBE_DEFER) in spi_imx_probe()
1729 dev_dbg(&pdev->dev, "dma setup error %d, use pio\n", in spi_imx_probe()
1733 spi_imx->devtype_data->reset(spi_imx); in spi_imx_probe()
1735 spi_imx->devtype_data->intctrl(spi_imx, 0); in spi_imx_probe()
1737 master->dev.of_node = pdev->dev.of_node; in spi_imx_probe()
1738 ret = spi_bitbang_start(&spi_imx->bitbang); in spi_imx_probe()
1740 dev_err_probe(&pdev->dev, ret, "bitbang start failed\n"); in spi_imx_probe()
1744 pm_runtime_mark_last_busy(spi_imx->dev); in spi_imx_probe()
1745 pm_runtime_put_autosuspend(spi_imx->dev); in spi_imx_probe()
1750 if (spi_imx->devtype_data->has_dmamode) in spi_imx_probe()
1753 pm_runtime_dont_use_autosuspend(spi_imx->dev); in spi_imx_probe()
1754 pm_runtime_set_suspended(&pdev->dev); in spi_imx_probe()
1755 pm_runtime_disable(spi_imx->dev); in spi_imx_probe()
1757 clk_disable_unprepare(spi_imx->clk_ipg); in spi_imx_probe()
1759 clk_disable_unprepare(spi_imx->clk_per); in spi_imx_probe()
1772 spi_bitbang_stop(&spi_imx->bitbang); in spi_imx_remove()
1774 ret = pm_runtime_get_sync(spi_imx->dev); in spi_imx_remove()
1776 pm_runtime_put_noidle(spi_imx->dev); in spi_imx_remove()
1777 dev_err(spi_imx->dev, "failed to enable clock\n"); in spi_imx_remove()
1781 writel(0, spi_imx->base + MXC_CSPICTRL); in spi_imx_remove()
1783 pm_runtime_dont_use_autosuspend(spi_imx->dev); in spi_imx_remove()
1784 pm_runtime_put_sync(spi_imx->dev); in spi_imx_remove()
1785 pm_runtime_disable(spi_imx->dev); in spi_imx_remove()
1801 ret = clk_prepare_enable(spi_imx->clk_per); in spi_imx_runtime_resume()
1805 ret = clk_prepare_enable(spi_imx->clk_ipg); in spi_imx_runtime_resume()
1807 clk_disable_unprepare(spi_imx->clk_per); in spi_imx_runtime_resume()
1821 clk_disable_unprepare(spi_imx->clk_per); in spi_imx_runtime_suspend()
1822 clk_disable_unprepare(spi_imx->clk_ipg); in spi_imx_runtime_suspend()
1856 MODULE_DESCRIPTION("i.MX SPI Controller driver");