153 	int (*reg_write)(struct qcom_swrm_ctrl *ctrl, int reg, int val);  member
319 	swrm->reg_write(swrm, SWRM_CMD_FIFO_WR_CMD, val);  in qcom_swrm_cmd_fifo_wr_cmd()
353 	swrm->reg_write(swrm, SWRM_CMD_FIFO_RD_CMD, val);  in qcom_swrm_cmd_fifo_rd_cmd()
369 				swrm->reg_write(swrm, SWRM_CMD_FIFO_CMD,  in qcom_swrm_cmd_fifo_rd_cmd()
371 				swrm->reg_write(swrm, SWRM_CMD_FIFO_RD_CMD, val);  in qcom_swrm_cmd_fifo_rd_cmd()
535 				swrm->reg_write(swrm, SWRM_INTERRUPT_CPU_EN, swrm->intr_mask);  in qcom_swrm_irq_handler()
554 				swrm->reg_write(swrm, SWRM_CMD_FIFO_CMD, 0x1);  in qcom_swrm_irq_handler()
561 				swrm->reg_write(swrm, SWRM_CMD_FIFO_CMD, 0x1);  in qcom_swrm_irq_handler()
568 				swrm->reg_write(swrm,  in qcom_swrm_irq_handler()
577 				swrm->reg_write(swrm,  in qcom_swrm_irq_handler()
597 		swrm->reg_write(swrm, SWRM_INTERRUPT_CLEAR, intr_sts);  in qcom_swrm_irq_handler()
613 	ctrl->reg_write(ctrl, SWRM_MCP_FRAME_CTRL_BANK_ADDR(0), val);  in qcom_swrm_init()
616 	ctrl->reg_write(ctrl, SWRM_ENUMERATOR_CFG_ADDR, 1);  in qcom_swrm_init()
620 	ctrl->reg_write(ctrl, SWRM_INTERRUPT_MASK_ADDR,  in qcom_swrm_init()
626 	ctrl->reg_write(ctrl, SWRM_MCP_CFG_ADDR, val);  in qcom_swrm_init()
628 	ctrl->reg_write(ctrl, SWRM_MCP_BUS_CTRL, SWRM_MCP_BUS_CLK_START);  in qcom_swrm_init()
632 		ctrl->reg_write(ctrl, SWRM_CMD_FIFO_CFG_ADDR,  in qcom_swrm_init()
636 		ctrl->reg_write(ctrl, SWRM_CMD_FIFO_CFG_ADDR,  in qcom_swrm_init()
641 	ctrl->reg_write(ctrl, SWRM_COMP_CFG_ADDR,  in qcom_swrm_init()
647 		ctrl->reg_write(ctrl, SWRM_INTERRUPT_CPU_EN,  in qcom_swrm_init()
703 	return ctrl->reg_write(ctrl, reg, val);  in qcom_swrm_pre_bank_switch()
712 	return ctrl->reg_write(ctrl, SWRM_DP_BLOCK_CTRL_1(p_params->num),  in qcom_swrm_port_params()
733 	ret = ctrl->reg_write(ctrl, reg, value);  in qcom_swrm_transport_params()
740 		ret = ctrl->reg_write(ctrl, reg, value);  in qcom_swrm_transport_params()
748 		ret = ctrl->reg_write(ctrl, reg, value);  in qcom_swrm_transport_params()
757 		ret = ctrl->reg_write(ctrl, reg, value);  in qcom_swrm_transport_params()
761 		ret = ctrl->reg_write(ctrl, reg, value);  in qcom_swrm_transport_params()
769 		ret = ctrl->reg_write(ctrl, reg, pcfg->bp_mode);  in qcom_swrm_transport_params()
791 	return ctrl->reg_write(ctrl, reg, val);  in qcom_swrm_port_enable()
1218 		ctrl->reg_write = qcom_swrm_ahb_reg_write;
1224 		ctrl->reg_write = qcom_swrm_cpu_reg_write;