152 	int (*reg_read)(struct qcom_swrm_ctrl *ctrl, int reg, u32 *val);
153 	int (*reg_write)(struct qcom_swrm_ctrl *ctrl, int reg, int val);
176 static int qcom_swrm_ahb_reg_read(struct qcom_swrm_ctrl *ctrl, int reg,  in qcom_swrm_ahb_reg_read()  argument
179 	struct regmap *wcd_regmap = ctrl->regmap;  in qcom_swrm_ahb_reg_read()
196 static int qcom_swrm_ahb_reg_write(struct qcom_swrm_ctrl *ctrl,  in qcom_swrm_ahb_reg_write()  argument
199 	struct regmap *wcd_regmap = ctrl->regmap;  in qcom_swrm_ahb_reg_write()
216 static int qcom_swrm_cpu_reg_read(struct qcom_swrm_ctrl *ctrl, int reg,  in qcom_swrm_cpu_reg_read()  argument
219 	*val = readl(ctrl->mmio + reg);  in qcom_swrm_cpu_reg_read()
223 static int qcom_swrm_cpu_reg_write(struct qcom_swrm_ctrl *ctrl, int reg,  in qcom_swrm_cpu_reg_write()  argument
226 	writel(val, ctrl->mmio + reg);  in qcom_swrm_cpu_reg_write()
387 static int qcom_swrm_get_alert_slave_dev_num(struct qcom_swrm_ctrl *ctrl)  in qcom_swrm_get_alert_slave_dev_num()  argument
392 	ctrl->reg_read(ctrl, SWRM_MCP_SLV_STATUS, &val);  in qcom_swrm_get_alert_slave_dev_num()
398 			ctrl->status[dev_num] = status;  in qcom_swrm_get_alert_slave_dev_num()
406 static void qcom_swrm_get_device_status(struct qcom_swrm_ctrl *ctrl)  in qcom_swrm_get_device_status()  argument
411 	ctrl->reg_read(ctrl, SWRM_MCP_SLV_STATUS, &val);  in qcom_swrm_get_device_status()
412 	ctrl->slave_status = val;  in qcom_swrm_get_device_status()
419 		ctrl->status[i] = s;  in qcom_swrm_get_device_status()
426 	struct qcom_swrm_ctrl *ctrl = to_qcom_sdw(bus);  in qcom_swrm_set_slave_dev_num()  local
429 	ctrl->reg_read(ctrl, SWRM_MCP_SLV_STATUS, &status);  in qcom_swrm_set_slave_dev_num()
444 	struct qcom_swrm_ctrl *ctrl = to_qcom_sdw(bus);  in qcom_swrm_enumerate()  local
455 		ctrl->reg_read(ctrl, SWRM_ENUMERATOR_SLAVE_DEV_ID_1(i), &val1);  in qcom_swrm_enumerate()
458 		ctrl->reg_read(ctrl, SWRM_ENUMERATOR_SLAVE_DEV_ID_2(i), &val2);  in qcom_swrm_enumerate()
484 	complete(&ctrl->enumeration);  in qcom_swrm_enumerate()
605 static int qcom_swrm_init(struct qcom_swrm_ctrl *ctrl)  in qcom_swrm_init()  argument
610 	val = FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_BMSK, ctrl->rows_index);  in qcom_swrm_init()
611 	val |= FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_BMSK, ctrl->cols_index);  in qcom_swrm_init()
613 	ctrl->reg_write(ctrl, SWRM_MCP_FRAME_CTRL_BANK_ADDR(0), val);  in qcom_swrm_init()
616 	ctrl->reg_write(ctrl, SWRM_ENUMERATOR_CFG_ADDR, 1);  in qcom_swrm_init()
618 	ctrl->intr_mask = SWRM_INTERRUPT_STATUS_RMSK;  in qcom_swrm_init()
620 	ctrl->reg_write(ctrl, SWRM_INTERRUPT_MASK_ADDR,  in qcom_swrm_init()
624 	ctrl->reg_read(ctrl, SWRM_MCP_CFG_ADDR, &val);  in qcom_swrm_init()
626 	ctrl->reg_write(ctrl, SWRM_MCP_CFG_ADDR, val);  in qcom_swrm_init()
628 	ctrl->reg_write(ctrl, SWRM_MCP_BUS_CTRL, SWRM_MCP_BUS_CLK_START);  in qcom_swrm_init()
630 	if (ctrl->version > 0x01050001) {  in qcom_swrm_init()
632 		ctrl->reg_write(ctrl, SWRM_CMD_FIFO_CFG_ADDR,  in qcom_swrm_init()
636 		ctrl->reg_write(ctrl, SWRM_CMD_FIFO_CFG_ADDR,  in qcom_swrm_init()
641 	ctrl->reg_write(ctrl, SWRM_COMP_CFG_ADDR,  in qcom_swrm_init()
646 	if (ctrl->mmio) {  in qcom_swrm_init()
647 		ctrl->reg_write(ctrl, SWRM_INTERRUPT_CPU_EN,  in qcom_swrm_init()
650 	ctrl->slave_status = 0;  in qcom_swrm_init()
651 	ctrl->reg_read(ctrl, SWRM_COMP_PARAMS, &val);  in qcom_swrm_init()
652 	ctrl->rd_fifo_depth = FIELD_GET(SWRM_COMP_PARAMS_RD_FIFO_DEPTH, val);  in qcom_swrm_init()
653 	ctrl->wr_fifo_depth = FIELD_GET(SWRM_COMP_PARAMS_WR_FIFO_DEPTH, val);  in qcom_swrm_init()
661 	struct qcom_swrm_ctrl *ctrl = to_qcom_sdw(bus);  in qcom_swrm_xfer_msg()  local
671 			ret = qcom_swrm_cmd_fifo_rd_cmd(ctrl, msg->dev_num,  in qcom_swrm_xfer_msg()
681 			ret = qcom_swrm_cmd_fifo_wr_cmd(ctrl, msg->buf[i],  in qcom_swrm_xfer_msg()
695 	struct qcom_swrm_ctrl *ctrl = to_qcom_sdw(bus);  in qcom_swrm_pre_bank_switch()  local
698 	ctrl->reg_read(ctrl, reg, &val);  in qcom_swrm_pre_bank_switch()
700 	u32p_replace_bits(&val, ctrl->cols_index, SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_BMSK);  in qcom_swrm_pre_bank_switch()
701 	u32p_replace_bits(&val, ctrl->rows_index, SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_BMSK);  in qcom_swrm_pre_bank_switch()
703 	return ctrl->reg_write(ctrl, reg, val);  in qcom_swrm_pre_bank_switch()
710 	struct qcom_swrm_ctrl *ctrl = to_qcom_sdw(bus);  in qcom_swrm_port_params()  local
712 	return ctrl->reg_write(ctrl, SWRM_DP_BLOCK_CTRL_1(p_params->num),  in qcom_swrm_port_params()
721 	struct qcom_swrm_ctrl *ctrl = to_qcom_sdw(bus);  in qcom_swrm_transport_params()  local
727 	pcfg = &ctrl->pconfig[params->port_num];  in qcom_swrm_transport_params()
733 	ret = ctrl->reg_write(ctrl, reg, value);  in qcom_swrm_transport_params()
740 		ret = ctrl->reg_write(ctrl, reg, value);  in qcom_swrm_transport_params()
748 		ret = ctrl->reg_write(ctrl, reg, value);  in qcom_swrm_transport_params()
757 		ret = ctrl->reg_write(ctrl, reg, value);  in qcom_swrm_transport_params()
761 		ret = ctrl->reg_write(ctrl, reg, value);  in qcom_swrm_transport_params()
769 		ret = ctrl->reg_write(ctrl, reg, pcfg->bp_mode);  in qcom_swrm_transport_params()
781 	struct qcom_swrm_ctrl *ctrl = to_qcom_sdw(bus);  in qcom_swrm_port_enable()  local
784 	ctrl->reg_read(ctrl, reg, &val);  in qcom_swrm_port_enable()
791 	return ctrl->reg_write(ctrl, reg, val);  in qcom_swrm_port_enable()
807 	struct qcom_swrm_ctrl *ctrl = to_qcom_sdw(bus);  in qcom_swrm_compute_params()  local
818 			pcfg = &ctrl->pconfig[p_rt->num];  in qcom_swrm_compute_params()
835 					pcfg = &ctrl->pconfig[m_port];  in qcom_swrm_compute_params()
837 					pcfg = &ctrl->pconfig[i];  in qcom_swrm_compute_params()
868 static void qcom_swrm_stream_free_ports(struct qcom_swrm_ctrl *ctrl,  in qcom_swrm_stream_free_ports()  argument
875 	mutex_lock(&ctrl->port_lock);  in qcom_swrm_stream_free_ports()
879 			port_mask = &ctrl->dout_port_mask;  in qcom_swrm_stream_free_ports()
881 			port_mask = &ctrl->din_port_mask;  in qcom_swrm_stream_free_ports()
887 	mutex_unlock(&ctrl->port_lock);  in qcom_swrm_stream_free_ports()
890 static int qcom_swrm_stream_alloc_ports(struct qcom_swrm_ctrl *ctrl,  in qcom_swrm_stream_alloc_ports()  argument
905 	mutex_lock(&ctrl->port_lock);  in qcom_swrm_stream_alloc_ports()
908 			maxport = ctrl->num_dout_ports;  in qcom_swrm_stream_alloc_ports()
909 			port_mask = &ctrl->dout_port_mask;  in qcom_swrm_stream_alloc_ports()
911 			maxport = ctrl->num_din_ports;  in qcom_swrm_stream_alloc_ports()
912 			port_mask = &ctrl->din_port_mask;  in qcom_swrm_stream_alloc_ports()
926 					dev_err(ctrl->dev, "All ports busy\n");  in qcom_swrm_stream_alloc_ports()
948 	sdw_stream_add_master(&ctrl->bus, &sconfig, pconfig,  in qcom_swrm_stream_alloc_ports()
956 	mutex_unlock(&ctrl->port_lock);  in qcom_swrm_stream_alloc_ports()
965 	struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dai->dev);  in qcom_swrm_hw_params()  local
966 	struct sdw_stream_runtime *sruntime = ctrl->sruntime[dai->id];  in qcom_swrm_hw_params()
969 	ret = qcom_swrm_stream_alloc_ports(ctrl, sruntime, params,  in qcom_swrm_hw_params()
972 		qcom_swrm_stream_free_ports(ctrl, sruntime);  in qcom_swrm_hw_params()
980 	struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dai->dev);  in qcom_swrm_hw_free()  local
981 	struct sdw_stream_runtime *sruntime = ctrl->sruntime[dai->id];  in qcom_swrm_hw_free()
983 	qcom_swrm_stream_free_ports(ctrl, sruntime);  in qcom_swrm_hw_free()
984 	sdw_stream_remove_master(&ctrl->bus, sruntime);  in qcom_swrm_hw_free()
992 	struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dai->dev);  in qcom_swrm_set_sdw_stream()  local
994 	ctrl->sruntime[dai->id] = stream;  in qcom_swrm_set_sdw_stream()
1001 	struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dai->dev);  in qcom_swrm_get_sdw_stream()  local
1003 	return ctrl->sruntime[dai->id];  in qcom_swrm_get_sdw_stream()
1009 	struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dai->dev);  in qcom_swrm_startup()  local
1019 	ctrl->sruntime[dai->id] = sruntime;  in qcom_swrm_startup()
1038 	struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dai->dev);  in qcom_swrm_shutdown()  local
1040 	sdw_release_stream(ctrl->sruntime[dai->id]);  in qcom_swrm_shutdown()
1041 	ctrl->sruntime[dai->id] = NULL;  in qcom_swrm_shutdown()
1057 static int qcom_swrm_register_dais(struct qcom_swrm_ctrl *ctrl)  in qcom_swrm_register_dais()  argument
1059 	int num_dais = ctrl->num_dout_ports + ctrl->num_din_ports;  in qcom_swrm_register_dais()
1062 	struct device *dev = ctrl->dev;  in qcom_swrm_register_dais()
1075 		if (i < ctrl->num_dout_ports)  in qcom_swrm_register_dais()
1089 	return devm_snd_soc_register_component(ctrl->dev,  in qcom_swrm_register_dais()
1094 static int qcom_swrm_get_port_config(struct qcom_swrm_ctrl *ctrl)  in qcom_swrm_get_port_config()  argument
1096 	struct device_node *np = ctrl->dev->of_node;  in qcom_swrm_get_port_config()
1108 	ctrl->reg_read(ctrl, SWRM_COMP_PARAMS, &val);  in qcom_swrm_get_port_config()
1110 	ctrl->num_dout_ports = FIELD_GET(SWRM_COMP_PARAMS_DOUT_PORTS_MASK, val);  in qcom_swrm_get_port_config()
1111 	ctrl->num_din_ports = FIELD_GET(SWRM_COMP_PARAMS_DIN_PORTS_MASK, val);  in qcom_swrm_get_port_config()
1117 	if (val > ctrl->num_din_ports)  in qcom_swrm_get_port_config()
1120 	ctrl->num_din_ports = val;  in qcom_swrm_get_port_config()
1126 	if (val > ctrl->num_dout_ports)  in qcom_swrm_get_port_config()
1129 	ctrl->num_dout_ports = val;  in qcom_swrm_get_port_config()
1131 	nports = ctrl->num_dout_ports + ctrl->num_din_ports;  in qcom_swrm_get_port_config()
1133 	set_bit(0, &ctrl->dout_port_mask);  in qcom_swrm_get_port_config()
1134 	set_bit(0, &ctrl->din_port_mask);  in qcom_swrm_get_port_config()
1156 		ctrl->reg_read(ctrl, SWRM_COMP_HW_VERSION, &version);  in qcom_swrm_get_port_config()
1181 		ctrl->pconfig[i + 1].si = si[i];  in qcom_swrm_get_port_config()
1182 		ctrl->pconfig[i + 1].off1 = off1[i];  in qcom_swrm_get_port_config()
1183 		ctrl->pconfig[i + 1].off2 = off2[i];  in qcom_swrm_get_port_config()
1184 		ctrl->pconfig[i + 1].bp_mode = bp_mode[i];  in qcom_swrm_get_port_config()
1185 		ctrl->pconfig[i + 1].hstart = hstart[i];  in qcom_swrm_get_port_config()
1186 		ctrl->pconfig[i + 1].hstop = hstop[i];  in qcom_swrm_get_port_config()
1187 		ctrl->pconfig[i + 1].word_length = word_length[i];  in qcom_swrm_get_port_config()
1188 		ctrl->pconfig[i + 1].blk_group_count = blk_group_count[i];  in qcom_swrm_get_port_config()
1189 		ctrl->pconfig[i + 1].lane_control = lane_control[i];  in qcom_swrm_get_port_config()
1200 	struct qcom_swrm_ctrl *ctrl;  local
1205 	ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL);
1206 	if (!ctrl)
1210 	ctrl->rows_index = sdw_find_row_index(data->default_rows);
1211 	ctrl->cols_index = sdw_find_col_index(data->default_cols);
1217 		ctrl->reg_read = qcom_swrm_ahb_reg_read;
1218 		ctrl->reg_write = qcom_swrm_ahb_reg_write;
1219 		ctrl->regmap = dev_get_regmap(dev->parent, NULL);
1220 		if (!ctrl->regmap)
1223 		ctrl->reg_read = qcom_swrm_cpu_reg_read;
1224 		ctrl->reg_write = qcom_swrm_cpu_reg_write;
1225 		ctrl->mmio = devm_platform_ioremap_resource(pdev, 0);
1226 		if (IS_ERR(ctrl->mmio))
1227 			return PTR_ERR(ctrl->mmio);
1230 	ctrl->irq = of_irq_get(dev->of_node, 0);
1231 	if (ctrl->irq < 0) {
1232 		ret = ctrl->irq;
1236 	ctrl->hclk = devm_clk_get(dev, "iface");
1237 	if (IS_ERR(ctrl->hclk)) {
1238 		ret = PTR_ERR(ctrl->hclk);
1242 	clk_prepare_enable(ctrl->hclk);
1244 	ctrl->dev = dev;
1245 	dev_set_drvdata(&pdev->dev, ctrl);
1246 	mutex_init(&ctrl->port_lock);
1247 	init_completion(&ctrl->broadcast);
1248 	init_completion(&ctrl->enumeration);
1250 	ctrl->bus.ops = &qcom_swrm_ops;
1251 	ctrl->bus.port_ops = &qcom_swrm_port_ops;
1252 	ctrl->bus.compute_params = &qcom_swrm_compute_params;
1254 	ret = qcom_swrm_get_port_config(ctrl);
1258 	params = &ctrl->bus.params;
1263 	ctrl->reg_read(ctrl, SWRM_MCP_STATUS, &val);
1267 	prop = &ctrl->bus.prop;
1275 	ctrl->reg_read(ctrl, SWRM_COMP_HW_VERSION, &ctrl->version);
1277 	ret = devm_request_threaded_irq(dev, ctrl->irq, NULL,
1281 					"soundwire", ctrl);
1287 	ret = sdw_bus_master_add(&ctrl->bus, dev, dev->fwnode);
1294 	qcom_swrm_init(ctrl);
1295 	wait_for_completion_timeout(&ctrl->enumeration,
1297 	ret = qcom_swrm_register_dais(ctrl);
1302 		 (ctrl->version >> 24) & 0xff, (ctrl->version >> 16) & 0xff,
1303 		 ctrl->version & 0xffff);
1308 	sdw_bus_master_delete(&ctrl->bus);
1310 	clk_disable_unprepare(ctrl->hclk);
1317 	struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(&pdev->dev);  local
1319 	sdw_bus_master_delete(&ctrl->bus);
1320 	clk_disable_unprepare(ctrl->hclk);