Lines Matching +full:resume +full:- +full:offset
1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2 // Copyright(c) 2015-17 Intel Corporation.
32 * flags reused in each byte, with master0 using the ls-byte, etc.
55 static inline int intel_readl(void __iomem *base, int offset) in intel_readl() argument
57 return readl(base + offset); in intel_readl()
60 static inline void intel_writel(void __iomem *base, int offset, int value) in intel_writel() argument
62 writel(value, base + offset); in intel_writel()
65 static inline u16 intel_readw(void __iomem *base, int offset) in intel_readw() argument
67 return readw(base + offset); in intel_readw()
70 static inline void intel_writew(void __iomem *base, int offset, u16 value) in intel_writew() argument
72 writew(value, base + offset); in intel_writew()
75 static int intel_wait_bit(void __iomem *base, int offset, u32 mask, u32 target) in intel_wait_bit() argument
81 reg_read = readl(base + offset); in intel_wait_bit()
85 timeout--; in intel_wait_bit()
89 return -EAGAIN; in intel_wait_bit()
92 static int intel_clear_bit(void __iomem *base, int offset, u32 value, u32 mask) in intel_clear_bit() argument
94 writel(value, base + offset); in intel_clear_bit()
95 return intel_wait_bit(base, offset, mask, 0); in intel_clear_bit()
98 static int intel_set_bit(void __iomem *base, int offset, u32 value, u32 mask) in intel_set_bit() argument
100 writel(value, base + offset); in intel_set_bit()
101 return intel_wait_bit(base, offset, mask, mask); in intel_set_bit()
121 return scnprintf(buf + pos, RD_BUF - pos, "%4x\t%4x\n", reg, value); in intel_sprintf()
126 struct sdw_intel *sdw = s_file->private; in intel_reg_show()
127 void __iomem *s = sdw->link_res->shim; in intel_reg_show()
128 void __iomem *a = sdw->link_res->alh; in intel_reg_show()
136 return -ENOMEM; in intel_reg_show()
141 ret += scnprintf(buf + ret, RD_BUF - ret, "\nShim\n"); in intel_reg_show()
149 ret += scnprintf(buf + ret, RD_BUF - ret, "\nLink%d\n", i); in intel_reg_show()
157 ret += scnprintf(buf + ret, RD_BUF - ret, "\n PCMSyCH registers\n"); in intel_reg_show()
161 * cleanup to remove hard-coded Intel configurations in intel_reg_show()
170 ret += scnprintf(buf + ret, RD_BUF - ret, "\n PDMSCAP, IOCTL, CTMCTL\n"); in intel_reg_show()
177 ret += scnprintf(buf + ret, RD_BUF - ret, "\nWake registers\n"); in intel_reg_show()
181 ret += scnprintf(buf + ret, RD_BUF - ret, "\nALH STRMzCFG\n"); in intel_reg_show()
195 struct sdw_bus *bus = &sdw->cdns.bus; in intel_set_m_datamode()
198 return -EINVAL; in intel_set_m_datamode()
203 bus->params.m_data_mode = value; in intel_set_m_datamode()
213 struct sdw_bus *bus = &sdw->cdns.bus; in intel_set_s_datamode()
216 return -EINVAL; in intel_set_s_datamode()
221 bus->params.s_data_mode = value; in intel_set_s_datamode()
230 struct dentry *root = sdw->cdns.bus.debugfs; in intel_debugfs_init()
235 sdw->debugfs = debugfs_create_dir("intel-sdw", root); in intel_debugfs_init()
237 debugfs_create_file("intel-registers", 0400, sdw->debugfs, sdw, in intel_debugfs_init()
240 debugfs_create_file("intel-m-datamode", 0200, sdw->debugfs, sdw, in intel_debugfs_init()
243 debugfs_create_file("intel-s-datamode", 0200, sdw->debugfs, sdw, in intel_debugfs_init()
246 sdw_cdns_debugfs_init(&sdw->cdns, sdw->debugfs); in intel_debugfs_init()
251 debugfs_remove_recursive(sdw->debugfs); in intel_debugfs_exit()
264 unsigned int link_id = sdw->instance; in intel_link_power_up()
265 void __iomem *shim = sdw->link_res->shim; in intel_link_power_up()
266 u32 *shim_mask = sdw->link_res->shim_mask; in intel_link_power_up()
267 struct sdw_bus *bus = &sdw->cdns.bus; in intel_link_power_up()
268 struct sdw_master_prop *prop = &bus->prop; in intel_link_power_up()
275 mutex_lock(sdw->link_res->shim_lock); in intel_link_power_up()
279 * to generate the SoundWire SSP - which defines a 'safe' in intel_link_power_up()
287 if (prop->mclk_freq % 6000000) in intel_link_power_up()
293 dev_dbg(sdw->cdns.dev, "%s: powering up all links\n", __func__); in intel_link_power_up()
296 dev_dbg(sdw->cdns.dev, in intel_link_power_up()
310 /* only power-up enabled links */ in intel_link_power_up()
311 spa_mask = FIELD_PREP(SDW_SHIM_LCTL_SPA_MASK, sdw->link_res->link_mask); in intel_link_power_up()
312 cpa_mask = FIELD_PREP(SDW_SHIM_LCTL_CPA_MASK, sdw->link_res->link_mask); in intel_link_power_up()
318 dev_err(sdw->cdns.dev, "Failed to power up link: %d\n", ret); in intel_link_power_up()
326 dev_err(sdw->cdns.dev, in intel_link_power_up()
334 sdw->cdns.link_up = true; in intel_link_power_up()
336 mutex_unlock(sdw->link_res->shim_lock); in intel_link_power_up()
344 void __iomem *shim = sdw->link_res->shim; in intel_shim_glue_to_master_ip()
345 unsigned int link_id = sdw->instance; in intel_shim_glue_to_master_ip()
374 unsigned int link_id = sdw->instance; in intel_shim_master_ip_to_glue()
375 void __iomem *shim = sdw->link_res->shim; in intel_shim_master_ip_to_glue()
394 void __iomem *shim = sdw->link_res->shim; in intel_shim_init()
395 unsigned int link_id = sdw->instance; in intel_shim_init()
399 mutex_lock(sdw->link_res->shim_lock); in intel_shim_init()
426 mutex_unlock(sdw->link_res->shim_lock); in intel_shim_init()
433 void __iomem *shim = sdw->link_res->shim; in intel_shim_wake()
434 unsigned int link_id = sdw->instance; in intel_shim_wake()
437 mutex_lock(sdw->link_res->shim_lock); in intel_shim_wake()
454 mutex_unlock(sdw->link_res->shim_lock); in intel_shim_wake()
460 unsigned int link_id = sdw->instance; in intel_link_power_down()
461 void __iomem *shim = sdw->link_res->shim; in intel_link_power_down()
462 u32 *shim_mask = sdw->link_res->shim_mask; in intel_link_power_down()
465 mutex_lock(sdw->link_res->shim_lock); in intel_link_power_down()
468 dev_err(sdw->cdns.dev, in intel_link_power_down()
469 "%s: Unbalanced power-up/down calls\n", __func__); in intel_link_power_down()
471 sdw->cdns.link_up = false; in intel_link_power_down()
479 dev_dbg(sdw->cdns.dev, "%s: powering down all links\n", __func__); in intel_link_power_down()
484 /* only power-down enabled links */ in intel_link_power_down()
485 spa_mask = FIELD_PREP(SDW_SHIM_LCTL_SPA_MASK, ~sdw->link_res->link_mask); in intel_link_power_down()
486 cpa_mask = FIELD_PREP(SDW_SHIM_LCTL_CPA_MASK, sdw->link_res->link_mask); in intel_link_power_down()
492 dev_err(sdw->cdns.dev, "%s: could not power down link\n", __func__); in intel_link_power_down()
495 * we leave the sdw->cdns.link_up flag as false since we've disabled in intel_link_power_down()
501 mutex_unlock(sdw->link_res->shim_lock); in intel_link_power_down()
508 void __iomem *shim = sdw->link_res->shim; in intel_shim_sync_arm()
511 mutex_lock(sdw->link_res->shim_lock); in intel_shim_sync_arm()
515 sync_reg |= (SDW_SHIM_SYNC_CMDSYNC << sdw->instance); in intel_shim_sync_arm()
518 mutex_unlock(sdw->link_res->shim_lock); in intel_shim_sync_arm()
523 void __iomem *shim = sdw->link_res->shim; in intel_shim_sync_go_unlocked()
541 dev_err(sdw->cdns.dev, "SyncGO clear failed: %d\n", ret); in intel_shim_sync_go_unlocked()
550 mutex_lock(sdw->link_res->shim_lock); in intel_shim_sync_go()
554 mutex_unlock(sdw->link_res->shim_lock); in intel_shim_sync_go()
565 void __iomem *shim = sdw->link_res->shim; in intel_pdi_init()
566 unsigned int link_id = sdw->instance; in intel_pdi_init()
572 config->pcm_bd = FIELD_GET(SDW_SHIM_PCMSCAP_BSS, pcm_cap); in intel_pdi_init()
573 config->pcm_in = FIELD_GET(SDW_SHIM_PCMSCAP_ISS, pcm_cap); in intel_pdi_init()
574 config->pcm_out = FIELD_GET(SDW_SHIM_PCMSCAP_OSS, pcm_cap); in intel_pdi_init()
576 dev_dbg(sdw->cdns.dev, "PCM cap bd:%d in:%d out:%d\n", in intel_pdi_init()
577 config->pcm_bd, config->pcm_in, config->pcm_out); in intel_pdi_init()
582 config->pdm_bd = FIELD_GET(SDW_SHIM_PDMSCAP_BSS, pdm_cap); in intel_pdi_init()
583 config->pdm_in = FIELD_GET(SDW_SHIM_PDMSCAP_ISS, pdm_cap); in intel_pdi_init()
584 config->pdm_out = FIELD_GET(SDW_SHIM_PDMSCAP_OSS, pdm_cap); in intel_pdi_init()
586 dev_dbg(sdw->cdns.dev, "PDM cap bd:%d in:%d out:%d\n", in intel_pdi_init()
587 config->pdm_bd, config->pdm_in, config->pdm_out); in intel_pdi_init()
593 void __iomem *shim = sdw->link_res->shim; in intel_pdi_get_ch_cap()
594 unsigned int link_id = sdw->instance; in intel_pdi_get_ch_cap()
628 pdi->ch_count = intel_pdi_get_ch_cap(sdw, pdi->num, pcm); in intel_pdi_get_ch_update()
629 ch_count += pdi->ch_count; in intel_pdi_get_ch_update()
640 intel_pdi_get_ch_update(sdw, stream->bd, stream->num_bd, in intel_pdi_stream_ch_update()
641 &stream->num_ch_bd, pcm); in intel_pdi_stream_ch_update()
643 intel_pdi_get_ch_update(sdw, stream->in, stream->num_in, in intel_pdi_stream_ch_update()
644 &stream->num_ch_in, pcm); in intel_pdi_stream_ch_update()
646 intel_pdi_get_ch_update(sdw, stream->out, stream->num_out, in intel_pdi_stream_ch_update()
647 &stream->num_ch_out, pcm); in intel_pdi_stream_ch_update()
655 intel_pdi_stream_ch_update(sdw, &sdw->cdns.pcm, true); in intel_pdi_ch_update()
656 intel_pdi_stream_ch_update(sdw, &sdw->cdns.pdm, false); in intel_pdi_ch_update()
664 void __iomem *shim = sdw->link_res->shim; in intel_pdi_shim_configure()
665 unsigned int link_id = sdw->instance; in intel_pdi_shim_configure()
669 pdi->intel_alh_id = (link_id * 16) + pdi->num + 3; in intel_pdi_shim_configure()
670 if (pdi->num >= 2) in intel_pdi_shim_configure()
671 pdi->intel_alh_id += 2; in intel_pdi_shim_configure()
677 if (pdi->type != SDW_STREAM_PCM) in intel_pdi_shim_configure()
680 if (pdi->dir == SDW_DATA_DIR_RX) in intel_pdi_shim_configure()
685 u32p_replace_bits(&pdi_conf, pdi->intel_alh_id, SDW_SHIM_PCMSYCM_STREAM); in intel_pdi_shim_configure()
686 u32p_replace_bits(&pdi_conf, pdi->l_ch_num, SDW_SHIM_PCMSYCM_LCHN); in intel_pdi_shim_configure()
687 u32p_replace_bits(&pdi_conf, pdi->h_ch_num, SDW_SHIM_PCMSYCM_HCHN); in intel_pdi_shim_configure()
689 intel_writew(shim, SDW_SHIM_PCMSYCHM(link_id, pdi->num), pdi_conf); in intel_pdi_shim_configure()
695 void __iomem *alh = sdw->link_res->alh; in intel_pdi_alh_configure()
696 unsigned int link_id = sdw->instance; in intel_pdi_alh_configure()
700 pdi->intel_alh_id = (link_id * 16) + pdi->num + 3; in intel_pdi_alh_configure()
701 if (pdi->num >= 2) in intel_pdi_alh_configure()
702 pdi->intel_alh_id += 2; in intel_pdi_alh_configure()
705 conf = intel_readl(alh, SDW_ALH_STRMZCFG(pdi->intel_alh_id)); in intel_pdi_alh_configure()
708 u32p_replace_bits(&conf, pdi->ch_count - 1, SDW_ALH_STRMZCFG_CHN); in intel_pdi_alh_configure()
710 intel_writel(alh, SDW_ALH_STRMZCFG(pdi->intel_alh_id), conf); in intel_pdi_alh_configure()
719 struct sdw_intel_link_res *res = sdw->link_res; in intel_params_stream()
728 if (res->ops && res->ops->params_stream && res->dev) in intel_params_stream()
729 return res->ops->params_stream(res->dev, in intel_params_stream()
731 return -EIO; in intel_params_stream()
739 struct sdw_intel_link_res *res = sdw->link_res; in intel_free_stream()
746 if (res->ops && res->ops->free_stream && res->dev) in intel_free_stream()
747 return res->ops->free_stream(res->dev, in intel_free_stream()
762 /* Write to register only for multi-link */ in intel_pre_bank_switch()
763 if (!bus->multi_link) in intel_pre_bank_switch()
775 void __iomem *shim = sdw->link_res->shim; in intel_post_bank_switch()
778 /* Write to register only for multi-link */ in intel_post_bank_switch()
779 if (!bus->multi_link) in intel_post_bank_switch()
782 mutex_lock(sdw->link_res->shim_lock); in intel_post_bank_switch()
802 mutex_unlock(sdw->link_res->shim_lock); in intel_post_bank_switch()
805 dev_err(sdw->cdns.dev, "Post bank switch failed: %d\n", ret); in intel_post_bank_switch()
820 ret = pm_runtime_get_sync(cdns->dev); in intel_startup()
821 if (ret < 0 && ret != -EACCES) { in intel_startup()
822 dev_err_ratelimited(cdns->dev, in intel_startup()
825 pm_runtime_put_noidle(cdns->dev); in intel_startup()
847 return -EIO; in intel_hw_params()
850 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) in intel_hw_params()
855 if (dma->stream_type == SDW_STREAM_PDM) in intel_hw_params()
859 pdi = sdw_cdns_alloc_pdi(cdns, &cdns->pcm, ch, dir, dai->id); in intel_hw_params()
861 pdi = sdw_cdns_alloc_pdi(cdns, &cdns->pdm, ch, dir, dai->id); in intel_hw_params()
864 ret = -EINVAL; in intel_hw_params()
868 /* do run-time configurations for SHIM, ALH and PDI/PORT */ in intel_hw_params()
874 dma->suspended = false; in intel_hw_params()
875 dma->pdi = pdi; in intel_hw_params()
876 dma->hw_params = params; in intel_hw_params()
880 sdw->instance, in intel_hw_params()
881 pdi->intel_alh_id); in intel_hw_params()
888 sconfig.type = dma->stream_type; in intel_hw_params()
890 if (dma->stream_type == SDW_STREAM_PDM) { in intel_hw_params()
900 ret = -ENOMEM; in intel_hw_params()
904 pconfig->num = pdi->num; in intel_hw_params()
905 pconfig->ch_mask = (1 << ch) - 1; in intel_hw_params()
907 ret = sdw_stream_add_master(&cdns->bus, &sconfig, in intel_hw_params()
908 pconfig, 1, dma->stream); in intel_hw_params()
910 dev_err(cdns->dev, "add master to stream failed:%d\n", ret); in intel_hw_params()
928 dev_err(dai->dev, "failed to get dma data in %s\n", in intel_prepare()
930 return -EIO; in intel_prepare()
933 if (dma->suspended) { in intel_prepare()
934 dma->suspended = false; in intel_prepare()
937 * .prepare() is called after system resume, where we in intel_prepare()
945 ch = params_channels(dma->hw_params); in intel_prepare()
946 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) in intel_prepare()
951 intel_pdi_shim_configure(sdw, dma->pdi); in intel_prepare()
952 intel_pdi_alh_configure(sdw, dma->pdi); in intel_prepare()
953 sdw_cdns_config_stream(cdns, ch, dir, dma->pdi); in intel_prepare()
957 dma->hw_params, in intel_prepare()
958 sdw->instance, in intel_prepare()
959 dma->pdi->intel_alh_id); in intel_prepare()
975 return -EIO; in intel_hw_free()
978 * The sdw stream state will transition to RELEASED when stream-> in intel_hw_free()
980 * DEPREPARED for the first cpu-dai and to RELEASED for the last in intel_hw_free()
981 * cpu-dai. in intel_hw_free()
983 ret = sdw_stream_remove_master(&cdns->bus, dma->stream); in intel_hw_free()
985 dev_err(dai->dev, "remove master from stream %s failed: %d\n", in intel_hw_free()
986 dma->stream->name, ret); in intel_hw_free()
990 ret = intel_free_stream(sdw, substream, dai, sdw->instance); in intel_hw_free()
992 dev_err(dai->dev, "intel_free_stream: failed %d\n", ret); in intel_hw_free()
996 dma->hw_params = NULL; in intel_hw_free()
997 dma->pdi = NULL; in intel_hw_free()
1007 pm_runtime_mark_last_busy(cdns->dev); in intel_shutdown()
1008 pm_runtime_put_autosuspend(cdns->dev); in intel_shutdown()
1022 dma = dai->playback_dma_data; in intel_component_dais_suspend()
1024 dma->suspended = true; in intel_component_dais_suspend()
1026 dma = dai->capture_dma_data; in intel_component_dais_suspend()
1028 dma->suspended = true; in intel_component_dais_suspend()
1052 dma = dai->playback_dma_data; in intel_get_sdw_stream()
1054 dma = dai->capture_dma_data; in intel_get_sdw_stream()
1057 return ERR_PTR(-EINVAL); in intel_get_sdw_stream()
1059 return dma->stream; in intel_get_sdw_stream()
1099 dais[i].name = devm_kasprintf(cdns->dev, GFP_KERNEL, in intel_create_dai()
1101 cdns->instance, i); in intel_create_dai()
1103 return -ENOMEM; in intel_create_dai()
1130 struct sdw_cdns *cdns = &sdw->cdns; in intel_register_dai()
1136 num_dai = cdns->pcm.num_pdi + cdns->pdm.num_pdi; in intel_register_dai()
1138 dais = devm_kcalloc(cdns->dev, num_dai, sizeof(*dais), GFP_KERNEL); in intel_register_dai()
1140 return -ENOMEM; in intel_register_dai()
1143 stream = &cdns->pcm; in intel_register_dai()
1145 ret = intel_create_dai(cdns, dais, INTEL_PDI_IN, cdns->pcm.num_in, in intel_register_dai()
1146 off, stream->num_ch_in, true); in intel_register_dai()
1150 off += cdns->pcm.num_in; in intel_register_dai()
1151 ret = intel_create_dai(cdns, dais, INTEL_PDI_OUT, cdns->pcm.num_out, in intel_register_dai()
1152 off, stream->num_ch_out, true); in intel_register_dai()
1156 off += cdns->pcm.num_out; in intel_register_dai()
1157 ret = intel_create_dai(cdns, dais, INTEL_PDI_BD, cdns->pcm.num_bd, in intel_register_dai()
1158 off, stream->num_ch_bd, true); in intel_register_dai()
1163 stream = &cdns->pdm; in intel_register_dai()
1164 off += cdns->pcm.num_bd; in intel_register_dai()
1165 ret = intel_create_dai(cdns, dais, INTEL_PDI_IN, cdns->pdm.num_in, in intel_register_dai()
1166 off, stream->num_ch_in, false); in intel_register_dai()
1170 off += cdns->pdm.num_in; in intel_register_dai()
1171 ret = intel_create_dai(cdns, dais, INTEL_PDI_OUT, cdns->pdm.num_out, in intel_register_dai()
1172 off, stream->num_ch_out, false); in intel_register_dai()
1176 off += cdns->pdm.num_out; in intel_register_dai()
1177 ret = intel_create_dai(cdns, dais, INTEL_PDI_BD, cdns->pdm.num_bd, in intel_register_dai()
1178 off, stream->num_ch_bd, false); in intel_register_dai()
1182 return snd_soc_register_component(cdns->dev, &dai_component, in intel_register_dai()
1188 struct sdw_master_prop *prop = &bus->prop; in sdw_master_read_intel_prop()
1195 "mipi-sdw-link-%d-subproperties", bus->link_id); in sdw_master_read_intel_prop()
1197 link = device_get_named_child_node(bus->dev, name); in sdw_master_read_intel_prop()
1199 dev_err(bus->dev, "Master node %s not found\n", name); in sdw_master_read_intel_prop()
1200 return -EIO; in sdw_master_read_intel_prop()
1204 "intel-sdw-ip-clock", in sdw_master_read_intel_prop()
1205 &prop->mclk_freq); in sdw_master_read_intel_prop()
1208 prop->mclk_freq /= 2; in sdw_master_read_intel_prop()
1211 "intel-quirk-mask", in sdw_master_read_intel_prop()
1215 prop->hw_disabled = true; in sdw_master_read_intel_prop()
1217 prop->quirks = SDW_MASTER_QUIRKS_CLEAR_INITIAL_CLASH | in sdw_master_read_intel_prop()
1228 /* read Intel-specific properties */ in intel_prop_read()
1252 clock_stop = sdw_cdns_is_clock_stop(&sdw->cdns); in intel_init()
1266 struct device *dev = &auxdev->dev; in intel_link_probe()
1275 return -ENOMEM; in intel_link_probe()
1277 cdns = &sdw->cdns; in intel_link_probe()
1278 bus = &cdns->bus; in intel_link_probe()
1280 sdw->instance = auxdev->id; in intel_link_probe()
1281 sdw->link_res = &ldev->link_res; in intel_link_probe()
1282 cdns->dev = dev; in intel_link_probe()
1283 cdns->registers = sdw->link_res->registers; in intel_link_probe()
1284 cdns->instance = sdw->instance; in intel_link_probe()
1285 cdns->msg_count = 0; in intel_link_probe()
1287 bus->link_id = auxdev->id; in intel_link_probe()
1293 bus->ops = &sdw_intel_ops; in intel_link_probe()
1299 sdw->cdns.bus.compute_params = sdw_compute_params; in intel_link_probe()
1301 ret = sdw_bus_master_add(bus, dev, dev->fwnode); in intel_link_probe()
1307 if (bus->prop.hw_disabled) in intel_link_probe()
1310 bus->link_id); in intel_link_probe()
1315 bus->prop.err_threshold = 0; in intel_link_probe()
1323 struct device *dev = &auxdev->dev; in intel_link_startup()
1326 struct sdw_bus *bus = &cdns->bus; in intel_link_startup()
1332 if (bus->prop.hw_disabled) { in intel_link_startup()
1335 sdw->instance); in intel_link_startup()
1339 link_flags = md_flags >> (bus->link_id * 8); in intel_link_startup()
1342 dev_dbg(dev, "Multi-link is disabled\n"); in intel_link_startup()
1343 bus->multi_link = false; in intel_link_startup()
1346 * hardware-based synchronization is required regardless in intel_link_startup()
1347 * of the number of segments used by a stream: SSP-based in intel_link_startup()
1348 * synchronization is gated by gsync when the multi-master in intel_link_startup()
1351 bus->multi_link = true; in intel_link_startup()
1352 bus->hw_sync_min_links = 1; in intel_link_startup()
1424 clock_stop_quirks = sdw->link_res->clock_stop_quirks; in intel_link_startup()
1441 * there are no Slave devices populated or if the power-on is in intel_link_startup()
1445 * Conditionally force the pm_runtime core to re-evaluate the in intel_link_startup()
1454 sdw->startup_done = true; in intel_link_startup()
1465 struct device *dev = &auxdev->dev; in intel_link_remove()
1468 struct sdw_bus *bus = &cdns->bus; in intel_link_remove()
1475 if (!bus->prop.hw_disabled) { in intel_link_remove()
1485 struct device *dev = &auxdev->dev; in intel_link_process_wakeen_event()
1492 bus = &sdw->cdns.bus; in intel_link_process_wakeen_event()
1494 if (bus->prop.hw_disabled || !sdw->startup_done) { in intel_link_process_wakeen_event()
1495 dev_dbg(dev, "SoundWire master %d is disabled or not-started, ignoring\n", in intel_link_process_wakeen_event()
1496 bus->link_id); in intel_link_process_wakeen_event()
1500 shim = sdw->link_res->shim; in intel_link_process_wakeen_event()
1503 if (!(wake_sts & BIT(sdw->instance))) in intel_link_process_wakeen_event()
1510 * resume the Master, which will generate a bus reset and result in in intel_link_process_wakeen_event()
1511 * Slaves re-attaching and be re-enumerated. The SoundWire physical in intel_link_process_wakeen_event()
1530 if (!slave->probed) { in intel_resume_child_device()
1534 if (!slave->dev_num_sticky) { in intel_resume_child_device()
1550 struct sdw_bus *bus = &cdns->bus; in intel_pm_prepare()
1554 if (bus->prop.hw_disabled || !sdw->startup_done) { in intel_pm_prepare()
1555 dev_dbg(dev, "SoundWire master %d is disabled or not-started, ignoring\n", in intel_pm_prepare()
1556 bus->link_id); in intel_pm_prepare()
1560 clock_stop_quirks = sdw->link_res->clock_stop_quirks; in intel_pm_prepare()
1563 pm_runtime_suspended(dev->parent) && in intel_pm_prepare()
1569 * The only solution is to resume the entire bus to full power in intel_pm_prepare()
1575 * on resume. in intel_pm_prepare()
1579 * first resume the device for this link. This will also by construction in intel_pm_prepare()
1580 * resume the PCI parent device. in intel_pm_prepare()
1591 * this is a no-op. in intel_pm_prepare()
1592 * The resume to full power could have been implemented with a .prepare in intel_pm_prepare()
1594 * of code to handle an Intel-specific corner case. It is simpler in in intel_pm_prepare()
1597 ret = device_for_each_child(bus->dev, NULL, intel_resume_child_device); in intel_pm_prepare()
1610 struct sdw_bus *bus = &cdns->bus; in intel_suspend()
1614 if (bus->prop.hw_disabled || !sdw->startup_done) { in intel_suspend()
1615 dev_dbg(dev, "SoundWire master %d is disabled or not-started, ignoring\n", in intel_suspend()
1616 bus->link_id); in intel_suspend()
1623 clock_stop_quirks = sdw->link_res->clock_stop_quirks; in intel_suspend()
1628 if (pm_runtime_suspended(dev->parent)) { in intel_suspend()
1631 * resume to full power in intel_suspend()
1663 struct sdw_bus *bus = &cdns->bus; in intel_suspend_runtime()
1667 if (bus->prop.hw_disabled || !sdw->startup_done) { in intel_suspend_runtime()
1668 dev_dbg(dev, "SoundWire master %d is disabled or not-started, ignoring\n", in intel_suspend_runtime()
1669 bus->link_id); in intel_suspend_runtime()
1673 clock_stop_quirks = sdw->link_res->clock_stop_quirks; in intel_suspend_runtime()
1717 ret = -EINVAL; in intel_suspend_runtime()
1727 struct sdw_bus *bus = &cdns->bus; in intel_resume()
1732 if (bus->prop.hw_disabled || !sdw->startup_done) { in intel_resume()
1733 dev_dbg(dev, "SoundWire master %d is disabled or not-started, ignoring\n", in intel_resume()
1734 bus->link_id); in intel_resume()
1738 link_flags = md_flags >> (bus->link_id * 8); in intel_resume()
1750 link_flags = md_flags >> (bus->link_id * 8); in intel_resume()
1770 dev_err(dev, "cannot enable interrupts during resume\n"); in intel_resume()
1781 ret = sdw_cdns_init(&sdw->cdns); in intel_resume()
1783 dev_err(dev, "unable to initialize Cadence IP during resume\n"); in intel_resume()
1789 dev_err(dev, "unable to exit bus reset sequence during resume\n"); in intel_resume()
1796 dev_err(dev, "sync go failed during resume\n"); in intel_resume()
1804 * after system resume, the pm_runtime suspend() may kick in in intel_resume()
1822 struct sdw_bus *bus = &cdns->bus; in intel_resume_runtime()
1830 if (bus->prop.hw_disabled || !sdw->startup_done) { in intel_resume_runtime()
1831 dev_dbg(dev, "SoundWire master %d is disabled or not-started, ignoring\n", in intel_resume_runtime()
1832 bus->link_id); in intel_resume_runtime()
1836 link_flags = md_flags >> (bus->link_id * 8); in intel_resume_runtime()
1839 clock_stop_quirks = sdw->link_res->clock_stop_quirks; in intel_resume_runtime()
1856 dev_err(dev, "cannot enable interrupts during resume\n"); in intel_resume_runtime()
1867 ret = sdw_cdns_init(&sdw->cdns); in intel_resume_runtime()
1869 dev_err(dev, "unable to initialize Cadence IP during resume\n"); in intel_resume_runtime()
1875 dev_err(dev, "unable to exit bus reset sequence during resume\n"); in intel_resume_runtime()
1882 dev_err(dev, "sync go failed during resume\n"); in intel_resume_runtime()
1903 clock_stop0 = sdw_cdns_is_clock_stop(&sdw->cdns); in intel_resume_runtime()
1917 dev_err(dev, "cannot enable interrupts during resume\n"); in intel_resume_runtime()
1929 * Re-initialize the IP since it was powered-off in intel_resume_runtime()
1931 sdw_cdns_init(&sdw->cdns); in intel_resume_runtime()
1936 dev_err(dev, "cannot enable interrupts during resume\n"); in intel_resume_runtime()
1943 dev_err(dev, "unable to restart clock during resume\n"); in intel_resume_runtime()
1950 dev_err(dev, "unable to exit bus reset sequence during resume\n"); in intel_resume_runtime()
1957 dev_err(sdw->cdns.dev, "sync go failed during resume\n"); in intel_resume_runtime()
1967 clock_stop0 = sdw_cdns_is_clock_stop(&sdw->cdns); in intel_resume_runtime()
1979 dev_err(dev, "cannot enable interrupts during resume\n"); in intel_resume_runtime()
1985 dev_err(dev, "unable to resume master during resume\n"); in intel_resume_runtime()
1994 ret = -EINVAL; in intel_resume_runtime()