Lines Matching full:pmc
3 * drivers/soc/tegra/pmc.c
12 #define pr_fmt(fmt) "tegra-pmc: " fmt
51 #include <soc/tegra/pmc.h>
57 #include <dt-bindings/soc/tegra-pmc.h>
186 /* for secure PMC */
258 struct tegra_pmc *pmc; member
337 void (*init)(struct tegra_pmc *pmc);
338 void (*setup_irq_polarity)(struct tegra_pmc *pmc,
343 int (*powergate_set)(struct tegra_pmc *pmc, unsigned int id,
366 * struct tegra_pmc - NVIDIA Tegra PMC
367 * @dev: pointer to PMC device structure
374 * @tz_only: flag specifying if the PMC can only be accessed via TrustZone
391 * @pctl_dev: pin controller exposed by the PMC
392 * @domain: IRQ domain provided by the PMC
437 static struct tegra_pmc *pmc = &(struct tegra_pmc) { variable
448 static u32 tegra_pmc_readl(struct tegra_pmc *pmc, unsigned long offset) in tegra_pmc_readl() argument
452 if (pmc->tz_only) { in tegra_pmc_readl()
456 if (pmc->dev) in tegra_pmc_readl()
457 dev_warn(pmc->dev, "%s(): SMC failed: %lu\n", in tegra_pmc_readl()
467 return readl(pmc->base + offset); in tegra_pmc_readl()
470 static void tegra_pmc_writel(struct tegra_pmc *pmc, u32 value, in tegra_pmc_writel() argument
475 if (pmc->tz_only) { in tegra_pmc_writel()
479 if (pmc->dev) in tegra_pmc_writel()
480 dev_warn(pmc->dev, "%s(): SMC failed: %lu\n", in tegra_pmc_writel()
487 writel(value, pmc->base + offset); in tegra_pmc_writel()
491 static u32 tegra_pmc_scratch_readl(struct tegra_pmc *pmc, unsigned long offset) in tegra_pmc_scratch_readl() argument
493 if (pmc->tz_only) in tegra_pmc_scratch_readl()
494 return tegra_pmc_readl(pmc, offset); in tegra_pmc_scratch_readl()
496 return readl(pmc->scratch + offset); in tegra_pmc_scratch_readl()
499 static void tegra_pmc_scratch_writel(struct tegra_pmc *pmc, u32 value, in tegra_pmc_scratch_writel() argument
502 if (pmc->tz_only) in tegra_pmc_scratch_writel()
503 tegra_pmc_writel(pmc, value, offset); in tegra_pmc_scratch_writel()
505 writel(value, pmc->scratch + offset); in tegra_pmc_scratch_writel()
515 if (id == TEGRA_POWERGATE_3D && pmc->soc->has_gpu_clamps) in tegra_powergate_state()
516 return (tegra_pmc_readl(pmc, GPU_RG_CNTRL) & 0x1) == 0; in tegra_powergate_state()
518 return (tegra_pmc_readl(pmc, PWRGATE_STATUS) & BIT(id)) != 0; in tegra_powergate_state()
521 static inline bool tegra_powergate_is_valid(struct tegra_pmc *pmc, int id) in tegra_powergate_is_valid() argument
523 return (pmc->soc && pmc->soc->powergates[id]); in tegra_powergate_is_valid()
526 static inline bool tegra_powergate_is_available(struct tegra_pmc *pmc, int id) in tegra_powergate_is_available() argument
528 return test_bit(id, pmc->powergates_available); in tegra_powergate_is_available()
531 static int tegra_powergate_lookup(struct tegra_pmc *pmc, const char *name) in tegra_powergate_lookup() argument
535 if (!pmc || !pmc->soc || !name) in tegra_powergate_lookup()
538 for (i = 0; i < pmc->soc->num_powergates; i++) { in tegra_powergate_lookup()
539 if (!tegra_powergate_is_valid(pmc, i)) in tegra_powergate_lookup()
542 if (!strcmp(name, pmc->soc->powergates[i])) in tegra_powergate_lookup()
549 static int tegra20_powergate_set(struct tegra_pmc *pmc, unsigned int id, in tegra20_powergate_set() argument
557 * As per TRM documentation, the toggle command will be dropped by PMC in tegra20_powergate_set()
562 tegra_pmc_writel(pmc, PWRGATE_TOGGLE_START | id, PWRGATE_TOGGLE); in tegra20_powergate_set()
564 /* wait for PMC to execute the command */ in tegra20_powergate_set()
572 static inline bool tegra_powergate_toggle_ready(struct tegra_pmc *pmc) in tegra_powergate_toggle_ready() argument
574 return !(tegra_pmc_readl(pmc, PWRGATE_TOGGLE) & PWRGATE_TOGGLE_START); in tegra_powergate_toggle_ready()
577 static int tegra114_powergate_set(struct tegra_pmc *pmc, unsigned int id, in tegra114_powergate_set() argument
583 /* wait while PMC power gating is contended */ in tegra114_powergate_set()
584 err = readx_poll_timeout(tegra_powergate_toggle_ready, pmc, status, in tegra114_powergate_set()
589 tegra_pmc_writel(pmc, PWRGATE_TOGGLE_START | id, PWRGATE_TOGGLE); in tegra114_powergate_set()
591 /* wait for PMC to accept the command */ in tegra114_powergate_set()
592 err = readx_poll_timeout(tegra_powergate_toggle_ready, pmc, status, in tegra114_powergate_set()
597 /* wait for PMC to execute the command */ in tegra114_powergate_set()
608 * @pmc: power management controller
612 static int tegra_powergate_set(struct tegra_pmc *pmc, unsigned int id, in tegra_powergate_set() argument
617 if (id == TEGRA_POWERGATE_3D && pmc->soc->has_gpu_clamps) in tegra_powergate_set()
620 mutex_lock(&pmc->powergates_lock); in tegra_powergate_set()
623 mutex_unlock(&pmc->powergates_lock); in tegra_powergate_set()
627 err = pmc->soc->powergate_set(pmc, id, new_state); in tegra_powergate_set()
629 mutex_unlock(&pmc->powergates_lock); in tegra_powergate_set()
634 static int __tegra_powergate_remove_clamping(struct tegra_pmc *pmc, in __tegra_powergate_remove_clamping() argument
639 mutex_lock(&pmc->powergates_lock); in __tegra_powergate_remove_clamping()
646 if (pmc->soc->has_gpu_clamps) { in __tegra_powergate_remove_clamping()
647 tegra_pmc_writel(pmc, 0, GPU_RG_CNTRL); in __tegra_powergate_remove_clamping()
663 tegra_pmc_writel(pmc, mask, REMOVE_CLAMPING); in __tegra_powergate_remove_clamping()
666 mutex_unlock(&pmc->powergates_lock); in __tegra_powergate_remove_clamping()
761 err = tegra_powergate_set(pg->pmc, pg->id, true); in tegra_powergate_power_up()
777 err = __tegra_powergate_remove_clamping(pg->pmc, pg->id); in tegra_powergate_power_up()
789 if (pg->pmc->soc->needs_mbist_war) in tegra_powergate_power_up()
811 tegra_powergate_set(pg->pmc, pg->id, false); in tegra_powergate_power_up()
840 err = tegra_powergate_set(pg->pmc, pg->id, false); in tegra_powergate_power_down()
868 struct device *dev = pg->pmc->dev; in tegra_genpd_power_on()
887 struct device *dev = pg->pmc->dev; in tegra_genpd_power_off()
913 if (!tegra_powergate_is_available(pmc, id)) in tegra_powergate_power_on()
916 return tegra_powergate_set(pmc, id, true); in tegra_powergate_power_on()
926 if (!tegra_powergate_is_available(pmc, id)) in tegra_powergate_power_off()
929 return tegra_powergate_set(pmc, id, false); in tegra_powergate_power_off()
935 * @pmc: power management controller
938 static int tegra_powergate_is_powered(struct tegra_pmc *pmc, unsigned int id) in tegra_powergate_is_powered() argument
940 if (!tegra_powergate_is_valid(pmc, id)) in tegra_powergate_is_powered()
952 if (!tegra_powergate_is_available(pmc, id)) in tegra_powergate_remove_clamping()
955 return __tegra_powergate_remove_clamping(pmc, id); in tegra_powergate_remove_clamping()
973 if (!tegra_powergate_is_available(pmc, id)) in tegra_powergate_sequence_power_up()
990 pg->pmc = pmc; in tegra_powergate_sequence_power_up()
994 dev_err(pmc->dev, "failed to turn on partition %d: %d\n", id, in tegra_powergate_sequence_power_up()
1006 * @pmc: power management controller
1012 static int tegra_get_cpu_powergate_id(struct tegra_pmc *pmc, in tegra_get_cpu_powergate_id() argument
1015 if (pmc->soc && cpuid < pmc->soc->num_cpu_powergates) in tegra_get_cpu_powergate_id()
1016 return pmc->soc->cpu_powergates[cpuid]; in tegra_get_cpu_powergate_id()
1029 id = tegra_get_cpu_powergate_id(pmc, cpuid); in tegra_pmc_cpu_is_powered()
1033 return tegra_powergate_is_powered(pmc, id); in tegra_pmc_cpu_is_powered()
1044 id = tegra_get_cpu_powergate_id(pmc, cpuid); in tegra_pmc_cpu_power_on()
1048 return tegra_powergate_set(pmc, id, true); in tegra_pmc_cpu_power_on()
1059 id = tegra_get_cpu_powergate_id(pmc, cpuid); in tegra_pmc_cpu_remove_clamping()
1072 value = tegra_pmc_scratch_readl(pmc, pmc->soc->regs->scratch0); in tegra_pmc_restart_notify()
1086 tegra_pmc_scratch_writel(pmc, value, pmc->soc->regs->scratch0); in tegra_pmc_restart_notify()
1089 value = tegra_pmc_readl(pmc, PMC_CNTRL); in tegra_pmc_restart_notify()
1091 tegra_pmc_writel(pmc, value, PMC_CNTRL); in tegra_pmc_restart_notify()
1109 for (i = 0; i < pmc->soc->num_powergates; i++) { in powergate_show()
1110 status = tegra_powergate_is_powered(pmc, i); in powergate_show()
1114 seq_printf(s, " %9s %7s\n", pmc->soc->powergates[i], in powergate_show()
1125 pmc->debugfs = debugfs_create_file("powergate", S_IRUGO, NULL, NULL, in tegra_powergate_debugfs_init()
1127 if (!pmc->debugfs) in tegra_powergate_debugfs_init()
1179 struct device *dev = pg->pmc->dev; in tegra_powergate_of_get_resets()
1214 static int tegra_powergate_add(struct tegra_pmc *pmc, struct device_node *np) in tegra_powergate_add() argument
1216 struct device *dev = pmc->dev; in tegra_powergate_add()
1225 id = tegra_powergate_lookup(pmc, np->name); in tegra_powergate_add()
1236 clear_bit(id, pmc->powergates_available); in tegra_powergate_add()
1242 pg->pmc = pmc; in tegra_powergate_add()
1244 off = !tegra_powergate_is_powered(pmc, pg->id); in tegra_powergate_add()
1296 set_bit(id, pmc->powergates_available); in tegra_powergate_add()
1306 return pmc->core_domain_state_synced; in tegra_pmc_core_domain_state_synced()
1323 mutex_lock(&pmc->powergates_lock); in tegra_pmc_core_pd_set_performance_state()
1324 err = dev_pm_opp_set_opp(pmc->dev, opp); in tegra_pmc_core_pd_set_performance_state()
1325 mutex_unlock(&pmc->powergates_lock); in tegra_pmc_core_pd_set_performance_state()
1345 static int tegra_pmc_core_pd_add(struct tegra_pmc *pmc, struct device_node *np) in tegra_pmc_core_pd_add() argument
1351 genpd = devm_kzalloc(pmc->dev, sizeof(*genpd), GFP_KERNEL); in tegra_pmc_core_pd_add()
1359 err = devm_pm_opp_set_regulators(pmc->dev, &rname, 1); in tegra_pmc_core_pd_add()
1361 return dev_err_probe(pmc->dev, err, in tegra_pmc_core_pd_add()
1366 dev_err(pmc->dev, "failed to init core genpd: %d\n", err); in tegra_pmc_core_pd_add()
1372 dev_err(pmc->dev, "failed to add core genpd: %d\n", err); in tegra_pmc_core_pd_add()
1376 pmc->core_domain_registered = true; in tegra_pmc_core_pd_add()
1386 static int tegra_powergate_init(struct tegra_pmc *pmc, in tegra_powergate_init() argument
1399 err = tegra_pmc_core_pd_add(pmc, np); in tegra_powergate_init()
1410 err = tegra_powergate_add(pmc, child); in tegra_powergate_init()
1448 set_bit(pg->id, pmc->powergates_available); in tegra_powergate_remove()
1482 tegra_io_pad_find(struct tegra_pmc *pmc, enum tegra_io_pad id) in tegra_io_pad_find() argument
1486 for (i = 0; i < pmc->soc->num_io_pads; i++) in tegra_io_pad_find()
1487 if (pmc->soc->io_pads[i].id == id) in tegra_io_pad_find()
1488 return &pmc->soc->io_pads[i]; in tegra_io_pad_find()
1493 static int tegra_io_pad_get_dpd_register_bit(struct tegra_pmc *pmc, in tegra_io_pad_get_dpd_register_bit() argument
1501 pad = tegra_io_pad_find(pmc, id); in tegra_io_pad_get_dpd_register_bit()
1503 dev_err(pmc->dev, "invalid I/O pad ID %u\n", id); in tegra_io_pad_get_dpd_register_bit()
1513 *status = pmc->soc->regs->dpd_status; in tegra_io_pad_get_dpd_register_bit()
1514 *request = pmc->soc->regs->dpd_req; in tegra_io_pad_get_dpd_register_bit()
1516 *status = pmc->soc->regs->dpd2_status; in tegra_io_pad_get_dpd_register_bit()
1517 *request = pmc->soc->regs->dpd2_req; in tegra_io_pad_get_dpd_register_bit()
1523 static int tegra_io_pad_prepare(struct tegra_pmc *pmc, enum tegra_io_pad id, in tegra_io_pad_prepare() argument
1530 err = tegra_io_pad_get_dpd_register_bit(pmc, id, request, status, mask); in tegra_io_pad_prepare()
1534 if (pmc->clk) { in tegra_io_pad_prepare()
1535 rate = pmc->rate; in tegra_io_pad_prepare()
1537 dev_err(pmc->dev, "failed to get clock rate\n"); in tegra_io_pad_prepare()
1541 tegra_pmc_writel(pmc, DPD_SAMPLE_ENABLE, DPD_SAMPLE); in tegra_io_pad_prepare()
1546 tegra_pmc_writel(pmc, value, SEL_DPD_TIM); in tegra_io_pad_prepare()
1552 static int tegra_io_pad_poll(struct tegra_pmc *pmc, unsigned long offset, in tegra_io_pad_poll() argument
1560 value = tegra_pmc_readl(pmc, offset); in tegra_io_pad_poll()
1570 static void tegra_io_pad_unprepare(struct tegra_pmc *pmc) in tegra_io_pad_unprepare() argument
1572 if (pmc->clk) in tegra_io_pad_unprepare()
1573 tegra_pmc_writel(pmc, DPD_SAMPLE_DISABLE, DPD_SAMPLE); in tegra_io_pad_unprepare()
1588 mutex_lock(&pmc->powergates_lock); in tegra_io_pad_power_enable()
1590 err = tegra_io_pad_prepare(pmc, id, &request, &status, &mask); in tegra_io_pad_power_enable()
1592 dev_err(pmc->dev, "failed to prepare I/O pad: %d\n", err); in tegra_io_pad_power_enable()
1596 tegra_pmc_writel(pmc, IO_DPD_REQ_CODE_OFF | mask, request); in tegra_io_pad_power_enable()
1598 err = tegra_io_pad_poll(pmc, status, mask, 0, 250); in tegra_io_pad_power_enable()
1600 dev_err(pmc->dev, "failed to enable I/O pad: %d\n", err); in tegra_io_pad_power_enable()
1604 tegra_io_pad_unprepare(pmc); in tegra_io_pad_power_enable()
1607 mutex_unlock(&pmc->powergates_lock); in tegra_io_pad_power_enable()
1624 mutex_lock(&pmc->powergates_lock); in tegra_io_pad_power_disable()
1626 err = tegra_io_pad_prepare(pmc, id, &request, &status, &mask); in tegra_io_pad_power_disable()
1628 dev_err(pmc->dev, "failed to prepare I/O pad: %d\n", err); in tegra_io_pad_power_disable()
1632 tegra_pmc_writel(pmc, IO_DPD_REQ_CODE_ON | mask, request); in tegra_io_pad_power_disable()
1634 err = tegra_io_pad_poll(pmc, status, mask, mask, 250); in tegra_io_pad_power_disable()
1636 dev_err(pmc->dev, "failed to disable I/O pad: %d\n", err); in tegra_io_pad_power_disable()
1640 tegra_io_pad_unprepare(pmc); in tegra_io_pad_power_disable()
1643 mutex_unlock(&pmc->powergates_lock); in tegra_io_pad_power_disable()
1648 static int tegra_io_pad_is_powered(struct tegra_pmc *pmc, enum tegra_io_pad id) in tegra_io_pad_is_powered() argument
1654 err = tegra_io_pad_get_dpd_register_bit(pmc, id, &request, &status, in tegra_io_pad_is_powered()
1659 value = tegra_pmc_readl(pmc, status); in tegra_io_pad_is_powered()
1664 static int tegra_io_pad_set_voltage(struct tegra_pmc *pmc, enum tegra_io_pad id, in tegra_io_pad_set_voltage() argument
1670 pad = tegra_io_pad_find(pmc, id); in tegra_io_pad_set_voltage()
1677 mutex_lock(&pmc->powergates_lock); in tegra_io_pad_set_voltage()
1679 if (pmc->soc->has_impl_33v_pwr) { in tegra_io_pad_set_voltage()
1680 value = tegra_pmc_readl(pmc, PMC_IMPL_E_33V_PWR); in tegra_io_pad_set_voltage()
1687 tegra_pmc_writel(pmc, value, PMC_IMPL_E_33V_PWR); in tegra_io_pad_set_voltage()
1690 value = tegra_pmc_readl(pmc, PMC_PWR_DET); in tegra_io_pad_set_voltage()
1692 tegra_pmc_writel(pmc, value, PMC_PWR_DET); in tegra_io_pad_set_voltage()
1695 value = tegra_pmc_readl(pmc, PMC_PWR_DET_VALUE); in tegra_io_pad_set_voltage()
1702 tegra_pmc_writel(pmc, value, PMC_PWR_DET_VALUE); in tegra_io_pad_set_voltage()
1705 mutex_unlock(&pmc->powergates_lock); in tegra_io_pad_set_voltage()
1712 static int tegra_io_pad_get_voltage(struct tegra_pmc *pmc, enum tegra_io_pad id) in tegra_io_pad_get_voltage() argument
1717 pad = tegra_io_pad_find(pmc, id); in tegra_io_pad_get_voltage()
1724 if (pmc->soc->has_impl_33v_pwr) in tegra_io_pad_get_voltage()
1725 value = tegra_pmc_readl(pmc, PMC_IMPL_E_33V_PWR); in tegra_io_pad_get_voltage()
1727 value = tegra_pmc_readl(pmc, PMC_PWR_DET_VALUE); in tegra_io_pad_get_voltage()
1762 return pmc->suspend_mode; in tegra_pmc_get_suspend_mode()
1770 pmc->suspend_mode = mode; in tegra_pmc_set_suspend_mode()
1785 rate = pmc->rate; in tegra_pmc_enter_suspend_mode()
1795 ticks = pmc->cpu_good_time * rate + USEC_PER_SEC - 1; in tegra_pmc_enter_suspend_mode()
1797 tegra_pmc_writel(pmc, ticks, PMC_CPUPWRGOOD_TIMER); in tegra_pmc_enter_suspend_mode()
1799 ticks = pmc->cpu_off_time * rate + USEC_PER_SEC - 1; in tegra_pmc_enter_suspend_mode()
1801 tegra_pmc_writel(pmc, ticks, PMC_CPUPWROFF_TIMER); in tegra_pmc_enter_suspend_mode()
1803 value = tegra_pmc_readl(pmc, PMC_CNTRL); in tegra_pmc_enter_suspend_mode()
1806 tegra_pmc_writel(pmc, value, PMC_CNTRL); in tegra_pmc_enter_suspend_mode()
1810 static int tegra_pmc_parse_dt(struct tegra_pmc *pmc, struct device_node *np) in tegra_pmc_parse_dt() argument
1815 pmc->suspend_mode = TEGRA_SUSPEND_NONE; in tegra_pmc_parse_dt()
1819 pmc->suspend_mode = TEGRA_SUSPEND_LP0; in tegra_pmc_parse_dt()
1823 pmc->suspend_mode = TEGRA_SUSPEND_LP1; in tegra_pmc_parse_dt()
1827 pmc->suspend_mode = TEGRA_SUSPEND_LP2; in tegra_pmc_parse_dt()
1831 pmc->suspend_mode = TEGRA_SUSPEND_NONE; in tegra_pmc_parse_dt()
1836 pmc->suspend_mode = tegra_pm_validate_suspend_mode(pmc->suspend_mode); in tegra_pmc_parse_dt()
1839 pmc->suspend_mode = TEGRA_SUSPEND_NONE; in tegra_pmc_parse_dt()
1841 pmc->cpu_good_time = value; in tegra_pmc_parse_dt()
1844 pmc->suspend_mode = TEGRA_SUSPEND_NONE; in tegra_pmc_parse_dt()
1846 pmc->cpu_off_time = value; in tegra_pmc_parse_dt()
1850 pmc->suspend_mode = TEGRA_SUSPEND_NONE; in tegra_pmc_parse_dt()
1852 pmc->core_osc_time = values[0]; in tegra_pmc_parse_dt()
1853 pmc->core_pmu_time = values[1]; in tegra_pmc_parse_dt()
1856 pmc->suspend_mode = TEGRA_SUSPEND_NONE; in tegra_pmc_parse_dt()
1858 pmc->core_off_time = value; in tegra_pmc_parse_dt()
1860 pmc->corereq_high = of_property_read_bool(np, in tegra_pmc_parse_dt()
1863 pmc->sysclkreq_high = of_property_read_bool(np, in tegra_pmc_parse_dt()
1866 pmc->combined_req = of_property_read_bool(np, in tegra_pmc_parse_dt()
1869 pmc->cpu_pwr_good_en = of_property_read_bool(np, in tegra_pmc_parse_dt()
1874 if (pmc->suspend_mode == TEGRA_SUSPEND_LP0) in tegra_pmc_parse_dt()
1875 pmc->suspend_mode = TEGRA_SUSPEND_LP1; in tegra_pmc_parse_dt()
1877 pmc->lp0_vec_phys = values[0]; in tegra_pmc_parse_dt()
1878 pmc->lp0_vec_size = values[1]; in tegra_pmc_parse_dt()
1883 static void tegra_pmc_init(struct tegra_pmc *pmc) in tegra_pmc_init() argument
1885 if (pmc->soc->init) in tegra_pmc_init()
1886 pmc->soc->init(pmc); in tegra_pmc_init()
1889 static void tegra_pmc_init_tsense_reset(struct tegra_pmc *pmc) in tegra_pmc_init_tsense_reset() argument
1893 struct device *dev = pmc->dev; in tegra_pmc_init_tsense_reset()
1897 if (!pmc->soc->has_tsense_reset) in tegra_pmc_init_tsense_reset()
1900 np = of_get_child_by_name(pmc->dev->of_node, "i2c-thermtrip"); in tegra_pmc_init_tsense_reset()
1929 value = tegra_pmc_readl(pmc, PMC_SENSOR_CTRL); in tegra_pmc_init_tsense_reset()
1931 tegra_pmc_writel(pmc, value, PMC_SENSOR_CTRL); in tegra_pmc_init_tsense_reset()
1935 tegra_pmc_writel(pmc, value, PMC_SCRATCH54); in tegra_pmc_init_tsense_reset()
1953 tegra_pmc_writel(pmc, value, PMC_SCRATCH55); in tegra_pmc_init_tsense_reset()
1955 value = tegra_pmc_readl(pmc, PMC_SENSOR_CTRL); in tegra_pmc_init_tsense_reset()
1957 tegra_pmc_writel(pmc, value, PMC_SENSOR_CTRL); in tegra_pmc_init_tsense_reset()
1959 dev_info(pmc->dev, "emergency thermal reset enabled\n"); in tegra_pmc_init_tsense_reset()
1967 struct tegra_pmc *pmc = pinctrl_dev_get_drvdata(pctl_dev); in tegra_io_pad_pinctrl_get_groups_count() local
1969 return pmc->soc->num_io_pads; in tegra_io_pad_pinctrl_get_groups_count()
1975 struct tegra_pmc *pmc = pinctrl_dev_get_drvdata(pctl); in tegra_io_pad_pinctrl_get_group_name() local
1977 return pmc->soc->io_pads[group].name; in tegra_io_pad_pinctrl_get_group_name()
1985 struct tegra_pmc *pmc = pinctrl_dev_get_drvdata(pctl_dev); in tegra_io_pad_pinctrl_get_group_pins() local
1987 *pins = &pmc->soc->io_pads[group].id; in tegra_io_pad_pinctrl_get_group_pins()
2005 struct tegra_pmc *pmc = pinctrl_dev_get_drvdata(pctl_dev); in tegra_io_pad_pinconf_get() local
2010 pad = tegra_io_pad_find(pmc, pin); in tegra_io_pad_pinconf_get()
2016 ret = tegra_io_pad_get_voltage(pmc, pad->id); in tegra_io_pad_pinconf_get()
2024 ret = tegra_io_pad_is_powered(pmc, pad->id); in tegra_io_pad_pinconf_get()
2044 struct tegra_pmc *pmc = pinctrl_dev_get_drvdata(pctl_dev); in tegra_io_pad_pinconf_set() local
2051 pad = tegra_io_pad_find(pmc, pin); in tegra_io_pad_pinconf_set()
2072 err = tegra_io_pad_set_voltage(pmc, pad->id, arg); in tegra_io_pad_pinconf_set()
2095 static int tegra_pmc_pinctrl_init(struct tegra_pmc *pmc) in tegra_pmc_pinctrl_init() argument
2099 if (!pmc->soc->num_pin_descs) in tegra_pmc_pinctrl_init()
2102 tegra_pmc_pctl_desc.name = dev_name(pmc->dev); in tegra_pmc_pinctrl_init()
2103 tegra_pmc_pctl_desc.pins = pmc->soc->pin_descs; in tegra_pmc_pinctrl_init()
2104 tegra_pmc_pctl_desc.npins = pmc->soc->num_pin_descs; in tegra_pmc_pinctrl_init()
2106 pmc->pctl_dev = devm_pinctrl_register(pmc->dev, &tegra_pmc_pctl_desc, in tegra_pmc_pinctrl_init()
2107 pmc); in tegra_pmc_pinctrl_init()
2108 if (IS_ERR(pmc->pctl_dev)) { in tegra_pmc_pinctrl_init()
2109 err = PTR_ERR(pmc->pctl_dev); in tegra_pmc_pinctrl_init()
2110 dev_err(pmc->dev, "failed to register pin controller: %d\n", in tegra_pmc_pinctrl_init()
2123 value = tegra_pmc_readl(pmc, pmc->soc->regs->rst_status); in reset_reason_show()
2124 value &= pmc->soc->regs->rst_source_mask; in reset_reason_show()
2125 value >>= pmc->soc->regs->rst_source_shift; in reset_reason_show()
2127 if (WARN_ON(value >= pmc->soc->num_reset_sources)) in reset_reason_show()
2130 return sprintf(buf, "%s\n", pmc->soc->reset_sources[value]); in reset_reason_show()
2140 value = tegra_pmc_readl(pmc, pmc->soc->regs->rst_status); in reset_level_show()
2141 value &= pmc->soc->regs->rst_level_mask; in reset_level_show()
2142 value >>= pmc->soc->regs->rst_level_shift; in reset_level_show()
2144 if (WARN_ON(value >= pmc->soc->num_reset_levels)) in reset_level_show()
2147 return sprintf(buf, "%s\n", pmc->soc->reset_levels[value]); in reset_level_show()
2152 static void tegra_pmc_reset_sysfs_init(struct tegra_pmc *pmc) in tegra_pmc_reset_sysfs_init() argument
2154 struct device *dev = pmc->dev; in tegra_pmc_reset_sysfs_init()
2157 if (pmc->soc->reset_sources) { in tegra_pmc_reset_sysfs_init()
2165 if (pmc->soc->reset_levels) { in tegra_pmc_reset_sysfs_init()
2191 struct tegra_pmc *pmc = domain->host_data; in tegra_pmc_irq_alloc() local
2192 const struct tegra_pmc_soc *soc = pmc->soc; in tegra_pmc_irq_alloc()
2211 &pmc->irq, pmc); in tegra_pmc_irq_alloc()
2215 spec.fwnode = &pmc->dev->of_node->fwnode; in tegra_pmc_irq_alloc()
2234 &pmc->irq, pmc); in tegra_pmc_irq_alloc()
2236 /* GPIO hierarchies stop at the PMC level */ in tegra_pmc_irq_alloc()
2244 /* If there is no wake-up event, there is no PMC mapping */ in tegra_pmc_irq_alloc()
2258 struct tegra_pmc *pmc = irq_data_get_irq_chip_data(data); in tegra210_pmc_irq_set_wake() local
2266 tegra_pmc_writel(pmc, 0, PMC_SW_WAKE_STATUS); in tegra210_pmc_irq_set_wake()
2267 tegra_pmc_writel(pmc, 0, PMC_SW_WAKE2_STATUS); in tegra210_pmc_irq_set_wake()
2269 tegra_pmc_writel(pmc, 0, PMC_WAKE_STATUS); in tegra210_pmc_irq_set_wake()
2270 tegra_pmc_writel(pmc, 0, PMC_WAKE2_STATUS); in tegra210_pmc_irq_set_wake()
2272 /* enable PMC wake */ in tegra210_pmc_irq_set_wake()
2278 value = tegra_pmc_readl(pmc, offset); in tegra210_pmc_irq_set_wake()
2285 tegra_pmc_writel(pmc, value, offset); in tegra210_pmc_irq_set_wake()
2292 struct tegra_pmc *pmc = irq_data_get_irq_chip_data(data); in tegra210_pmc_irq_set_type() local
2304 value = tegra_pmc_readl(pmc, offset); in tegra210_pmc_irq_set_type()
2325 tegra_pmc_writel(pmc, value, offset); in tegra210_pmc_irq_set_type()
2332 struct tegra_pmc *pmc = irq_data_get_irq_chip_data(data); in tegra186_pmc_irq_set_wake() local
2340 writel(0x1, pmc->wake + WAKE_AOWAKE_STATUS_W(data->hwirq)); in tegra186_pmc_irq_set_wake()
2343 value = readl(pmc->wake + WAKE_AOWAKE_TIER2_ROUTING(offset)); in tegra186_pmc_irq_set_wake()
2350 writel(value, pmc->wake + WAKE_AOWAKE_TIER2_ROUTING(offset)); in tegra186_pmc_irq_set_wake()
2353 writel(!!on, pmc->wake + WAKE_AOWAKE_MASK_W(data->hwirq)); in tegra186_pmc_irq_set_wake()
2360 struct tegra_pmc *pmc = irq_data_get_irq_chip_data(data); in tegra186_pmc_irq_set_type() local
2363 value = readl(pmc->wake + WAKE_AOWAKE_CNTRL(data->hwirq)); in tegra186_pmc_irq_set_type()
2384 writel(value, pmc->wake + WAKE_AOWAKE_CNTRL(data->hwirq)); in tegra186_pmc_irq_set_type()
2417 static int tegra_pmc_irq_init(struct tegra_pmc *pmc) in tegra_pmc_irq_init() argument
2422 np = of_irq_find_parent(pmc->dev->of_node); in tegra_pmc_irq_init()
2431 pmc->irq.name = dev_name(pmc->dev); in tegra_pmc_irq_init()
2432 pmc->irq.irq_mask = tegra_irq_mask_parent; in tegra_pmc_irq_init()
2433 pmc->irq.irq_unmask = tegra_irq_unmask_parent; in tegra_pmc_irq_init()
2434 pmc->irq.irq_eoi = tegra_irq_eoi_parent; in tegra_pmc_irq_init()
2435 pmc->irq.irq_set_affinity = tegra_irq_set_affinity_parent; in tegra_pmc_irq_init()
2436 pmc->irq.irq_set_type = pmc->soc->irq_set_type; in tegra_pmc_irq_init()
2437 pmc->irq.irq_set_wake = pmc->soc->irq_set_wake; in tegra_pmc_irq_init()
2439 pmc->domain = irq_domain_add_hierarchy(parent, 0, 96, pmc->dev->of_node, in tegra_pmc_irq_init()
2440 &tegra_pmc_irq_domain_ops, pmc); in tegra_pmc_irq_init()
2441 if (!pmc->domain) { in tegra_pmc_irq_init()
2442 dev_err(pmc->dev, "failed to allocate domain\n"); in tegra_pmc_irq_init()
2452 struct tegra_pmc *pmc = container_of(nb, struct tegra_pmc, clk_nb); in tegra_pmc_clk_notify_cb() local
2457 mutex_lock(&pmc->powergates_lock); in tegra_pmc_clk_notify_cb()
2461 pmc->rate = data->new_rate; in tegra_pmc_clk_notify_cb()
2465 mutex_unlock(&pmc->powergates_lock); in tegra_pmc_clk_notify_cb()
2478 tegra_pmc_readl(pmc, offset); in pmc_clk_fence_udelay()
2479 /* pmc clk propagation delay 2 us */ in pmc_clk_fence_udelay()
2488 val = tegra_pmc_readl(pmc, clk->offs) >> clk->mux_shift; in pmc_clk_mux_get_parent()
2499 val = tegra_pmc_readl(pmc, clk->offs); in pmc_clk_mux_set_parent()
2502 tegra_pmc_writel(pmc, val, clk->offs); in pmc_clk_mux_set_parent()
2513 val = tegra_pmc_readl(pmc, clk->offs) & BIT(clk->force_en_shift); in pmc_clk_is_enabled()
2522 val = tegra_pmc_readl(pmc, offs); in pmc_clk_set_state()
2524 tegra_pmc_writel(pmc, val, offs); in pmc_clk_set_state()
2554 tegra_pmc_clk_out_register(struct tegra_pmc *pmc, in tegra_pmc_clk_out_register() argument
2561 pmc_clk = devm_kzalloc(pmc->dev, sizeof(*pmc_clk), GFP_KERNEL); in tegra_pmc_clk_out_register()
2584 return tegra_pmc_readl(pmc, gate->offs) & BIT(gate->shift) ? 1 : 0; in pmc_clk_gate_is_enabled()
2610 tegra_pmc_clk_gate_register(struct tegra_pmc *pmc, const char *name, in tegra_pmc_clk_gate_register() argument
2617 gate = devm_kzalloc(pmc->dev, sizeof(*gate), GFP_KERNEL); in tegra_pmc_clk_gate_register()
2634 static void tegra_pmc_clock_register(struct tegra_pmc *pmc, in tegra_pmc_clock_register() argument
2642 num_clks = pmc->soc->num_pmc_clks; in tegra_pmc_clock_register()
2643 if (pmc->soc->has_blink_output) in tegra_pmc_clock_register()
2649 clk_data = devm_kmalloc(pmc->dev, sizeof(*clk_data), GFP_KERNEL); in tegra_pmc_clock_register()
2653 clk_data->clks = devm_kcalloc(pmc->dev, TEGRA_PMC_CLK_MAX, in tegra_pmc_clock_register()
2663 for (i = 0; i < pmc->soc->num_pmc_clks; i++) { in tegra_pmc_clock_register()
2666 data = pmc->soc->pmc_clks_data + i; in tegra_pmc_clock_register()
2668 clk = tegra_pmc_clk_out_register(pmc, data, PMC_CLK_OUT_CNTRL); in tegra_pmc_clock_register()
2670 dev_warn(pmc->dev, "unable to register clock %s: %d\n", in tegra_pmc_clock_register()
2677 dev_warn(pmc->dev, in tegra_pmc_clock_register()
2686 if (pmc->soc->has_blink_output) { in tegra_pmc_clock_register()
2687 tegra_pmc_writel(pmc, 0x0, PMC_BLINK_TIMER); in tegra_pmc_clock_register()
2688 clk = tegra_pmc_clk_gate_register(pmc, in tegra_pmc_clock_register()
2694 dev_warn(pmc->dev, in tegra_pmc_clock_register()
2700 clk = tegra_pmc_clk_gate_register(pmc, "pmc_blink", in tegra_pmc_clock_register()
2705 dev_warn(pmc->dev, in tegra_pmc_clock_register()
2713 dev_warn(pmc->dev, in tegra_pmc_clock_register()
2724 dev_warn(pmc->dev, "failed to add pmc clock provider: %d\n", in tegra_pmc_clock_register()
2746 struct tegra_pmc *pmc = context; in tegra_pmc_regmap_readl() local
2748 *value = tegra_pmc_readl(pmc, offset); in tegra_pmc_regmap_readl()
2754 struct tegra_pmc *pmc = context; in tegra_pmc_regmap_writel() local
2756 tegra_pmc_writel(pmc, value, offset); in tegra_pmc_regmap_writel()
2772 static int tegra_pmc_regmap_init(struct tegra_pmc *pmc) in tegra_pmc_regmap_init() argument
2777 if (pmc->soc->has_usb_sleepwalk) { in tegra_pmc_regmap_init()
2778 regmap = devm_regmap_init(pmc->dev, NULL, pmc, &usb_sleepwalk_regmap_config); in tegra_pmc_regmap_init()
2781 dev_err(pmc->dev, "failed to allocate register map (%d)\n", err); in tegra_pmc_regmap_init()
2791 pmc->suspend_mode = TEGRA_SUSPEND_NOT_READY; in tegra_pmc_reset_suspend_mode()
2805 if (WARN_ON(!pmc->base || !pmc->soc)) in tegra_pmc_probe()
2808 err = tegra_pmc_parse_dt(pmc, pdev->dev.of_node); in tegra_pmc_probe()
2825 pmc->wake = devm_ioremap_resource(&pdev->dev, res); in tegra_pmc_probe()
2826 if (IS_ERR(pmc->wake)) in tegra_pmc_probe()
2827 return PTR_ERR(pmc->wake); in tegra_pmc_probe()
2829 pmc->wake = base; in tegra_pmc_probe()
2834 pmc->aotag = devm_ioremap_resource(&pdev->dev, res); in tegra_pmc_probe()
2835 if (IS_ERR(pmc->aotag)) in tegra_pmc_probe()
2836 return PTR_ERR(pmc->aotag); in tegra_pmc_probe()
2838 pmc->aotag = base; in tegra_pmc_probe()
2843 pmc->scratch = devm_ioremap_resource(&pdev->dev, res); in tegra_pmc_probe()
2844 if (IS_ERR(pmc->scratch)) in tegra_pmc_probe()
2845 return PTR_ERR(pmc->scratch); in tegra_pmc_probe()
2847 pmc->scratch = base; in tegra_pmc_probe()
2850 pmc->clk = devm_clk_get(&pdev->dev, "pclk"); in tegra_pmc_probe()
2851 if (IS_ERR(pmc->clk)) { in tegra_pmc_probe()
2852 err = PTR_ERR(pmc->clk); in tegra_pmc_probe()
2859 pmc->clk = NULL; in tegra_pmc_probe()
2867 if (pmc->clk) { in tegra_pmc_probe()
2868 pmc->clk_nb.notifier_call = tegra_pmc_clk_notify_cb; in tegra_pmc_probe()
2869 err = clk_notifier_register(pmc->clk, &pmc->clk_nb); in tegra_pmc_probe()
2876 pmc->rate = clk_get_rate(pmc->clk); in tegra_pmc_probe()
2879 pmc->dev = &pdev->dev; in tegra_pmc_probe()
2881 tegra_pmc_init(pmc); in tegra_pmc_probe()
2883 tegra_pmc_init_tsense_reset(pmc); in tegra_pmc_probe()
2885 tegra_pmc_reset_sysfs_init(pmc); in tegra_pmc_probe()
2900 err = tegra_pmc_pinctrl_init(pmc); in tegra_pmc_probe()
2904 err = tegra_pmc_regmap_init(pmc); in tegra_pmc_probe()
2908 err = tegra_powergate_init(pmc, pdev->dev.of_node); in tegra_pmc_probe()
2912 err = tegra_pmc_irq_init(pmc); in tegra_pmc_probe()
2916 mutex_lock(&pmc->powergates_lock); in tegra_pmc_probe()
2917 iounmap(pmc->base); in tegra_pmc_probe()
2918 pmc->base = base; in tegra_pmc_probe()
2919 mutex_unlock(&pmc->powergates_lock); in tegra_pmc_probe()
2921 tegra_pmc_clock_register(pmc, pdev->dev.of_node); in tegra_pmc_probe()
2922 platform_set_drvdata(pdev, pmc); in tegra_pmc_probe()
2932 debugfs_remove(pmc->debugfs); in tegra_pmc_probe()
2936 clk_notifier_unregister(pmc->clk, &pmc->clk_nb); in tegra_pmc_probe()
2944 struct tegra_pmc *pmc = dev_get_drvdata(dev); in tegra_pmc_suspend() local
2946 tegra_pmc_writel(pmc, virt_to_phys(tegra_resume), PMC_SCRATCH41); in tegra_pmc_suspend()
2953 struct tegra_pmc *pmc = dev_get_drvdata(dev); in tegra_pmc_resume() local
2955 tegra_pmc_writel(pmc, 0x0, PMC_SCRATCH41); in tegra_pmc_resume()
2987 static void tegra20_pmc_init(struct tegra_pmc *pmc) in tegra20_pmc_init() argument
2992 value = tegra_pmc_readl(pmc, PMC_CNTRL); in tegra20_pmc_init()
2994 tegra_pmc_writel(pmc, value, PMC_CNTRL); in tegra20_pmc_init()
2996 value = tegra_pmc_readl(pmc, PMC_CNTRL); in tegra20_pmc_init()
2998 if (pmc->sysclkreq_high) in tegra20_pmc_init()
3003 if (pmc->corereq_high) in tegra20_pmc_init()
3009 tegra_pmc_writel(pmc, value, PMC_CNTRL); in tegra20_pmc_init()
3012 value = tegra_pmc_readl(pmc, PMC_CNTRL); in tegra20_pmc_init()
3014 tegra_pmc_writel(pmc, value, PMC_CNTRL); in tegra20_pmc_init()
3017 if (pmc->suspend_mode != TEGRA_SUSPEND_NONE) { in tegra20_pmc_init()
3018 osc = DIV_ROUND_UP(pmc->core_osc_time * 8192, 1000000); in tegra20_pmc_init()
3019 pmu = DIV_ROUND_UP(pmc->core_pmu_time * 32768, 1000000); in tegra20_pmc_init()
3020 off = DIV_ROUND_UP(pmc->core_off_time * 32768, 1000000); in tegra20_pmc_init()
3021 tegra_pmc_writel(pmc, ((osc << 8) & 0xff00) | (pmu & 0xff), in tegra20_pmc_init()
3023 tegra_pmc_writel(pmc, off, PMC_COREPWROFF_TIMER); in tegra20_pmc_init()
3027 static void tegra20_pmc_setup_irq_polarity(struct tegra_pmc *pmc, in tegra20_pmc_setup_irq_polarity() argument
3033 value = tegra_pmc_readl(pmc, PMC_CNTRL); in tegra20_pmc_setup_irq_polarity()
3040 tegra_pmc_writel(pmc, value, PMC_CNTRL); in tegra20_pmc_setup_irq_polarity()
3494 static void tegra186_pmc_setup_irq_polarity(struct tegra_pmc *pmc, in tegra186_pmc_setup_irq_polarity() argument
3505 dev_err(pmc->dev, "failed to find PMC wake registers\n"); in tegra186_pmc_setup_irq_polarity()
3513 dev_err(pmc->dev, "failed to map PMC wake registers\n"); in tegra186_pmc_setup_irq_polarity()
3790 { .compatible = "nvidia,tegra234-pmc", .data = &tegra234_pmc_soc },
3791 { .compatible = "nvidia,tegra194-pmc", .data = &tegra194_pmc_soc },
3792 { .compatible = "nvidia,tegra186-pmc", .data = &tegra186_pmc_soc },
3793 { .compatible = "nvidia,tegra210-pmc", .data = &tegra210_pmc_soc },
3794 { .compatible = "nvidia,tegra132-pmc", .data = &tegra124_pmc_soc },
3795 { .compatible = "nvidia,tegra124-pmc", .data = &tegra124_pmc_soc },
3796 { .compatible = "nvidia,tegra114-pmc", .data = &tegra114_pmc_soc },
3797 { .compatible = "nvidia,tegra30-pmc", .data = &tegra30_pmc_soc },
3798 { .compatible = "nvidia,tegra20-pmc", .data = &tegra20_pmc_soc },
3811 if (!pmc->core_domain_registered) in tegra_pmc_sync_state()
3814 pmc->core_domain_state_synced = true; in tegra_pmc_sync_state()
3817 mutex_lock(&pmc->powergates_lock); in tegra_pmc_sync_state()
3819 mutex_unlock(&pmc->powergates_lock); in tegra_pmc_sync_state()
3827 .name = "tegra-pmc",
3839 static bool __init tegra_pmc_detect_tz_only(struct tegra_pmc *pmc) in tegra_pmc_detect_tz_only() argument
3843 saved = readl(pmc->base + pmc->soc->regs->scratch0); in tegra_pmc_detect_tz_only()
3850 writel(value, pmc->base + pmc->soc->regs->scratch0); in tegra_pmc_detect_tz_only()
3851 value = readl(pmc->base + pmc->soc->regs->scratch0); in tegra_pmc_detect_tz_only()
3855 pr_info("access to PMC is restricted to TZ\n"); in tegra_pmc_detect_tz_only()
3860 writel(saved, pmc->base + pmc->soc->regs->scratch0); in tegra_pmc_detect_tz_only()
3877 mutex_init(&pmc->powergates_lock); in tegra_pmc_early_init()
3884 * a PMC node. in tegra_pmc_early_init()
3887 * that didn't contain a PMC node. Note that in this case the in tegra_pmc_early_init()
3912 pr_err("failed to get PMC registers\n"); in tegra_pmc_early_init()
3918 pmc->base = ioremap(regs.start, resource_size(®s)); in tegra_pmc_early_init()
3919 if (!pmc->base) { in tegra_pmc_early_init()
3920 pr_err("failed to map PMC registers\n"); in tegra_pmc_early_init()
3926 pmc->soc = match->data; in tegra_pmc_early_init()
3928 if (pmc->soc->maybe_tz_only) in tegra_pmc_early_init()
3929 pmc->tz_only = tegra_pmc_detect_tz_only(pmc); in tegra_pmc_early_init()
3932 for (i = 0; i < pmc->soc->num_powergates; i++) in tegra_pmc_early_init()
3933 if (pmc->soc->powergates[i]) in tegra_pmc_early_init()
3934 set_bit(i, pmc->powergates_available); in tegra_pmc_early_init()
3937 * Invert the interrupt polarity if a PMC device tree node in tegra_pmc_early_init()
3942 pmc->soc->setup_irq_polarity(pmc, np, invert); in tegra_pmc_early_init()