Lines Matching full:pd
50 struct meson_gx_pwrc_vpu *pd = genpd_to_pd(genpd); in meson_gx_pwrc_vpu_power_off() local
53 regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, in meson_gx_pwrc_vpu_power_off()
59 regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG0, in meson_gx_pwrc_vpu_power_off()
64 regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG1, in meson_gx_pwrc_vpu_power_off()
69 regmap_update_bits(pd->regmap_hhi, HHI_MEM_PD_REG0, in meson_gx_pwrc_vpu_power_off()
75 regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, in meson_gx_pwrc_vpu_power_off()
80 clk_disable_unprepare(pd->vpu_clk); in meson_gx_pwrc_vpu_power_off()
81 clk_disable_unprepare(pd->vapb_clk); in meson_gx_pwrc_vpu_power_off()
88 struct meson_gx_pwrc_vpu *pd = genpd_to_pd(genpd); in meson_g12a_pwrc_vpu_power_off() local
91 regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, in meson_g12a_pwrc_vpu_power_off()
97 regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG0, in meson_g12a_pwrc_vpu_power_off()
102 regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG1, in meson_g12a_pwrc_vpu_power_off()
107 regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG2, in meson_g12a_pwrc_vpu_power_off()
112 regmap_update_bits(pd->regmap_hhi, HHI_MEM_PD_REG0, in meson_g12a_pwrc_vpu_power_off()
118 regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, in meson_g12a_pwrc_vpu_power_off()
123 clk_disable_unprepare(pd->vpu_clk); in meson_g12a_pwrc_vpu_power_off()
124 clk_disable_unprepare(pd->vapb_clk); in meson_g12a_pwrc_vpu_power_off()
129 static int meson_gx_pwrc_vpu_setup_clk(struct meson_gx_pwrc_vpu *pd) in meson_gx_pwrc_vpu_setup_clk() argument
133 ret = clk_prepare_enable(pd->vpu_clk); in meson_gx_pwrc_vpu_setup_clk()
137 ret = clk_prepare_enable(pd->vapb_clk); in meson_gx_pwrc_vpu_setup_clk()
139 clk_disable_unprepare(pd->vpu_clk); in meson_gx_pwrc_vpu_setup_clk()
146 struct meson_gx_pwrc_vpu *pd = genpd_to_pd(genpd); in meson_gx_pwrc_vpu_power_on() local
150 regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, in meson_gx_pwrc_vpu_power_on()
156 regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG0, in meson_gx_pwrc_vpu_power_on()
162 regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG1, in meson_gx_pwrc_vpu_power_on()
168 regmap_update_bits(pd->regmap_hhi, HHI_MEM_PD_REG0, in meson_gx_pwrc_vpu_power_on()
174 ret = reset_control_assert(pd->rstc); in meson_gx_pwrc_vpu_power_on()
178 regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, in meson_gx_pwrc_vpu_power_on()
181 ret = reset_control_deassert(pd->rstc); in meson_gx_pwrc_vpu_power_on()
185 ret = meson_gx_pwrc_vpu_setup_clk(pd); in meson_gx_pwrc_vpu_power_on()
194 struct meson_gx_pwrc_vpu *pd = genpd_to_pd(genpd); in meson_g12a_pwrc_vpu_power_on() local
198 regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, in meson_g12a_pwrc_vpu_power_on()
204 regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG0, in meson_g12a_pwrc_vpu_power_on()
210 regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG1, in meson_g12a_pwrc_vpu_power_on()
216 regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG2, in meson_g12a_pwrc_vpu_power_on()
222 regmap_update_bits(pd->regmap_hhi, HHI_MEM_PD_REG0, in meson_g12a_pwrc_vpu_power_on()
228 ret = reset_control_assert(pd->rstc); in meson_g12a_pwrc_vpu_power_on()
232 regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, in meson_g12a_pwrc_vpu_power_on()
235 ret = reset_control_deassert(pd->rstc); in meson_g12a_pwrc_vpu_power_on()
239 ret = meson_gx_pwrc_vpu_setup_clk(pd); in meson_g12a_pwrc_vpu_power_on()
246 static bool meson_gx_pwrc_vpu_get_power(struct meson_gx_pwrc_vpu *pd) in meson_gx_pwrc_vpu_get_power() argument
250 regmap_read(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, ®); in meson_gx_pwrc_vpu_get_power()