Lines Matching +full:0 +full:x144

15 #define REG_UFS_REFCLK_CTRL         0x144
16 #define REG_UFS_EXTREG              0x2100
17 #define REG_UFS_MPHYCTRL            0x2200
18 #define REG_UFS_REJECT_MON          0x22AC
19 #define REG_UFS_DEBUG_SEL           0x22C0
20 #define REG_UFS_PROBE               0x22C8
27 #define REFCLK_RELEASE              0x0
28 #define REFCLK_REQUEST              BIT(0)
36 #define VS_DEBUGCLOCKENABLE         0xD0A1
37 #define VS_SAVEPOWERCONTROL         0xD0A6
38 #define VS_UNIPROPOWERDOWNCONTROL   0xD0A8
44 	VS_LINK_DISABLED            = 0,
55 #define MTK_SIP_UFS_CONTROL               MTK_SIP_SMC_CMD(0x276)
56 #define UFS_MTK_SIP_VA09_PWR_CTRL         BIT(0)
72 	RX_SYMBOL_CLK_GATE_EN   = 0,
81 	UFS_MTK_CAP_BOOST_CRYPT_ENGINE         = 1 << 0,