1 // SPDX-License-Identifier: GPL-2.0-only
3  * Reset driver for NXP LPC18xx/43xx Reset Generation Unit (RGU).
9 #include <linux/delay.h>
16 #include <linux/reset-controller.h>
27 /* Internal reset outputs */
50 	writel(BIT(LPC18XX_RGU_CORE_RST), rc->base + LPC18XX_RGU_CTRL0);  in lpc18xx_rgu_restart()
59  * The LPC18xx RGU has mostly self-deasserting resets except for the
60  * two reset lines going to the internal Cortex-M0 cores.
79 	spin_lock_irqsave(&rc->lock, flags);  in lpc18xx_rgu_setclear_reset()
80 	stat = ~readl(rc->base + stat_offset);  in lpc18xx_rgu_setclear_reset()
82 		writel(stat | rst_bit, rc->base + ctrl_offset);  in lpc18xx_rgu_setclear_reset()
84 		writel(stat & ~rst_bit, rc->base + ctrl_offset);  in lpc18xx_rgu_setclear_reset()
85 	spin_unlock_irqrestore(&rc->lock, flags);  in lpc18xx_rgu_setclear_reset()
102 /* Only M0 cores require explicit reset deassert */
109 	udelay(rc->delay_us);  in lpc18xx_rgu_reset()
129 	return !(readl(rc->base + offset) & bit);  in lpc18xx_rgu_status()
133 	.reset		= lpc18xx_rgu_reset,
146 	rc = devm_kzalloc(&pdev->dev, sizeof(*rc), GFP_KERNEL);  in lpc18xx_rgu_probe()
148 		return -ENOMEM;  in lpc18xx_rgu_probe()
151 	rc->base = devm_ioremap_resource(&pdev->dev, res);  in lpc18xx_rgu_probe()
152 	if (IS_ERR(rc->base))  in lpc18xx_rgu_probe()
153 		return PTR_ERR(rc->base);  in lpc18xx_rgu_probe()
155 	rc->clk_reg = devm_clk_get(&pdev->dev, "reg");  in lpc18xx_rgu_probe()
156 	if (IS_ERR(rc->clk_reg)) {  in lpc18xx_rgu_probe()
157 		dev_err(&pdev->dev, "reg clock not found\n");  in lpc18xx_rgu_probe()
158 		return PTR_ERR(rc->clk_reg);  in lpc18xx_rgu_probe()
161 	rc->clk_delay = devm_clk_get(&pdev->dev, "delay");  in lpc18xx_rgu_probe()
162 	if (IS_ERR(rc->clk_delay)) {  in lpc18xx_rgu_probe()
163 		dev_err(&pdev->dev, "delay clock not found\n");  in lpc18xx_rgu_probe()
164 		return PTR_ERR(rc->clk_delay);  in lpc18xx_rgu_probe()
167 	ret = clk_prepare_enable(rc->clk_reg);  in lpc18xx_rgu_probe()
169 		dev_err(&pdev->dev, "unable to enable reg clock\n");  in lpc18xx_rgu_probe()
173 	ret = clk_prepare_enable(rc->clk_delay);  in lpc18xx_rgu_probe()
175 		dev_err(&pdev->dev, "unable to enable delay clock\n");  in lpc18xx_rgu_probe()
179 	fcclk = clk_get_rate(rc->clk_reg) / USEC_PER_SEC;  in lpc18xx_rgu_probe()
180 	firc = clk_get_rate(rc->clk_delay) / USEC_PER_SEC;  in lpc18xx_rgu_probe()
182 		rc->delay_us = 2;  in lpc18xx_rgu_probe()
184 		rc->delay_us = DIV_ROUND_UP(fcclk, firc * firc);  in lpc18xx_rgu_probe()
186 	spin_lock_init(&rc->lock);  in lpc18xx_rgu_probe()
188 	rc->rcdev.owner = THIS_MODULE;  in lpc18xx_rgu_probe()
189 	rc->rcdev.nr_resets = 64;  in lpc18xx_rgu_probe()
190 	rc->rcdev.ops = &lpc18xx_rgu_ops;  in lpc18xx_rgu_probe()
191 	rc->rcdev.of_node = pdev->dev.of_node;  in lpc18xx_rgu_probe()
195 	ret = reset_controller_register(&rc->rcdev);  in lpc18xx_rgu_probe()
197 		dev_err(&pdev->dev, "unable to register device\n");  in lpc18xx_rgu_probe()
201 	rc->restart_nb.priority = 192,  in lpc18xx_rgu_probe()
202 	rc->restart_nb.notifier_call = lpc18xx_rgu_restart,  in lpc18xx_rgu_probe()
203 	ret = register_restart_handler(&rc->restart_nb);  in lpc18xx_rgu_probe()
205 		dev_warn(&pdev->dev, "failed to register restart handler\n");  in lpc18xx_rgu_probe()
210 	clk_disable_unprepare(rc->clk_delay);  in lpc18xx_rgu_probe()
212 	clk_disable_unprepare(rc->clk_reg);  in lpc18xx_rgu_probe()
218 	{ .compatible = "nxp,lpc1850-rgu" },
225 		.name			= "lpc18xx-reset",