Lines Matching +full:device +full:- +full:sram
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2017-2020 Texas Instruments Incorporated - https://www.ti.com/
6 * Suman Anna <s-anna@ti.com>
9 #include <linux/dma-mapping.h>
18 #include <linux/omap-mailbox.h>
32 /* R5 TI-SCI Processor Configuration Flags */
46 /* R5 TI-SCI Processor Control Flags */
49 /* R5 TI-SCI Processor Status Flags */
58 * struct k3_r5_mem - internal memory structure
61 * @dev_addr: Device address from remoteproc view
76 * Single-CPU mode : AM64x SoCs only
85 * struct k3_r5_soc_data - match data to handle SoC variations
87 * @tcm_ecc_autoinit: flag to denote the auto-initialization of TCMs for ECC
88 * @single_cpu_mode: flag to denote if SoC/IP supports Single-CPU mode
97 * struct k3_r5_cluster - K3 R5F Cluster structure
98 * @dev: cached device pointer
99 * @mode: Mode to configure the Cluster - Split or LockStep
101 * @soc_data: SoC-specific feature data for a R5FSS
104 struct device *dev;
111 * struct k3_r5_core - K3 R5 core structure
113 * @dev: cached device pointer
116 * @sram: on-chip SRAM memory regions data
118 * @num_sram: number of on-chip SRAM memory regions
120 * @tsp: TI-SCI processor control handle
121 * @ti_sci: TI-SCI handle
122 * @ti_sci_id: TI-SCI device identifier
125 * @loczrama: flag to dictate which TCM is at device address 0x0
129 struct device *dev;
132 struct k3_r5_mem *sram; member
145 * struct k3_r5_rproc - K3 remote processor state
146 * @dev: cached device pointer
156 struct device *dev;
167 * k3_r5_rproc_mbox_callback() - inbound mailbox message handler
176 * In addition to virtqueue indices, we also have some out-of-band values
184 struct device *dev = kproc->rproc->dev.parent; in k3_r5_rproc_mbox_callback()
185 const char *name = kproc->rproc->name; in k3_r5_rproc_mbox_callback()
205 if (msg > kproc->rproc->max_notifyid) { in k3_r5_rproc_mbox_callback()
210 if (rproc_vq_interrupt(kproc->rproc, msg) == IRQ_NONE) in k3_r5_rproc_mbox_callback()
218 struct k3_r5_rproc *kproc = rproc->priv; in k3_r5_rproc_kick()
219 struct device *dev = rproc->dev.parent; in k3_r5_rproc_kick()
224 ret = mbox_send_message(kproc->mbox, (void *)msg); in k3_r5_rproc_kick()
234 ret = reset_control_assert(core->reset); in k3_r5_split_reset()
236 dev_err(core->dev, "local-reset assert failed, ret = %d\n", in k3_r5_split_reset()
241 ret = core->ti_sci->ops.dev_ops.put_device(core->ti_sci, in k3_r5_split_reset()
242 core->ti_sci_id); in k3_r5_split_reset()
244 dev_err(core->dev, "module-reset assert failed, ret = %d\n", in k3_r5_split_reset()
246 if (reset_control_deassert(core->reset)) in k3_r5_split_reset()
247 dev_warn(core->dev, "local-reset deassert back failed\n"); in k3_r5_split_reset()
257 ret = core->ti_sci->ops.dev_ops.get_device(core->ti_sci, in k3_r5_split_release()
258 core->ti_sci_id); in k3_r5_split_release()
260 dev_err(core->dev, "module-reset deassert failed, ret = %d\n", in k3_r5_split_release()
265 ret = reset_control_deassert(core->reset); in k3_r5_split_release()
267 dev_err(core->dev, "local-reset deassert failed, ret = %d\n", in k3_r5_split_release()
269 if (core->ti_sci->ops.dev_ops.put_device(core->ti_sci, in k3_r5_split_release()
270 core->ti_sci_id)) in k3_r5_split_release()
271 dev_warn(core->dev, "module-reset assert back failed\n"); in k3_r5_split_release()
283 list_for_each_entry(core, &cluster->cores, elem) { in k3_r5_lockstep_reset()
284 ret = reset_control_assert(core->reset); in k3_r5_lockstep_reset()
286 dev_err(core->dev, "local-reset assert failed, ret = %d\n", in k3_r5_lockstep_reset()
294 list_for_each_entry(core, &cluster->cores, elem) { in k3_r5_lockstep_reset()
295 ret = core->ti_sci->ops.dev_ops.put_device(core->ti_sci, in k3_r5_lockstep_reset()
296 core->ti_sci_id); in k3_r5_lockstep_reset()
298 dev_err(core->dev, "module-reset assert failed, ret = %d\n", in k3_r5_lockstep_reset()
307 list_for_each_entry_continue_reverse(core, &cluster->cores, elem) { in k3_r5_lockstep_reset()
308 if (core->ti_sci->ops.dev_ops.put_device(core->ti_sci, in k3_r5_lockstep_reset()
309 core->ti_sci_id)) in k3_r5_lockstep_reset()
310 dev_warn(core->dev, "module-reset assert back failed\n"); in k3_r5_lockstep_reset()
312 core = list_last_entry(&cluster->cores, struct k3_r5_core, elem); in k3_r5_lockstep_reset()
314 list_for_each_entry_from_reverse(core, &cluster->cores, elem) { in k3_r5_lockstep_reset()
315 if (reset_control_deassert(core->reset)) in k3_r5_lockstep_reset()
316 dev_warn(core->dev, "local-reset deassert back failed\n"); in k3_r5_lockstep_reset()
328 list_for_each_entry_reverse(core, &cluster->cores, elem) { in k3_r5_lockstep_release()
329 ret = core->ti_sci->ops.dev_ops.get_device(core->ti_sci, in k3_r5_lockstep_release()
330 core->ti_sci_id); in k3_r5_lockstep_release()
332 dev_err(core->dev, "module-reset deassert failed, ret = %d\n", in k3_r5_lockstep_release()
340 list_for_each_entry_reverse(core, &cluster->cores, elem) { in k3_r5_lockstep_release()
341 ret = reset_control_deassert(core->reset); in k3_r5_lockstep_release()
343 dev_err(core->dev, "module-reset deassert failed, ret = %d\n", in k3_r5_lockstep_release()
352 list_for_each_entry_continue(core, &cluster->cores, elem) { in k3_r5_lockstep_release()
353 if (reset_control_assert(core->reset)) in k3_r5_lockstep_release()
354 dev_warn(core->dev, "local-reset assert back failed\n"); in k3_r5_lockstep_release()
356 core = list_first_entry(&cluster->cores, struct k3_r5_core, elem); in k3_r5_lockstep_release()
358 list_for_each_entry_from(core, &cluster->cores, elem) { in k3_r5_lockstep_release()
359 if (core->ti_sci->ops.dev_ops.put_device(core->ti_sci, in k3_r5_lockstep_release()
360 core->ti_sci_id)) in k3_r5_lockstep_release()
361 dev_warn(core->dev, "module-reset assert back failed\n"); in k3_r5_lockstep_release()
369 return ti_sci_proc_set_control(core->tsp, in k3_r5_core_halt()
375 return ti_sci_proc_set_control(core->tsp, in k3_r5_core_run()
381 * execution from DDR requires the initial boot-strapping code to be run
387 * The Single-CPU mode on applicable SoCs (eg: AM64x) only uses Core0 to
396 struct k3_r5_rproc *kproc = rproc->priv; in k3_r5_rproc_prepare()
397 struct k3_r5_cluster *cluster = kproc->cluster; in k3_r5_rproc_prepare()
398 struct k3_r5_core *core = kproc->core; in k3_r5_rproc_prepare()
399 struct device *dev = kproc->dev; in k3_r5_rproc_prepare()
405 ret = ti_sci_proc_get_status(core->tsp, &boot_vec, &cfg, &ctrl, &stat); in k3_r5_rproc_prepare()
410 /* Re-use LockStep-mode reset logic for Single-CPU mode */ in k3_r5_rproc_prepare()
411 ret = (cluster->mode == CLUSTER_MODE_LOCKSTEP || in k3_r5_rproc_prepare()
412 cluster->mode == CLUSTER_MODE_SINGLECPU) ? in k3_r5_rproc_prepare()
421 * Newer IP revisions like on J7200 SoCs support h/w auto-initialization in k3_r5_rproc_prepare()
424 * auto-init, but account for it in case it is disabled in k3_r5_rproc_prepare()
426 if (cluster->soc_data->tcm_ecc_autoinit && !mem_init_dis) { in k3_r5_rproc_prepare()
437 memset(core->mem[0].cpu_addr, 0x00, core->mem[0].size); in k3_r5_rproc_prepare()
440 memset(core->mem[1].cpu_addr, 0x00, core->mem[1].size); in k3_r5_rproc_prepare()
448 * resets on all applicable cores for the rproc device (depending on LockStep
454 * The Single-CPU mode on applicable SoCs (eg: AM64x) combines the TCMs from
456 * both cores, but with only Core0 unhalted. This function re-uses the same
462 struct k3_r5_rproc *kproc = rproc->priv; in k3_r5_rproc_unprepare()
463 struct k3_r5_cluster *cluster = kproc->cluster; in k3_r5_rproc_unprepare()
464 struct k3_r5_core *core = kproc->core; in k3_r5_rproc_unprepare()
465 struct device *dev = kproc->dev; in k3_r5_rproc_unprepare()
468 /* Re-use LockStep-mode reset logic for Single-CPU mode */ in k3_r5_rproc_unprepare()
469 ret = (cluster->mode == CLUSTER_MODE_LOCKSTEP || in k3_r5_rproc_unprepare()
470 cluster->mode == CLUSTER_MODE_SINGLECPU) ? in k3_r5_rproc_unprepare()
485 * unhalt both the cores to start the execution - Core1 needs to be unhalted
486 * first followed by Core0. The Split-mode requires that Core0 to be maintained
490 * The Single-CPU mode on applicable SoCs (eg: AM64x) only uses Core0 to execute
492 * flow as Split-mode for this.
496 struct k3_r5_rproc *kproc = rproc->priv; in k3_r5_rproc_start()
497 struct k3_r5_cluster *cluster = kproc->cluster; in k3_r5_rproc_start()
498 struct mbox_client *client = &kproc->client; in k3_r5_rproc_start()
499 struct device *dev = kproc->dev; in k3_r5_rproc_start()
504 client->dev = dev; in k3_r5_rproc_start()
505 client->tx_done = NULL; in k3_r5_rproc_start()
506 client->rx_callback = k3_r5_rproc_mbox_callback; in k3_r5_rproc_start()
507 client->tx_block = false; in k3_r5_rproc_start()
508 client->knows_txdone = false; in k3_r5_rproc_start()
510 kproc->mbox = mbox_request_channel(client, 0); in k3_r5_rproc_start()
511 if (IS_ERR(kproc->mbox)) { in k3_r5_rproc_start()
512 ret = -EBUSY; in k3_r5_rproc_start()
514 PTR_ERR(kproc->mbox)); in k3_r5_rproc_start()
519 * Ping the remote processor, this is only for sanity-sake for now; in k3_r5_rproc_start()
525 ret = mbox_send_message(kproc->mbox, (void *)RP_MBOX_ECHO_REQUEST); in k3_r5_rproc_start()
531 boot_addr = rproc->bootaddr; in k3_r5_rproc_start()
536 core = kproc->core; in k3_r5_rproc_start()
537 ret = ti_sci_proc_set_config(core->tsp, boot_addr, 0, 0); in k3_r5_rproc_start()
542 if (cluster->mode == CLUSTER_MODE_LOCKSTEP) { in k3_r5_rproc_start()
543 list_for_each_entry_reverse(core, &cluster->cores, elem) { in k3_r5_rproc_start()
557 list_for_each_entry_continue(core, &cluster->cores, elem) { in k3_r5_rproc_start()
559 dev_warn(core->dev, "core halt back failed\n"); in k3_r5_rproc_start()
562 mbox_free_channel(kproc->mbox); in k3_r5_rproc_start()
573 * performed first on Core0 followed by Core1. The Split-mode requires that
577 * The Single-CPU mode on applicable SoCs (eg: AM64x) only uses Core0 to execute
579 * flow as Split-mode for this.
584 * be done here, but is preferred to be done in the .unprepare() ops - this
587 * flow and device bind/unbind or module removal.
591 struct k3_r5_rproc *kproc = rproc->priv; in k3_r5_rproc_stop()
592 struct k3_r5_cluster *cluster = kproc->cluster; in k3_r5_rproc_stop()
593 struct k3_r5_core *core = kproc->core; in k3_r5_rproc_stop()
597 if (cluster->mode == CLUSTER_MODE_LOCKSTEP) { in k3_r5_rproc_stop()
598 list_for_each_entry(core, &cluster->cores, elem) { in k3_r5_rproc_stop()
611 mbox_free_channel(kproc->mbox); in k3_r5_rproc_stop()
616 list_for_each_entry_from_reverse(core, &cluster->cores, elem) { in k3_r5_rproc_stop()
618 dev_warn(core->dev, "core run back failed\n"); in k3_r5_rproc_stop()
628 * translation (device address to kernel virtual address) for internal RAMs
629 * present in a DSP or IPU device). The translated addresses can be used
634 struct k3_r5_rproc *kproc = rproc->priv; in k3_r5_rproc_da_to_va()
635 struct k3_r5_core *core = kproc->core; in k3_r5_rproc_da_to_va()
646 for (i = 0; i < core->num_mems; i++) { in k3_r5_rproc_da_to_va()
647 bus_addr = core->mem[i].bus_addr; in k3_r5_rproc_da_to_va()
648 dev_addr = core->mem[i].dev_addr; in k3_r5_rproc_da_to_va()
649 size = core->mem[i].size; in k3_r5_rproc_da_to_va()
651 /* handle R5-view addresses of TCMs */ in k3_r5_rproc_da_to_va()
653 offset = da - dev_addr; in k3_r5_rproc_da_to_va()
654 va = core->mem[i].cpu_addr + offset; in k3_r5_rproc_da_to_va()
658 /* handle SoC-view addresses of TCMs */ in k3_r5_rproc_da_to_va()
660 offset = da - bus_addr; in k3_r5_rproc_da_to_va()
661 va = core->mem[i].cpu_addr + offset; in k3_r5_rproc_da_to_va()
666 /* handle any SRAM regions using SoC-view addresses */ in k3_r5_rproc_da_to_va()
667 for (i = 0; i < core->num_sram; i++) { in k3_r5_rproc_da_to_va()
668 dev_addr = core->sram[i].dev_addr; in k3_r5_rproc_da_to_va()
669 size = core->sram[i].size; in k3_r5_rproc_da_to_va()
672 offset = da - dev_addr; in k3_r5_rproc_da_to_va()
673 va = core->sram[i].cpu_addr + offset; in k3_r5_rproc_da_to_va()
679 for (i = 0; i < kproc->num_rmems; i++) { in k3_r5_rproc_da_to_va()
680 dev_addr = kproc->rmem[i].dev_addr; in k3_r5_rproc_da_to_va()
681 size = kproc->rmem[i].size; in k3_r5_rproc_da_to_va()
684 offset = da - dev_addr; in k3_r5_rproc_da_to_va()
685 va = kproc->rmem[i].cpu_addr + offset; in k3_r5_rproc_da_to_va()
705 * Each R5FSS has a cluster-level setting for configuring the processor
706 * subsystem either in a safety/fault-tolerant LockStep mode or a performance
707 * oriented Split mode on most SoCs. A fewer SoCs support a non-safety mode
709 * called Single-CPU mode. Each R5F core has a number of settings to either
715 * This function is used to pre-configure these settings for each R5F core, and
721 * once (in LockStep mode or Single-CPU modes) or twice (in Split mode). Support
722 * for LockStep-mode is dictated by an eFUSE register bit, and the config
725 * supports a Single-CPU mode. All cluster level settings like Cluster mode and
733 * This is overcome by switching to Split-mode initially and then programming
739 struct k3_r5_cluster *cluster = kproc->cluster; in k3_r5_rproc_configure()
740 struct device *dev = kproc->dev; in k3_r5_rproc_configure()
749 core0 = list_first_entry(&cluster->cores, struct k3_r5_core, elem); in k3_r5_rproc_configure()
750 if (cluster->mode == CLUSTER_MODE_LOCKSTEP || in k3_r5_rproc_configure()
751 cluster->mode == CLUSTER_MODE_SINGLECPU) { in k3_r5_rproc_configure()
754 core = kproc->core; in k3_r5_rproc_configure()
757 ret = ti_sci_proc_get_status(core->tsp, &boot_vec, &cfg, &ctrl, in k3_r5_rproc_configure()
765 /* check if only Single-CPU mode is supported on applicable SoCs */ in k3_r5_rproc_configure()
766 if (cluster->soc_data->single_cpu_mode) { in k3_r5_rproc_configure()
769 if (single_cpu && cluster->mode == CLUSTER_MODE_SPLIT) { in k3_r5_rproc_configure()
770 dev_err(cluster->dev, "split-mode not permitted, force configuring for single-cpu mode\n"); in k3_r5_rproc_configure()
771 cluster->mode = CLUSTER_MODE_SINGLECPU; in k3_r5_rproc_configure()
778 if (!lockstep_en && cluster->mode == CLUSTER_MODE_LOCKSTEP) { in k3_r5_rproc_configure()
779 dev_err(cluster->dev, "lockstep mode not permitted, force configuring for split-mode\n"); in k3_r5_rproc_configure()
780 cluster->mode = CLUSTER_MODE_SPLIT; in k3_r5_rproc_configure()
788 if (cluster->soc_data->single_cpu_mode) { in k3_r5_rproc_configure()
790 * Single-CPU configuration bit can only be configured in k3_r5_rproc_configure()
795 if (cluster->mode == CLUSTER_MODE_SINGLECPU) in k3_r5_rproc_configure()
799 * LockStep configuration bit is Read-only on Split-mode in k3_r5_rproc_configure()
809 if (core->atcm_enable) in k3_r5_rproc_configure()
814 if (core->btcm_enable) in k3_r5_rproc_configure()
819 if (core->loczrama) in k3_r5_rproc_configure()
824 if (cluster->mode == CLUSTER_MODE_LOCKSTEP) { in k3_r5_rproc_configure()
830 list_for_each_entry(temp, &cluster->cores, elem) { in k3_r5_rproc_configure()
839 ret = ti_sci_proc_set_config(temp->tsp, boot_vec, in k3_r5_rproc_configure()
847 ret = ti_sci_proc_set_config(core->tsp, boot_vec, in k3_r5_rproc_configure()
854 ret = ti_sci_proc_set_config(core->tsp, boot_vec, in k3_r5_rproc_configure()
864 struct device *dev = kproc->dev; in k3_r5_reserved_mem_init()
871 num_rmems = of_property_count_elems_of_size(np, "memory-region", in k3_r5_reserved_mem_init()
874 dev_err(dev, "device does not have reserved memory regions, ret = %d\n", in k3_r5_reserved_mem_init()
876 return -EINVAL; in k3_r5_reserved_mem_init()
879 dev_err(dev, "device needs atleast two memory regions to be defined, num = %d\n", in k3_r5_reserved_mem_init()
881 return -EINVAL; in k3_r5_reserved_mem_init()
887 dev_err(dev, "device cannot initialize DMA pool, ret = %d\n", in k3_r5_reserved_mem_init()
892 num_rmems--; in k3_r5_reserved_mem_init()
893 kproc->rmem = kcalloc(num_rmems, sizeof(*kproc->rmem), GFP_KERNEL); in k3_r5_reserved_mem_init()
894 if (!kproc->rmem) { in k3_r5_reserved_mem_init()
895 ret = -ENOMEM; in k3_r5_reserved_mem_init()
901 rmem_np = of_parse_phandle(np, "memory-region", i + 1); in k3_r5_reserved_mem_init()
903 ret = -EINVAL; in k3_r5_reserved_mem_init()
910 ret = -EINVAL; in k3_r5_reserved_mem_init()
915 kproc->rmem[i].bus_addr = rmem->base; in k3_r5_reserved_mem_init()
919 * the 32-bit processor addresses to 64-bit bus addresses. The in k3_r5_reserved_mem_init()
921 * is currently not supported, so 64-bit address regions are not in k3_r5_reserved_mem_init()
922 * supported. The absence of MMUs implies that the R5F device in k3_r5_reserved_mem_init()
923 * addresses/supported memory regions are restricted to 32-bit in k3_r5_reserved_mem_init()
926 kproc->rmem[i].dev_addr = (u32)rmem->base; in k3_r5_reserved_mem_init()
927 kproc->rmem[i].size = rmem->size; in k3_r5_reserved_mem_init()
928 kproc->rmem[i].cpu_addr = ioremap_wc(rmem->base, rmem->size); in k3_r5_reserved_mem_init()
929 if (!kproc->rmem[i].cpu_addr) { in k3_r5_reserved_mem_init()
931 i + 1, &rmem->base, &rmem->size); in k3_r5_reserved_mem_init()
932 ret = -ENOMEM; in k3_r5_reserved_mem_init()
937 i + 1, &kproc->rmem[i].bus_addr, in k3_r5_reserved_mem_init()
938 kproc->rmem[i].size, kproc->rmem[i].cpu_addr, in k3_r5_reserved_mem_init()
939 kproc->rmem[i].dev_addr); in k3_r5_reserved_mem_init()
941 kproc->num_rmems = num_rmems; in k3_r5_reserved_mem_init()
946 for (i--; i >= 0; i--) in k3_r5_reserved_mem_init()
947 iounmap(kproc->rmem[i].cpu_addr); in k3_r5_reserved_mem_init()
948 kfree(kproc->rmem); in k3_r5_reserved_mem_init()
958 for (i = 0; i < kproc->num_rmems; i++) in k3_r5_reserved_mem_exit()
959 iounmap(kproc->rmem[i].cpu_addr); in k3_r5_reserved_mem_exit()
960 kfree(kproc->rmem); in k3_r5_reserved_mem_exit()
962 of_reserved_mem_device_release(kproc->dev); in k3_r5_reserved_mem_exit()
968 * cores are usable in Split-mode, but only the Core0 TCMs can be used in
969 * LockStep-mode. The newer revisions of the R5FSS IP maximizes these TCMs by
971 * otherwise been unusable (Eg: LockStep-mode on J7200 SoCs, Single-CPU mode on
980 struct k3_r5_cluster *cluster = kproc->cluster; in k3_r5_adjust_tcm_sizes()
981 struct k3_r5_core *core = kproc->core; in k3_r5_adjust_tcm_sizes()
982 struct device *cdev = core->dev; in k3_r5_adjust_tcm_sizes()
985 if (cluster->mode == CLUSTER_MODE_LOCKSTEP || in k3_r5_adjust_tcm_sizes()
986 cluster->mode == CLUSTER_MODE_SINGLECPU || in k3_r5_adjust_tcm_sizes()
987 !cluster->soc_data->tcm_is_double) in k3_r5_adjust_tcm_sizes()
990 core0 = list_first_entry(&cluster->cores, struct k3_r5_core, elem); in k3_r5_adjust_tcm_sizes()
992 WARN_ON(core->mem[0].size != SZ_64K); in k3_r5_adjust_tcm_sizes()
993 WARN_ON(core->mem[1].size != SZ_64K); in k3_r5_adjust_tcm_sizes()
995 core->mem[0].size /= 2; in k3_r5_adjust_tcm_sizes()
996 core->mem[1].size /= 2; in k3_r5_adjust_tcm_sizes()
999 core->mem[0].size, core->mem[1].size); in k3_r5_adjust_tcm_sizes()
1006 struct device *dev = &pdev->dev; in k3_r5_cluster_rproc_init()
1009 struct device *cdev; in k3_r5_cluster_rproc_init()
1014 core1 = list_last_entry(&cluster->cores, struct k3_r5_core, elem); in k3_r5_cluster_rproc_init()
1015 list_for_each_entry(core, &cluster->cores, elem) { in k3_r5_cluster_rproc_init()
1016 cdev = core->dev; in k3_r5_cluster_rproc_init()
1019 dev_err(dev, "failed to parse firmware-name property, ret = %d\n", in k3_r5_cluster_rproc_init()
1027 ret = -ENOMEM; in k3_r5_cluster_rproc_init()
1032 rproc->has_iommu = false; in k3_r5_cluster_rproc_init()
1034 rproc->recovery_disabled = true; in k3_r5_cluster_rproc_init()
1036 kproc = rproc->priv; in k3_r5_cluster_rproc_init()
1037 kproc->cluster = cluster; in k3_r5_cluster_rproc_init()
1038 kproc->core = core; in k3_r5_cluster_rproc_init()
1039 kproc->dev = cdev; in k3_r5_cluster_rproc_init()
1040 kproc->rproc = rproc; in k3_r5_cluster_rproc_init()
1041 core->rproc = rproc; in k3_r5_cluster_rproc_init()
1065 /* create only one rproc in lockstep mode or single-cpu mode */ in k3_r5_cluster_rproc_init()
1066 if (cluster->mode == CLUSTER_MODE_LOCKSTEP || in k3_r5_cluster_rproc_init()
1067 cluster->mode == CLUSTER_MODE_SINGLECPU) in k3_r5_cluster_rproc_init()
1079 core->rproc = NULL; in k3_r5_cluster_rproc_init()
1081 /* undo core0 upon any failures on core1 in split-mode */ in k3_r5_cluster_rproc_init()
1082 if (cluster->mode == CLUSTER_MODE_SPLIT && core == core1) { in k3_r5_cluster_rproc_init()
1084 rproc = core->rproc; in k3_r5_cluster_rproc_init()
1085 kproc = rproc->priv; in k3_r5_cluster_rproc_init()
1099 * lockstep mode and single-cpu modes have only one rproc associated in k3_r5_cluster_rproc_exit()
1100 * with first core, whereas split-mode has two rprocs associated with in k3_r5_cluster_rproc_exit()
1103 core = (cluster->mode == CLUSTER_MODE_LOCKSTEP || in k3_r5_cluster_rproc_exit()
1104 cluster->mode == CLUSTER_MODE_SINGLECPU) ? in k3_r5_cluster_rproc_exit()
1105 list_first_entry(&cluster->cores, struct k3_r5_core, elem) : in k3_r5_cluster_rproc_exit()
1106 list_last_entry(&cluster->cores, struct k3_r5_core, elem); in k3_r5_cluster_rproc_exit()
1108 list_for_each_entry_from_reverse(core, &cluster->cores, elem) { in k3_r5_cluster_rproc_exit()
1109 rproc = core->rproc; in k3_r5_cluster_rproc_exit()
1110 kproc = rproc->priv; in k3_r5_cluster_rproc_exit()
1117 core->rproc = NULL; in k3_r5_cluster_rproc_exit()
1125 struct device *dev = &pdev->dev; in k3_r5_core_of_get_internal_memories()
1131 core->mem = devm_kcalloc(dev, num_mems, sizeof(*core->mem), GFP_KERNEL); in k3_r5_core_of_get_internal_memories()
1132 if (!core->mem) in k3_r5_core_of_get_internal_memories()
1133 return -ENOMEM; in k3_r5_core_of_get_internal_memories()
1141 return -EINVAL; in k3_r5_core_of_get_internal_memories()
1143 if (!devm_request_mem_region(dev, res->start, in k3_r5_core_of_get_internal_memories()
1148 return -EBUSY; in k3_r5_core_of_get_internal_memories()
1152 * TCMs are designed in general to support RAM-like backing in k3_r5_core_of_get_internal_memories()
1153 * memories. So, map these as Normal Non-Cached memories. This in k3_r5_core_of_get_internal_memories()
1156 * functions (normally seen with device type memory). in k3_r5_core_of_get_internal_memories()
1158 core->mem[i].cpu_addr = devm_ioremap_wc(dev, res->start, in k3_r5_core_of_get_internal_memories()
1160 if (!core->mem[i].cpu_addr) { in k3_r5_core_of_get_internal_memories()
1162 return -ENOMEM; in k3_r5_core_of_get_internal_memories()
1164 core->mem[i].bus_addr = res->start; in k3_r5_core_of_get_internal_memories()
1175 core->mem[i].dev_addr = core->loczrama ? in k3_r5_core_of_get_internal_memories()
1178 core->mem[i].dev_addr = core->loczrama ? in k3_r5_core_of_get_internal_memories()
1181 core->mem[i].size = resource_size(res); in k3_r5_core_of_get_internal_memories()
1184 mem_names[i], &core->mem[i].bus_addr, in k3_r5_core_of_get_internal_memories()
1185 core->mem[i].size, core->mem[i].cpu_addr, in k3_r5_core_of_get_internal_memories()
1186 core->mem[i].dev_addr); in k3_r5_core_of_get_internal_memories()
1188 core->num_mems = num_mems; in k3_r5_core_of_get_internal_memories()
1196 struct device_node *np = pdev->dev.of_node; in k3_r5_core_of_get_sram_memories()
1197 struct device *dev = &pdev->dev; in k3_r5_core_of_get_sram_memories()
1203 num_sram = of_property_count_elems_of_size(np, "sram", sizeof(phandle)); in k3_r5_core_of_get_sram_memories()
1205 dev_dbg(dev, "device does not use reserved on-chip memories, num_sram = %d\n", in k3_r5_core_of_get_sram_memories()
1210 core->sram = devm_kcalloc(dev, num_sram, sizeof(*core->sram), GFP_KERNEL); in k3_r5_core_of_get_sram_memories()
1211 if (!core->sram) in k3_r5_core_of_get_sram_memories()
1212 return -ENOMEM; in k3_r5_core_of_get_sram_memories()
1215 sram_np = of_parse_phandle(np, "sram", i); in k3_r5_core_of_get_sram_memories()
1217 return -EINVAL; in k3_r5_core_of_get_sram_memories()
1221 return -EINVAL; in k3_r5_core_of_get_sram_memories()
1227 return -EINVAL; in k3_r5_core_of_get_sram_memories()
1229 core->sram[i].bus_addr = res.start; in k3_r5_core_of_get_sram_memories()
1230 core->sram[i].dev_addr = res.start; in k3_r5_core_of_get_sram_memories()
1231 core->sram[i].size = resource_size(&res); in k3_r5_core_of_get_sram_memories()
1232 core->sram[i].cpu_addr = devm_ioremap_wc(dev, res.start, in k3_r5_core_of_get_sram_memories()
1234 if (!core->sram[i].cpu_addr) { in k3_r5_core_of_get_sram_memories()
1235 dev_err(dev, "failed to parse and map sram%d memory at %pad\n", in k3_r5_core_of_get_sram_memories()
1237 return -ENOMEM; in k3_r5_core_of_get_sram_memories()
1240 dev_dbg(dev, "memory sram%d: bus addr %pa size 0x%zx va %pK da 0x%x\n", in k3_r5_core_of_get_sram_memories()
1241 i, &core->sram[i].bus_addr, in k3_r5_core_of_get_sram_memories()
1242 core->sram[i].size, core->sram[i].cpu_addr, in k3_r5_core_of_get_sram_memories()
1243 core->sram[i].dev_addr); in k3_r5_core_of_get_sram_memories()
1245 core->num_sram = num_sram; in k3_r5_core_of_get_sram_memories()
1251 struct ti_sci_proc *k3_r5_core_of_get_tsp(struct device *dev, in k3_r5_core_of_get_tsp()
1258 ret = of_property_read_u32_array(dev_of_node(dev), "ti,sci-proc-ids", in k3_r5_core_of_get_tsp()
1265 return ERR_PTR(-ENOMEM); in k3_r5_core_of_get_tsp()
1267 tsp->dev = dev; in k3_r5_core_of_get_tsp()
1268 tsp->sci = sci; in k3_r5_core_of_get_tsp()
1269 tsp->ops = &sci->ops.proc_ops; in k3_r5_core_of_get_tsp()
1270 tsp->proc_id = temp[0]; in k3_r5_core_of_get_tsp()
1271 tsp->host_id = temp[1]; in k3_r5_core_of_get_tsp()
1278 struct device *dev = &pdev->dev; in k3_r5_core_of_init()
1284 return -ENOMEM; in k3_r5_core_of_init()
1288 ret = -ENOMEM; in k3_r5_core_of_init()
1292 core->dev = dev; in k3_r5_core_of_init()
1294 * Use SoC Power-on-Reset values as default if no DT properties are in k3_r5_core_of_init()
1297 core->atcm_enable = 0; in k3_r5_core_of_init()
1298 core->btcm_enable = 1; in k3_r5_core_of_init()
1299 core->loczrama = 1; in k3_r5_core_of_init()
1301 ret = of_property_read_u32(np, "ti,atcm-enable", &core->atcm_enable); in k3_r5_core_of_init()
1302 if (ret < 0 && ret != -EINVAL) { in k3_r5_core_of_init()
1303 dev_err(dev, "invalid format for ti,atcm-enable, ret = %d\n", in k3_r5_core_of_init()
1308 ret = of_property_read_u32(np, "ti,btcm-enable", &core->btcm_enable); in k3_r5_core_of_init()
1309 if (ret < 0 && ret != -EINVAL) { in k3_r5_core_of_init()
1310 dev_err(dev, "invalid format for ti,btcm-enable, ret = %d\n", in k3_r5_core_of_init()
1315 ret = of_property_read_u32(np, "ti,loczrama", &core->loczrama); in k3_r5_core_of_init()
1316 if (ret < 0 && ret != -EINVAL) { in k3_r5_core_of_init()
1321 core->ti_sci = devm_ti_sci_get_by_phandle(dev, "ti,sci"); in k3_r5_core_of_init()
1322 if (IS_ERR(core->ti_sci)) { in k3_r5_core_of_init()
1323 ret = PTR_ERR(core->ti_sci); in k3_r5_core_of_init()
1324 if (ret != -EPROBE_DEFER) { in k3_r5_core_of_init()
1325 dev_err(dev, "failed to get ti-sci handle, ret = %d\n", in k3_r5_core_of_init()
1328 core->ti_sci = NULL; in k3_r5_core_of_init()
1332 ret = of_property_read_u32(np, "ti,sci-dev-id", &core->ti_sci_id); in k3_r5_core_of_init()
1334 dev_err(dev, "missing 'ti,sci-dev-id' property\n"); in k3_r5_core_of_init()
1338 core->reset = devm_reset_control_get_exclusive(dev, NULL); in k3_r5_core_of_init()
1339 if (IS_ERR_OR_NULL(core->reset)) { in k3_r5_core_of_init()
1340 ret = PTR_ERR_OR_ZERO(core->reset); in k3_r5_core_of_init()
1342 ret = -ENODEV; in k3_r5_core_of_init()
1343 if (ret != -EPROBE_DEFER) { in k3_r5_core_of_init()
1350 core->tsp = k3_r5_core_of_get_tsp(dev, core->ti_sci); in k3_r5_core_of_init()
1351 if (IS_ERR(core->tsp)) { in k3_r5_core_of_init()
1352 ret = PTR_ERR(core->tsp); in k3_r5_core_of_init()
1353 dev_err(dev, "failed to construct ti-sci proc control, ret = %d\n", in k3_r5_core_of_init()
1367 dev_err(dev, "failed to get sram memories, ret = %d\n", ret); in k3_r5_core_of_init()
1371 ret = ti_sci_proc_request(core->tsp); in k3_r5_core_of_init()
1394 struct device *dev = &pdev->dev; in k3_r5_core_of_exit()
1397 ret = ti_sci_proc_release(core->tsp); in k3_r5_core_of_exit()
1411 list_for_each_entry_safe_reverse(core, temp, &cluster->cores, elem) { in k3_r5_cluster_of_exit()
1412 list_del(&core->elem); in k3_r5_cluster_of_exit()
1413 cpdev = to_platform_device(core->dev); in k3_r5_cluster_of_exit()
1421 struct device *dev = &pdev->dev; in k3_r5_cluster_of_init()
1431 ret = -ENODEV; in k3_r5_cluster_of_init()
1432 dev_err(dev, "could not get R5 core platform device\n"); in k3_r5_cluster_of_init()
1440 put_device(&cpdev->dev); in k3_r5_cluster_of_init()
1445 put_device(&cpdev->dev); in k3_r5_cluster_of_init()
1446 list_add_tail(&core->elem, &cluster->cores); in k3_r5_cluster_of_init()
1458 struct device *dev = &pdev->dev; in k3_r5_probe()
1465 data = of_device_get_match_data(&pdev->dev); in k3_r5_probe()
1467 dev_err(dev, "SoC-specific data is not defined\n"); in k3_r5_probe()
1468 return -ENODEV; in k3_r5_probe()
1473 return -ENOMEM; in k3_r5_probe()
1475 cluster->dev = dev; in k3_r5_probe()
1477 * default to most common efuse configurations - Split-mode on AM64x in k3_r5_probe()
1478 * and LockStep-mode on all others in k3_r5_probe()
1480 cluster->mode = data->single_cpu_mode ? in k3_r5_probe()
1482 cluster->soc_data = data; in k3_r5_probe()
1483 INIT_LIST_HEAD(&cluster->cores); in k3_r5_probe()
1485 ret = of_property_read_u32(np, "ti,cluster-mode", &cluster->mode); in k3_r5_probe()
1486 if (ret < 0 && ret != -EINVAL) { in k3_r5_probe()
1487 dev_err(dev, "invalid format for ti,cluster-mode, ret = %d\n", in k3_r5_probe()
1496 return -ENODEV; in k3_r5_probe()
1551 { .compatible = "ti,am654-r5fss", .data = &am65_j721e_soc_data, },
1552 { .compatible = "ti,j721e-r5fss", .data = &am65_j721e_soc_data, },
1553 { .compatible = "ti,j7200-r5fss", .data = &j7200_soc_data, },
1554 { .compatible = "ti,am64-r5fss", .data = &am64_soc_data, },
1571 MODULE_AUTHOR("Suman Anna <s-anna@ti.com>");