Lines Matching refs:ENABLE_MASK
66 #define ENABLE_MASK(id) (BIT(id) | BIT(4 + (id))) macro
864 .enable_mask = ENABLE_MASK(RK817_ID_DCDC1),
865 .enable_val = ENABLE_MASK(RK817_ID_DCDC1),
887 .enable_mask = ENABLE_MASK(RK817_ID_DCDC2),
888 .enable_val = ENABLE_MASK(RK817_ID_DCDC2),
910 .enable_mask = ENABLE_MASK(RK817_ID_DCDC3),
911 .enable_val = ENABLE_MASK(RK817_ID_DCDC3),
933 .enable_mask = ENABLE_MASK(RK817_ID_DCDC4),
934 .enable_val = ENABLE_MASK(RK817_ID_DCDC4),
957 .enable_mask = ENABLE_MASK(1),
958 .enable_val = ENABLE_MASK(1),
965 RK817_POWER_EN_REG(1), ENABLE_MASK(0),
969 RK817_POWER_EN_REG(1), ENABLE_MASK(1),
973 RK817_POWER_EN_REG(1), ENABLE_MASK(2),
977 RK817_POWER_EN_REG(1), ENABLE_MASK(3),
981 RK817_POWER_EN_REG(2), ENABLE_MASK(0),
985 RK817_POWER_EN_REG(2), ENABLE_MASK(1),
989 RK817_POWER_EN_REG(2), ENABLE_MASK(2),
993 RK817_POWER_EN_REG(2), ENABLE_MASK(3),
997 RK817_POWER_EN_REG(3), ENABLE_MASK(0),
1000 RK817_POWER_EN_REG(3), ENABLE_MASK(2),
1003 RK817_POWER_EN_REG(3), ENABLE_MASK(3),
1022 .enable_mask = ENABLE_MASK(RK817_ID_DCDC1),
1023 .enable_val = ENABLE_MASK(RK817_ID_DCDC1),
1045 .enable_mask = ENABLE_MASK(RK817_ID_DCDC2),
1046 .enable_val = ENABLE_MASK(RK817_ID_DCDC2),
1068 .enable_mask = ENABLE_MASK(RK817_ID_DCDC3),
1069 .enable_val = ENABLE_MASK(RK817_ID_DCDC3),
1091 .enable_mask = ENABLE_MASK(RK817_ID_DCDC4),
1092 .enable_val = ENABLE_MASK(RK817_ID_DCDC4),
1103 RK817_POWER_EN_REG(1), ENABLE_MASK(0),
1107 RK817_POWER_EN_REG(1), ENABLE_MASK(1),
1111 RK817_POWER_EN_REG(1), ENABLE_MASK(2),
1115 RK817_POWER_EN_REG(1), ENABLE_MASK(3),
1119 RK817_POWER_EN_REG(2), ENABLE_MASK(0),
1123 RK817_POWER_EN_REG(2), ENABLE_MASK(1),
1127 RK817_POWER_EN_REG(2), ENABLE_MASK(2),
1131 RK817_POWER_EN_REG(2), ENABLE_MASK(3),
1135 RK817_POWER_EN_REG(3), ENABLE_MASK(0),
1139 RK817_POWER_EN_REG(3), ENABLE_MASK(1), ENABLE_MASK(1),
1142 RK817_POWER_EN_REG(3), ENABLE_MASK(2),