Lines Matching full:pc
181 static void configure_polarity(struct ehrpwm_pwm_chip *pc, int chan) in configure_polarity() argument
196 if (pc->polarity[chan] == PWM_POLARITY_INVERSED) in configure_polarity()
204 if (pc->polarity[chan] == PWM_POLARITY_INVERSED) in configure_polarity()
211 ehrpwm_modify(pc->mmio_base, aqctl_reg, aqctl_mask, aqctl_val); in configure_polarity()
221 struct ehrpwm_pwm_chip *pc = to_ehrpwm_pwm_chip(chip); in ehrpwm_pwm_config() local
230 c = pc->clk_rate; in ehrpwm_pwm_config()
239 c = pc->clk_rate; in ehrpwm_pwm_config()
250 if (pc->period_cycles[i] && in ehrpwm_pwm_config()
251 (pc->period_cycles[i] != period_cycles)) { in ehrpwm_pwm_config()
266 pc->period_cycles[pwm->hwpwm] = period_cycles; in ehrpwm_pwm_config()
278 ehrpwm_modify(pc->mmio_base, TBCTL, TBCTL_CLKDIV_MASK, tb_divval); in ehrpwm_pwm_config()
285 ehrpwm_modify(pc->mmio_base, TBCTL, TBCTL_PRDLD_MASK, TBCTL_PRDLD_SHDW); in ehrpwm_pwm_config()
287 ehrpwm_write(pc->mmio_base, TBPRD, period_cycles); in ehrpwm_pwm_config()
290 ehrpwm_modify(pc->mmio_base, TBCTL, TBCTL_CTRMODE_MASK, in ehrpwm_pwm_config()
300 ehrpwm_write(pc->mmio_base, cmp_reg, duty_cycles); in ehrpwm_pwm_config()
311 struct ehrpwm_pwm_chip *pc = to_ehrpwm_pwm_chip(chip); in ehrpwm_pwm_set_polarity() local
314 pc->polarity[pwm->hwpwm] = polarity; in ehrpwm_pwm_set_polarity()
321 struct ehrpwm_pwm_chip *pc = to_ehrpwm_pwm_chip(chip); in ehrpwm_pwm_enable() local
338 ehrpwm_modify(pc->mmio_base, AQSFRC, AQSFRC_RLDCSF_MASK, in ehrpwm_pwm_enable()
341 ehrpwm_modify(pc->mmio_base, AQCSFRC, aqcsfrc_mask, aqcsfrc_val); in ehrpwm_pwm_enable()
344 configure_polarity(pc, pwm->hwpwm); in ehrpwm_pwm_enable()
347 ret = clk_enable(pc->tbclk); in ehrpwm_pwm_enable()
350 dev_name(pc->chip.dev), ret); in ehrpwm_pwm_enable()
359 struct ehrpwm_pwm_chip *pc = to_ehrpwm_pwm_chip(chip); in ehrpwm_pwm_disable() local
372 ehrpwm_modify(pc->mmio_base, AQSFRC, AQSFRC_RLDCSF_MASK, in ehrpwm_pwm_disable()
374 ehrpwm_modify(pc->mmio_base, AQCSFRC, aqcsfrc_mask, aqcsfrc_val); in ehrpwm_pwm_disable()
379 ehrpwm_modify(pc->mmio_base, AQSFRC, AQSFRC_RLDCSF_MASK, in ehrpwm_pwm_disable()
382 ehrpwm_modify(pc->mmio_base, AQCSFRC, aqcsfrc_mask, aqcsfrc_val); in ehrpwm_pwm_disable()
385 clk_disable(pc->tbclk); in ehrpwm_pwm_disable()
393 struct ehrpwm_pwm_chip *pc = to_ehrpwm_pwm_chip(chip); in ehrpwm_pwm_free() local
401 pc->period_cycles[pwm->hwpwm] = 0; in ehrpwm_pwm_free()
423 struct ehrpwm_pwm_chip *pc; in ehrpwm_pwm_probe() local
427 pc = devm_kzalloc(&pdev->dev, sizeof(*pc), GFP_KERNEL); in ehrpwm_pwm_probe()
428 if (!pc) in ehrpwm_pwm_probe()
442 pc->clk_rate = clk_get_rate(clk); in ehrpwm_pwm_probe()
443 if (!pc->clk_rate) { in ehrpwm_pwm_probe()
448 pc->chip.dev = &pdev->dev; in ehrpwm_pwm_probe()
449 pc->chip.ops = &ehrpwm_pwm_ops; in ehrpwm_pwm_probe()
450 pc->chip.npwm = NUM_PWM_CHANNEL; in ehrpwm_pwm_probe()
452 pc->mmio_base = devm_platform_ioremap_resource(pdev, 0); in ehrpwm_pwm_probe()
453 if (IS_ERR(pc->mmio_base)) in ehrpwm_pwm_probe()
454 return PTR_ERR(pc->mmio_base); in ehrpwm_pwm_probe()
457 pc->tbclk = devm_clk_get(&pdev->dev, "tbclk"); in ehrpwm_pwm_probe()
458 if (IS_ERR(pc->tbclk)) in ehrpwm_pwm_probe()
459 return dev_err_probe(&pdev->dev, PTR_ERR(pc->tbclk), "Failed to get tbclk\n"); in ehrpwm_pwm_probe()
461 ret = clk_prepare(pc->tbclk); in ehrpwm_pwm_probe()
467 ret = pwmchip_add(&pc->chip); in ehrpwm_pwm_probe()
473 platform_set_drvdata(pdev, pc); in ehrpwm_pwm_probe()
479 clk_unprepare(pc->tbclk); in ehrpwm_pwm_probe()
486 struct ehrpwm_pwm_chip *pc = platform_get_drvdata(pdev); in ehrpwm_pwm_remove() local
488 pwmchip_remove(&pc->chip); in ehrpwm_pwm_remove()
490 clk_unprepare(pc->tbclk); in ehrpwm_pwm_remove()
498 static void ehrpwm_pwm_save_context(struct ehrpwm_pwm_chip *pc) in ehrpwm_pwm_save_context() argument
500 pm_runtime_get_sync(pc->chip.dev); in ehrpwm_pwm_save_context()
502 pc->ctx.tbctl = ehrpwm_read(pc->mmio_base, TBCTL); in ehrpwm_pwm_save_context()
503 pc->ctx.tbprd = ehrpwm_read(pc->mmio_base, TBPRD); in ehrpwm_pwm_save_context()
504 pc->ctx.cmpa = ehrpwm_read(pc->mmio_base, CMPA); in ehrpwm_pwm_save_context()
505 pc->ctx.cmpb = ehrpwm_read(pc->mmio_base, CMPB); in ehrpwm_pwm_save_context()
506 pc->ctx.aqctla = ehrpwm_read(pc->mmio_base, AQCTLA); in ehrpwm_pwm_save_context()
507 pc->ctx.aqctlb = ehrpwm_read(pc->mmio_base, AQCTLB); in ehrpwm_pwm_save_context()
508 pc->ctx.aqsfrc = ehrpwm_read(pc->mmio_base, AQSFRC); in ehrpwm_pwm_save_context()
509 pc->ctx.aqcsfrc = ehrpwm_read(pc->mmio_base, AQCSFRC); in ehrpwm_pwm_save_context()
511 pm_runtime_put_sync(pc->chip.dev); in ehrpwm_pwm_save_context()
514 static void ehrpwm_pwm_restore_context(struct ehrpwm_pwm_chip *pc) in ehrpwm_pwm_restore_context() argument
516 ehrpwm_write(pc->mmio_base, TBPRD, pc->ctx.tbprd); in ehrpwm_pwm_restore_context()
517 ehrpwm_write(pc->mmio_base, CMPA, pc->ctx.cmpa); in ehrpwm_pwm_restore_context()
518 ehrpwm_write(pc->mmio_base, CMPB, pc->ctx.cmpb); in ehrpwm_pwm_restore_context()
519 ehrpwm_write(pc->mmio_base, AQCTLA, pc->ctx.aqctla); in ehrpwm_pwm_restore_context()
520 ehrpwm_write(pc->mmio_base, AQCTLB, pc->ctx.aqctlb); in ehrpwm_pwm_restore_context()
521 ehrpwm_write(pc->mmio_base, AQSFRC, pc->ctx.aqsfrc); in ehrpwm_pwm_restore_context()
522 ehrpwm_write(pc->mmio_base, AQCSFRC, pc->ctx.aqcsfrc); in ehrpwm_pwm_restore_context()
523 ehrpwm_write(pc->mmio_base, TBCTL, pc->ctx.tbctl); in ehrpwm_pwm_restore_context()
528 struct ehrpwm_pwm_chip *pc = dev_get_drvdata(dev); in ehrpwm_pwm_suspend() local
531 ehrpwm_pwm_save_context(pc); in ehrpwm_pwm_suspend()
533 for (i = 0; i < pc->chip.npwm; i++) { in ehrpwm_pwm_suspend()
534 struct pwm_device *pwm = &pc->chip.pwms[i]; in ehrpwm_pwm_suspend()
548 struct ehrpwm_pwm_chip *pc = dev_get_drvdata(dev); in ehrpwm_pwm_resume() local
551 for (i = 0; i < pc->chip.npwm; i++) { in ehrpwm_pwm_resume()
552 struct pwm_device *pwm = &pc->chip.pwms[i]; in ehrpwm_pwm_resume()
561 ehrpwm_pwm_restore_context(pc); in ehrpwm_pwm_resume()