Lines Matching +full:long +full:- +full:term

1 // SPDX-License-Identifier: GPL-2.0-or-later
9 * platform device ep93xx-pwm.1 - PWMOUT1 (EGPIO14)
12 * platform device ep93xx-pwm.0 - PWMOUT
15 * platform device ep93xx-pwm.0 - PWMOUT
16 * platform device ep93xx-pwm.1 - PWMOUT1 (EGPIO14)
49 struct platform_device *pdev = to_platform_device(chip->dev); in ep93xx_pwm_request()
56 struct platform_device *pdev = to_platform_device(chip->dev); in ep93xx_pwm_free()
66 bool enabled = state->enabled; in ep93xx_pwm_apply()
67 void __iomem *base = ep93xx_pwm->base; in ep93xx_pwm_apply()
68 unsigned long long c; in ep93xx_pwm_apply()
69 unsigned long period_cycles; in ep93xx_pwm_apply()
70 unsigned long duty_cycles; in ep93xx_pwm_apply()
71 unsigned long term; in ep93xx_pwm_apply() local
73 if (state->polarity != pwm->state.polarity) { in ep93xx_pwm_apply()
75 writew(0x0, ep93xx_pwm->base + EP93XX_PWMx_ENABLE); in ep93xx_pwm_apply()
76 clk_disable_unprepare(ep93xx_pwm->clk); in ep93xx_pwm_apply()
84 ret = clk_prepare_enable(ep93xx_pwm->clk); in ep93xx_pwm_apply()
88 if (state->polarity == PWM_POLARITY_INVERSED) in ep93xx_pwm_apply()
89 writew(0x1, ep93xx_pwm->base + EP93XX_PWMx_INVERT); in ep93xx_pwm_apply()
91 writew(0x0, ep93xx_pwm->base + EP93XX_PWMx_INVERT); in ep93xx_pwm_apply()
93 clk_disable_unprepare(ep93xx_pwm->clk); in ep93xx_pwm_apply()
96 if (!state->enabled) { in ep93xx_pwm_apply()
98 writew(0x0, ep93xx_pwm->base + EP93XX_PWMx_ENABLE); in ep93xx_pwm_apply()
99 clk_disable_unprepare(ep93xx_pwm->clk); in ep93xx_pwm_apply()
110 ret = clk_prepare_enable(ep93xx_pwm->clk); in ep93xx_pwm_apply()
115 c = clk_get_rate(ep93xx_pwm->clk); in ep93xx_pwm_apply()
116 c *= state->period; in ep93xx_pwm_apply()
121 c *= state->duty_cycle; in ep93xx_pwm_apply()
122 do_div(c, state->period); in ep93xx_pwm_apply()
126 term = readw(base + EP93XX_PWMx_TERM_COUNT); in ep93xx_pwm_apply()
129 if (period_cycles > term) { in ep93xx_pwm_apply()
138 ret = -EINVAL; in ep93xx_pwm_apply()
142 clk_disable_unprepare(ep93xx_pwm->clk); in ep93xx_pwm_apply()
148 ret = clk_prepare_enable(ep93xx_pwm->clk); in ep93xx_pwm_apply()
152 writew(0x1, ep93xx_pwm->base + EP93XX_PWMx_ENABLE); in ep93xx_pwm_apply()
170 ep93xx_pwm = devm_kzalloc(&pdev->dev, sizeof(*ep93xx_pwm), GFP_KERNEL); in ep93xx_pwm_probe()
172 return -ENOMEM; in ep93xx_pwm_probe()
174 ep93xx_pwm->base = devm_platform_ioremap_resource(pdev, 0); in ep93xx_pwm_probe()
175 if (IS_ERR(ep93xx_pwm->base)) in ep93xx_pwm_probe()
176 return PTR_ERR(ep93xx_pwm->base); in ep93xx_pwm_probe()
178 ep93xx_pwm->clk = devm_clk_get(&pdev->dev, "pwm_clk"); in ep93xx_pwm_probe()
179 if (IS_ERR(ep93xx_pwm->clk)) in ep93xx_pwm_probe()
180 return PTR_ERR(ep93xx_pwm->clk); in ep93xx_pwm_probe()
182 ep93xx_pwm->chip.dev = &pdev->dev; in ep93xx_pwm_probe()
183 ep93xx_pwm->chip.ops = &ep93xx_pwm_ops; in ep93xx_pwm_probe()
184 ep93xx_pwm->chip.npwm = 1; in ep93xx_pwm_probe()
186 ret = devm_pwmchip_add(&pdev->dev, &ep93xx_pwm->chip); in ep93xx_pwm_probe()
195 .name = "ep93xx-pwm",
204 MODULE_ALIAS("platform:ep93xx-pwm");