Lines Matching +full:4 +full:x2
27 SUNXI_FUNCTION(0x2, "uart2"), /* TX */
33 SUNXI_FUNCTION(0x2, "uart2"), /* RX */
40 SUNXI_FUNCTION(0x2, "uart2"), /* RTS */
47 SUNXI_FUNCTION(0x2, "uart2"), /* CTS */
52 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
55 SUNXI_FUNCTION(0x2, "aif2"), /* SYNC */
58 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)), /* EINT4 */
62 SUNXI_FUNCTION(0x2, "aif2"), /* BCLK */
69 SUNXI_FUNCTION(0x2, "aif2"), /* DOUT */
76 SUNXI_FUNCTION(0x2, "aif2"), /* DIN */
94 SUNXI_FUNCTION(0x2, "nand0"), /* NWE */
99 SUNXI_FUNCTION(0x2, "nand0"), /* NALE */
105 SUNXI_FUNCTION(0x2, "nand0"), /* NCLE */
110 SUNXI_FUNCTION(0x2, "nand0"), /* NCE1 */
112 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
115 SUNXI_FUNCTION(0x2, "nand0")), /* NCE0 */
119 SUNXI_FUNCTION(0x2, "nand0"), /* NRE# */
124 SUNXI_FUNCTION(0x2, "nand0"), /* NRB0 */
129 SUNXI_FUNCTION(0x2, "nand0")), /* NRB1 */
133 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ0 */
138 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ1 */
143 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ2 */
148 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ3 */
153 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ4 */
158 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ5 */
163 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ6 */
168 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ7 */
173 SUNXI_FUNCTION(0x2, "nand0"), /* NDQS */
179 SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */
186 SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */
193 SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */
200 SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */
204 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
207 SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */
213 SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */
219 SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */
224 SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */
229 SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */
235 SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */
241 SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */
246 SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */
251 SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */
257 SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */
263 SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */
269 SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */
276 SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */
283 SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */
289 SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */
295 SUNXI_FUNCTION(0x2, "lcd0"), /* DE */
301 SUNXI_FUNCTION(0x2, "lcd0"), /* HSYNC */
307 SUNXI_FUNCTION(0x2, "lcd0"), /* VSYNC */
313 SUNXI_FUNCTION(0x2, "pwm"), /* PWM0 */
326 SUNXI_FUNCTION(0x2, "csi"), /* PCK */
331 SUNXI_FUNCTION(0x2, "csi"), /* CK */
336 SUNXI_FUNCTION(0x2, "csi"), /* HSYNC */
341 SUNXI_FUNCTION(0x2, "csi"), /* VSYNC */
343 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
346 SUNXI_FUNCTION(0x2, "csi"), /* D0 */
351 SUNXI_FUNCTION(0x2, "csi"), /* D1 */
356 SUNXI_FUNCTION(0x2, "csi"), /* D2 */
361 SUNXI_FUNCTION(0x2, "csi"), /* D3 */
366 SUNXI_FUNCTION(0x2, "csi"), /* D4 */
371 SUNXI_FUNCTION(0x2, "csi"), /* D5 */
376 SUNXI_FUNCTION(0x2, "csi"), /* D6 */
381 SUNXI_FUNCTION(0x2, "csi"), /* D7 */
386 SUNXI_FUNCTION(0x2, "csi")), /* SCK */
390 SUNXI_FUNCTION(0x2, "csi")), /* SDA */
394 SUNXI_FUNCTION(0x2, "pll"), /* LOCK_DBG */
410 SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */
415 SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */
420 SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */
425 SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */
427 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
430 SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */
435 SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */
444 SUNXI_FUNCTION(0x2, "mmc1"), /* CLK */
449 SUNXI_FUNCTION(0x2, "mmc1"), /* CMD */
454 SUNXI_FUNCTION(0x2, "mmc1"), /* D0 */
459 SUNXI_FUNCTION(0x2, "mmc1"), /* D1 */
461 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
464 SUNXI_FUNCTION(0x2, "mmc1"), /* D2 */
465 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)), /* EINT4 */
469 SUNXI_FUNCTION(0x2, "mmc1"), /* D3 */
474 SUNXI_FUNCTION(0x2, "uart1"), /* TX */
479 SUNXI_FUNCTION(0x2, "uart1"), /* RX */
484 SUNXI_FUNCTION(0x2, "uart1"), /* RTS */
489 SUNXI_FUNCTION(0x2, "uart1"), /* CTS */
494 SUNXI_FUNCTION(0x2, "aif3"), /* SYNC */
500 SUNXI_FUNCTION(0x2, "aif3"), /* BCLK */
506 SUNXI_FUNCTION(0x2, "aif3"), /* DOUT */
512 SUNXI_FUNCTION(0x2, "aif3"), /* DIN */
519 SUNXI_FUNCTION(0x2, "i2c0"), /* SCK */
524 SUNXI_FUNCTION(0x2, "i2c0"), /* SDA */
529 SUNXI_FUNCTION(0x2, "i2c1"), /* SCK */
534 SUNXI_FUNCTION(0x2, "i2c1"), /* SDA */
536 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
539 SUNXI_FUNCTION(0x2, "uart3"), /* TX */
540 SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 4)), /* EINT4 */
544 SUNXI_FUNCTION(0x2, "uart3"), /* RX */
549 SUNXI_FUNCTION(0x2, "uart3"), /* RTS */
554 SUNXI_FUNCTION(0x2, "uart3"), /* CTS */
559 SUNXI_FUNCTION(0x2, "spdif"), /* OUT */
568 SUNXI_FUNCTION(0x2, "mic"), /* CLK */
573 SUNXI_FUNCTION(0x2, "mic"), /* DATA */