Lines Matching +full:4 +full:x2
21 SUNXI_FUNCTION(0x2, "uart2"), /* TX */
28 SUNXI_FUNCTION(0x2, "uart2"), /* RX */
35 SUNXI_FUNCTION(0x2, "uart2"), /* RTS */
42 SUNXI_FUNCTION(0x2, "uart2"), /* CTS */
46 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
49 SUNXI_FUNCTION(0x2, "i2c1"), /* SCK */
52 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)),
56 SUNXI_FUNCTION(0x2, "i2c1"), /* SDA */
69 SUNXI_FUNCTION(0x2, "spdif"), /* DIN */
76 SUNXI_FUNCTION(0x2, "spdif"), /* DOUT */
83 SUNXI_FUNCTION(0x2, "uart0"), /* TX */
90 SUNXI_FUNCTION(0x2, "uart0"), /* RX */
98 SUNXI_FUNCTION(0x2, "nand0"), /* WE */
104 SUNXI_FUNCTION(0x2, "nand0"), /* ALE */
110 SUNXI_FUNCTION(0x2, "nand0"), /* CLE */
116 SUNXI_FUNCTION(0x2, "nand0"), /* CE1 */
119 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
122 SUNXI_FUNCTION(0x2, "nand0"), /* CE0 */
124 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)),
128 SUNXI_FUNCTION(0x2, "nand0"), /* RE */
134 SUNXI_FUNCTION(0x2, "nand0"), /* RB0 */
140 SUNXI_FUNCTION(0x2, "nand0"), /* RB1 */
146 SUNXI_FUNCTION(0x2, "nand0"), /* DQ7 */
152 SUNXI_FUNCTION(0x2, "nand0"), /* DQ6 */
158 SUNXI_FUNCTION(0x2, "nand0"), /* DQ5 */
164 SUNXI_FUNCTION(0x2, "nand0"), /* DQ4 */
170 SUNXI_FUNCTION(0x2, "nand0"), /* DQS */
176 SUNXI_FUNCTION(0x2, "nand0"), /* DQ3 */
182 SUNXI_FUNCTION(0x2, "nand0"), /* DQ2 */
188 SUNXI_FUNCTION(0x2, "nand0"), /* DQ1 */
195 SUNXI_FUNCTION(0x2, "nand0"), /* DQ0 */
203 SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */
210 SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */
217 SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */
224 SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */
228 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
231 SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */
234 SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 4)),
238 SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */
245 SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */
252 SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */
259 SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */
265 SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */
271 SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */
277 SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */
283 SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */
289 SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */
295 SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */
301 SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */
307 SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */
313 SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */
319 SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */
325 SUNXI_FUNCTION(0x2, "lcd0"), /* DE */
331 SUNXI_FUNCTION(0x2, "lcd0"), /* HSYNC */
338 SUNXI_FUNCTION(0x2, "lcd0"), /* VSYNC */
345 SUNXI_FUNCTION(0x2, "pwm1"),
351 SUNXI_FUNCTION(0x2, "pwm0"),
358 SUNXI_FUNCTION(0x2, "csi"), /* MCLK */
363 SUNXI_FUNCTION(0x2, "i2c2"), /* SCK */
368 SUNXI_FUNCTION(0x2, "i2c2"), /* SDA */
373 SUNXI_FUNCTION(0x2, "i2c3"), /* SCK */
375 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
378 SUNXI_FUNCTION(0x2, "i2c3"), /* SDA */
379 SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 4)),
383 SUNXI_FUNCTION(0x2, "csi"), /* MCLK */
397 SUNXI_FUNCTION(0x2, "csi"), /* SM_VS */
418 SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */
421 SUNXI_FUNCTION_IRQ_BANK(0x6, 4, 0)),
425 SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */
428 SUNXI_FUNCTION_IRQ_BANK(0x6, 4, 1)),
432 SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */
434 SUNXI_FUNCTION_IRQ_BANK(0x6, 4, 2)),
438 SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */
441 SUNXI_FUNCTION_IRQ_BANK(0x6, 4, 3)),
442 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
445 SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */
447 SUNXI_FUNCTION_IRQ_BANK(0x6, 4, 4)),
451 SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */
454 SUNXI_FUNCTION_IRQ_BANK(0x6, 4, 5)),
458 SUNXI_FUNCTION_IRQ_BANK(0x6, 4, 6)),
463 SUNXI_FUNCTION(0x2, "mmc1"), /* CLK */
468 SUNXI_FUNCTION(0x2, "mmc1"), /* CMD */
473 SUNXI_FUNCTION(0x2, "mmc1"), /* D0 */
478 SUNXI_FUNCTION(0x2, "mmc1"), /* D1 */
480 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
483 SUNXI_FUNCTION(0x2, "mmc1"), /* D2 */
484 SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 4)),
488 SUNXI_FUNCTION(0x2, "mmc1"), /* D3 */
493 SUNXI_FUNCTION(0x2, "uart1"), /* TX */
498 SUNXI_FUNCTION(0x2, "uart1"), /* RX */
503 SUNXI_FUNCTION(0x2, "uart1"), /* RTS */
508 SUNXI_FUNCTION(0x2, "uart1"), /* CTS */
537 SUNXI_FUNCTION(0x2, "i2c0"), /* SCK */
543 SUNXI_FUNCTION(0x2, "i2c0"), /* SDA */
549 SUNXI_FUNCTION(0x2, "i2c1"), /* SCK */
555 SUNXI_FUNCTION(0x2, "i2c1"), /* SDA */
559 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
562 SUNXI_FUNCTION(0x2, "uart3"), /* TX */
565 SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 4)),
569 SUNXI_FUNCTION(0x2, "uart3"), /* RX */
577 SUNXI_FUNCTION(0x2, "uart3"), /* RTS */
584 SUNXI_FUNCTION(0x2, "uart3"), /* CTS */
592 SUNXI_FUNCTION(0x2, "dmic"), /* CLK */
600 SUNXI_FUNCTION(0x2, "dmic"), /* DATA0 */
608 SUNXI_FUNCTION(0x2, "dmic"), /* DATA1 */
616 SUNXI_FUNCTION(0x2, "dmic"), /* DATA2 */
624 SUNXI_FUNCTION(0x2, "dmic"), /* DATA3 */
665 SUNXI_FUNCTION(0x2, "cir0"), /* OUT */
673 SUNXI_FUNCTION(0x2, "cir0"), /* IN */
680 static const unsigned int a100_irq_bank_map[] = { 1, 2, 3, 4, 5, 6, 7};