Lines Matching full:sfp
120 [FUNC_SFP] = "sfp",
179 LUTON_P(10, SFP, PHY_LED);
180 LUTON_P(11, SFP, PHY_LED);
181 LUTON_P(12, SFP, PHY_LED);
182 LUTON_P(13, SFP, PHY_LED);
186 LUTON_P(17, SFP, PHY_LED);
187 LUTON_P(18, SFP, PHY_LED);
188 LUTON_P(19, SFP, PHY_LED);
189 LUTON_P(20, SFP, PHY_LED);
190 LUTON_P(21, SFP, PHY_LED);
191 LUTON_P(22, SFP, PHY_LED);
192 LUTON_P(23, SFP, PHY_LED);
193 LUTON_P(24, SFP, PHY_LED);
194 LUTON_P(25, SFP, PHY_LED);
195 LUTON_P(26, SFP, PHY_LED);
196 LUTON_P(27, SFP, PHY_LED);
197 LUTON_P(28, SFP, PHY_LED);
262 SERVAL_P(11, SFP, MD, TWI_SCL_M);
263 SERVAL_P(12, SFP, MD, TWI_SCL_M);
264 SERVAL_P(13, SFP, UART2, TWI_SCL_M);
265 SERVAL_P(14, SFP, UART2, TWI_SCL_M);
266 SERVAL_P(15, SFP, PTP0, TWI_SCL_M);
267 SERVAL_P(16, SFP, PTP0, TWI_SCL_M);
268 SERVAL_P(17, SFP, PCI_WAKE, TWI_SCL_M);
269 SERVAL_P(18, SFP, NONE, TWI_SCL_M);
270 SERVAL_P(19, SFP, NONE, TWI_SCL_M);
271 SERVAL_P(20, SFP, NONE, TWI_SCL_M);
272 SERVAL_P(21, SFP, NONE, TWI_SCL_M);
343 OCELOT_P(10, PTP2, TWI_SCL_M, SFP);
344 OCELOT_P(11, PTP3, TWI_SCL_M, SFP);
345 OCELOT_P(12, UART2, TWI_SCL_M, SFP);
346 OCELOT_P(13, UART2, TWI_SCL_M, SFP);
347 OCELOT_P(14, MIIM, TWI_SCL_M, SFP);
348 OCELOT_P(15, MIIM, TWI_SCL_M, SFP);
439 JAGUAR2_P(44, NONE, SFP);
440 JAGUAR2_P(45, NONE, SFP);
441 JAGUAR2_P(46, NONE, SFP);
442 JAGUAR2_P(47, NONE, SFP);
443 JAGUAR2_P(48, SFP, NONE);
444 JAGUAR2_P(49, SFP, SI);
445 JAGUAR2_P(50, SFP, SI);
446 JAGUAR2_P(51, SFP, SI);
447 JAGUAR2_P(52, SFP, NONE);
448 JAGUAR2_P(53, SFP, NONE);
449 JAGUAR2_P(54, SFP, NONE);
450 JAGUAR2_P(55, SFP, NONE);
451 JAGUAR2_P(56, MIIM, SFP);
452 JAGUAR2_P(57, MIIM, SFP);
453 JAGUAR2_P(58, MIIM, SFP);
454 JAGUAR2_P(59, MIIM, SFP);
547 SPARX5_P(6, IRQ0_IN, IRQ0_OUT, SFP);
548 SPARX5_P(7, IRQ1_IN, IRQ1_OUT, SFP);
549 SPARX5_P(8, PTP0, NONE, SFP);
550 SPARX5_P(9, PTP1, SFP, TWI_SCL_M);
557 SPARX5_P(16, SI, TWI_SCL_M, SFP);
558 SPARX5_P(17, SI, TWI_SCL_M, SFP);
559 SPARX5_P(18, SI, TWI_SCL_M, SFP);
560 SPARX5_P(19, PCI_WAKE, TWI_SCL_M, SFP);
561 SPARX5_P(20, IRQ0_OUT, TWI_SCL_M, SFP);
562 SPARX5_P(21, IRQ1_OUT, TACHO, SFP);
569 SPARX5_P(28, TWI2, SI, SFP);
570 SPARX5_P(29, TWI2, SI, SFP);
574 SPARX5_P(33, SG2, SI, SFP);
576 SPARX5_P(35, SFP, TWI_SCL_M, EMMC);
577 SPARX5_P(36, SFP, TWI_SCL_M, EMMC);
578 SPARX5_P(37, SFP, NONE, EMMC);
585 SPARX5_P(44, SI, SFP, EMMC);
586 SPARX5_P(45, SI, SFP, EMMC);
587 SPARX5_P(46, NONE, SFP, EMMC);
588 SPARX5_P(47, NONE, SFP, EMMC);
589 SPARX5_P(48, TWI3, SI, SFP);
590 SPARX5_P(49, TWI3, NONE, SFP);
591 SPARX5_P(50, SFP, NONE, TWI_SCL_M);
592 SPARX5_P(51, SFP, SI, TWI_SCL_M);
593 SPARX5_P(52, SFP, MIIM, TWI_SCL_M);
594 SPARX5_P(53, SFP, MIIM, TWI_SCL_M);
595 SPARX5_P(54, SFP, PTP2, TWI_SCL_M);
596 SPARX5_P(55, SFP, PTP3, PCI_WAKE);
597 SPARX5_P(56, MIIM, SFP, TWI_SCL_M);
598 SPARX5_P(57, MIIM, SFP, TWI_SCL_M);
599 SPARX5_P(58, MIIM, SFP, TWI_SCL_M);
600 SPARX5_P(59, MIIM, SFP, NONE);