Lines Matching +full:bank +full:- +full:width
1 // SPDX-License-Identifier: GPL-2.0-or-later
127 addr->port = pin / priv->bitcount; in sgpio_pin_to_addr()
128 addr->bit = pin % priv->bitcount; in sgpio_pin_to_addr()
133 return bit + port * priv->bitcount; in sgpio_addr_to_pin()
138 u32 __iomem *reg = &priv->regs[priv->properties->regoff[rno] + off]; in sgpio_readl()
146 u32 __iomem *reg = &priv->regs[priv->properties->regoff[rno] + off]; in sgpio_writel()
154 u32 __iomem *reg = &priv->regs[priv->properties->regoff[rno] + off]; in sgpio_clrsetbits()
165 int width = priv->bitcount - 1; in sgpio_configure_bitstream() local
168 switch (priv->properties->arch) { in sgpio_configure_bitstream()
172 FIELD_PREP(SGPIO_LUTON_PORT_WIDTH, width); in sgpio_configure_bitstream()
177 FIELD_PREP(SGPIO_OCELOT_PORT_WIDTH, width); in sgpio_configure_bitstream()
182 FIELD_PREP(SGPIO_SPARX5_PORT_WIDTH, width); in sgpio_configure_bitstream()
194 switch (priv->properties->arch) { in sgpio_configure_clock()
217 unsigned int bit = SGPIO_SRC_BITS * addr->bit; in sgpio_output_set()
220 switch (priv->properties->arch) { in sgpio_output_set()
236 sgpio_clrsetbits(priv, REG_PORT_CONFIG, addr->port, clr, set); in sgpio_output_set()
242 u32 val, portval = sgpio_readl(priv, REG_PORT_CONFIG, addr->port); in sgpio_output_get()
243 unsigned int bit = SGPIO_SRC_BITS * addr->bit; in sgpio_output_get()
245 switch (priv->properties->arch) { in sgpio_output_get()
265 return !!(sgpio_readl(priv, REG_INPUT_DATA, addr->bit) & BIT(addr->port)); in sgpio_input_get()
271 struct sgpio_bank *bank = pinctrl_dev_get_drvdata(pctldev); in sgpio_pinconf_get() local
273 struct sgpio_priv *priv = bank->priv; in sgpio_pinconf_get()
281 val = bank->is_input; in sgpio_pinconf_get()
285 val = !bank->is_input; in sgpio_pinconf_get()
289 if (bank->is_input) in sgpio_pinconf_get()
290 return -EINVAL; in sgpio_pinconf_get()
295 return -ENOTSUPP; in sgpio_pinconf_get()
306 struct sgpio_bank *bank = pinctrl_dev_get_drvdata(pctldev); in sgpio_pinconf_set() local
307 struct sgpio_priv *priv = bank->priv; in sgpio_pinconf_set()
320 if (bank->is_input) in sgpio_pinconf_set()
321 return -EINVAL; in sgpio_pinconf_set()
326 err = -ENOTSUPP; in sgpio_pinconf_set()
372 struct sgpio_bank *bank = pinctrl_dev_get_drvdata(pctldev); in sgpio_gpio_set_direction() local
374 return (input == bank->is_input) ? 0 : -EINVAL; in sgpio_gpio_set_direction()
381 struct sgpio_bank *bank = pinctrl_dev_get_drvdata(pctldev); in sgpio_gpio_request_enable() local
382 struct sgpio_priv *priv = bank->priv; in sgpio_gpio_request_enable()
387 if ((priv->ports & BIT(addr.port)) == 0) { in sgpio_gpio_request_enable()
388 dev_warn(priv->dev, "Request port %d.%d: Port is not enabled\n", in sgpio_gpio_request_enable()
390 return -EINVAL; in sgpio_gpio_request_enable()
407 struct sgpio_bank *bank = pinctrl_dev_get_drvdata(pctldev); in sgpio_pctl_get_groups_count() local
409 return bank->pctl_desc.npins; in sgpio_pctl_get_groups_count()
415 struct sgpio_bank *bank = pinctrl_dev_get_drvdata(pctldev); in sgpio_pctl_get_group_name() local
417 return bank->pctl_desc.pins[group].name; in sgpio_pctl_get_group_name()
425 struct sgpio_bank *bank = pinctrl_dev_get_drvdata(pctldev); in sgpio_pctl_get_group_pins() local
427 *pins = &bank->pctl_desc.pins[group].number; in sgpio_pctl_get_group_pins()
443 struct sgpio_bank *bank = gpiochip_get_data(gc); in microchip_sgpio_direction_input() local
445 /* Fixed-position function */ in microchip_sgpio_direction_input()
446 return bank->is_input ? 0 : -EINVAL; in microchip_sgpio_direction_input()
452 struct sgpio_bank *bank = gpiochip_get_data(gc); in microchip_sgpio_direction_output() local
453 struct sgpio_priv *priv = bank->priv; in microchip_sgpio_direction_output()
456 /* Fixed-position function */ in microchip_sgpio_direction_output()
457 if (bank->is_input) in microchip_sgpio_direction_output()
458 return -EINVAL; in microchip_sgpio_direction_output()
469 struct sgpio_bank *bank = gpiochip_get_data(gc); in microchip_sgpio_get_direction() local
471 return bank->is_input ? GPIO_LINE_DIRECTION_IN : GPIO_LINE_DIRECTION_OUT; in microchip_sgpio_get_direction()
482 struct sgpio_bank *bank = gpiochip_get_data(gc); in microchip_sgpio_get_value() local
483 struct sgpio_priv *priv = bank->priv; in microchip_sgpio_get_value()
488 return bank->is_input ? sgpio_input_get(priv, &addr) : sgpio_output_get(priv, &addr); in microchip_sgpio_get_value()
495 struct sgpio_bank *bank = gpiochip_get_data(gc); in microchip_sgpio_of_xlate() local
496 struct sgpio_priv *priv = bank->priv; in microchip_sgpio_of_xlate()
503 if (gpiospec->args[0] > SGPIO_BITS_PER_WORD || in microchip_sgpio_of_xlate()
504 gpiospec->args[1] > priv->bitcount) in microchip_sgpio_of_xlate()
505 return -EINVAL; in microchip_sgpio_of_xlate()
507 pin = sgpio_addr_to_pin(priv, gpiospec->args[0], gpiospec->args[1]); in microchip_sgpio_of_xlate()
509 if (pin > gc->ngpio) in microchip_sgpio_of_xlate()
510 return -EINVAL; in microchip_sgpio_of_xlate()
513 *flags = gpiospec->args[2]; in microchip_sgpio_of_xlate()
520 const char *range_property_name = "microchip,sgpio-port-ranges"; in microchip_sgpio_get_ports()
521 struct device *dev = priv->dev; in microchip_sgpio_get_ports()
529 nranges == -EINVAL ? "Missing" : "Invalid", in microchip_sgpio_get_ports()
531 return -EINVAL; in microchip_sgpio_get_ports()
547 dev_err(dev, "Ill-formed port-range [%d:%d]\n", in microchip_sgpio_get_ports()
550 priv->ports |= GENMASK(end, start); in microchip_sgpio_get_ports()
561 struct sgpio_bank *bank = gpiochip_get_data(chip); in microchip_sgpio_irq_settype() local
566 sgpio_pin_to_addr(bank->priv, gpio, &addr); in microchip_sgpio_irq_settype()
569 ena = sgpio_readl(bank->priv, REG_INT_ENABLE, addr.bit); in microchip_sgpio_irq_settype()
570 sgpio_writel(bank->priv, ena & ~BIT(addr.port), REG_INT_ENABLE, addr.bit); in microchip_sgpio_irq_settype()
573 sgpio_clrsetbits(bank->priv, REG_INT_TRIGGER, addr.bit, in microchip_sgpio_irq_settype()
575 sgpio_clrsetbits(bank->priv, REG_INT_TRIGGER, SGPIO_MAX_BITS + addr.bit, in microchip_sgpio_irq_settype()
579 sgpio_clrsetbits(bank->priv, REG_INT_POLARITY, addr.bit, in microchip_sgpio_irq_settype()
582 /* Possibly re-enable interrupts */ in microchip_sgpio_irq_settype()
583 sgpio_writel(bank->priv, ena, REG_INT_ENABLE, addr.bit); in microchip_sgpio_irq_settype()
591 struct sgpio_bank *bank = gpiochip_get_data(chip); in microchip_sgpio_irq_setreg() local
595 sgpio_pin_to_addr(bank->priv, gpio, &addr); in microchip_sgpio_irq_setreg()
598 sgpio_clrsetbits(bank->priv, reg, addr.bit, BIT(addr.port), 0); in microchip_sgpio_irq_setreg()
600 sgpio_clrsetbits(bank->priv, reg, addr.bit, 0, BIT(addr.port)); in microchip_sgpio_irq_setreg()
644 return -EINVAL; in microchip_sgpio_irq_set_type()
662 struct sgpio_bank *bank = gpiochip_get_data(chip); in sgpio_irq_handler() local
663 struct sgpio_priv *priv = bank->priv; in sgpio_irq_handler()
667 for (bit = 0; bit < priv->bitcount; bit++) { in sgpio_irq_handler()
676 generic_handle_domain_irq(chip->irq.domain, gpio); in sgpio_irq_handler()
691 struct sgpio_bank *bank; in microchip_sgpio_register_bank() local
696 /* Get overall bank struct */ in microchip_sgpio_register_bank()
697 bank = (bankno == 0) ? &priv->in : &priv->out; in microchip_sgpio_register_bank()
698 bank->priv = priv; in microchip_sgpio_register_bank()
701 dev_info(dev, "failed to get number of gpios for bank%d\n", in microchip_sgpio_register_bank()
706 priv->bitcount = ngpios / SGPIO_BITS_PER_WORD; in microchip_sgpio_register_bank()
707 if (priv->bitcount > SGPIO_MAX_BITS) { in microchip_sgpio_register_bank()
708 dev_err(dev, "Bit width exceeds maximum (%d)\n", in microchip_sgpio_register_bank()
710 return -EINVAL; in microchip_sgpio_register_bank()
713 pctl_desc = &bank->pctl_desc; in microchip_sgpio_register_bank()
714 pctl_desc->name = devm_kasprintf(dev, GFP_KERNEL, "%s-%sput", in microchip_sgpio_register_bank()
716 bank->is_input ? "in" : "out"); in microchip_sgpio_register_bank()
717 pctl_desc->pctlops = &sgpio_pctl_ops; in microchip_sgpio_register_bank()
718 pctl_desc->pmxops = &sgpio_pmx_ops; in microchip_sgpio_register_bank()
719 pctl_desc->confops = &sgpio_confops; in microchip_sgpio_register_bank()
720 pctl_desc->owner = THIS_MODULE; in microchip_sgpio_register_bank()
724 return -ENOMEM; in microchip_sgpio_register_bank()
726 pctl_desc->npins = ngpios; in microchip_sgpio_register_bank()
727 pctl_desc->pins = pins; in microchip_sgpio_register_bank()
737 bank->is_input ? 'I' : 'O', in microchip_sgpio_register_bank()
740 return -ENOMEM; in microchip_sgpio_register_bank()
743 pctldev = devm_pinctrl_register(dev, pctl_desc, bank); in microchip_sgpio_register_bank()
747 gc = &bank->gpio; in microchip_sgpio_register_bank()
748 gc->label = pctl_desc->name; in microchip_sgpio_register_bank()
749 gc->parent = dev; in microchip_sgpio_register_bank()
750 gc->of_node = to_of_node(fwnode); in microchip_sgpio_register_bank()
751 gc->owner = THIS_MODULE; in microchip_sgpio_register_bank()
752 gc->get_direction = microchip_sgpio_get_direction; in microchip_sgpio_register_bank()
753 gc->direction_input = microchip_sgpio_direction_input; in microchip_sgpio_register_bank()
754 gc->direction_output = microchip_sgpio_direction_output; in microchip_sgpio_register_bank()
755 gc->get = microchip_sgpio_get_value; in microchip_sgpio_register_bank()
756 gc->set = microchip_sgpio_set_value; in microchip_sgpio_register_bank()
757 gc->request = gpiochip_generic_request; in microchip_sgpio_register_bank()
758 gc->free = gpiochip_generic_free; in microchip_sgpio_register_bank()
759 gc->of_xlate = microchip_sgpio_of_xlate; in microchip_sgpio_register_bank()
760 gc->of_gpio_n_cells = 3; in microchip_sgpio_register_bank()
761 gc->base = -1; in microchip_sgpio_register_bank()
762 gc->ngpio = ngpios; in microchip_sgpio_register_bank()
764 if (bank->is_input && priv->properties->flags & SGPIO_FLAGS_HAS_IRQ) { in microchip_sgpio_register_bank()
768 struct gpio_irq_chip *girq = &gc->irq; in microchip_sgpio_register_bank()
770 girq->chip = devm_kmemdup(dev, µchip_sgpio_irqchip, in microchip_sgpio_register_bank()
773 if (!girq->chip) in microchip_sgpio_register_bank()
774 return -ENOMEM; in microchip_sgpio_register_bank()
775 girq->parent_handler = sgpio_irq_handler; in microchip_sgpio_register_bank()
776 girq->num_parents = 1; in microchip_sgpio_register_bank()
777 girq->parents = devm_kcalloc(dev, 1, in microchip_sgpio_register_bank()
778 sizeof(*girq->parents), in microchip_sgpio_register_bank()
780 if (!girq->parents) in microchip_sgpio_register_bank()
781 return -ENOMEM; in microchip_sgpio_register_bank()
782 girq->parents[0] = irq; in microchip_sgpio_register_bank()
783 girq->default_type = IRQ_TYPE_NONE; in microchip_sgpio_register_bank()
784 girq->handler = handle_bad_irq; in microchip_sgpio_register_bank()
794 ret = devm_gpiochip_add_data(dev, gc, bank); in microchip_sgpio_register_bank()
804 struct device *dev = &pdev->dev; in microchip_sgpio_probe()
812 return -ENOMEM; in microchip_sgpio_probe()
814 priv->dev = dev; in microchip_sgpio_probe()
821 if (device_property_read_u32(dev, "bus-frequency", &priv->clock)) in microchip_sgpio_probe()
822 priv->clock = 12500000; in microchip_sgpio_probe()
823 if (priv->clock == 0 || priv->clock > (div_clock / 2)) { in microchip_sgpio_probe()
824 dev_err(dev, "Invalid frequency %d\n", priv->clock); in microchip_sgpio_probe()
825 return -EINVAL; in microchip_sgpio_probe()
828 priv->regs = devm_platform_ioremap_resource(pdev, 0); in microchip_sgpio_probe()
829 if (IS_ERR(priv->regs)) in microchip_sgpio_probe()
830 return PTR_ERR(priv->regs); in microchip_sgpio_probe()
831 priv->properties = device_get_match_data(dev); in microchip_sgpio_probe()
832 priv->in.is_input = true; in microchip_sgpio_probe()
842 return -EINVAL; in microchip_sgpio_probe()
854 if (priv->in.gpio.ngpio != priv->out.gpio.ngpio) { in microchip_sgpio_probe()
856 return -ERANGE; in microchip_sgpio_probe()
861 val = max(2U, div_clock / priv->clock); in microchip_sgpio_probe()
866 sgpio_writel(priv, priv->ports, REG_PORT_ENABLE, 0); in microchip_sgpio_probe()
873 .compatible = "microchip,sparx5-sgpio",
876 .compatible = "mscc,luton-sgpio",
879 .compatible = "mscc,ocelot-sgpio",
888 .name = "pinctrl-microchip-sgpio",