140 static const u32 jz4730_pull_ups[4] = {
144 static const u32 jz4730_pull_downs[4] = {
148 static int jz4730_mmc_1bit_pins[] = { 0x27, 0x26, 0x22, };
149 static int jz4730_mmc_4bit_pins[] = { 0x23, 0x24, 0x25, };
150 static int jz4730_uart0_data_pins[] = { 0x7e, 0x7f, };
151 static int jz4730_uart1_data_pins[] = { 0x18, 0x19, };
152 static int jz4730_uart2_data_pins[] = { 0x6f, 0x7d, };
153 static int jz4730_uart3_data_pins[] = { 0x10, 0x15, };
154 static int jz4730_uart3_hwflow_pins[] = { 0x11, 0x17, };
155 static int jz4730_lcd_8bit_pins[] = {
159 static int jz4730_lcd_16bit_pins[] = {
162 static int jz4730_lcd_special_pins[] = { 0x3d, 0x3c, 0x3e, 0x3f, };
163 static int jz4730_lcd_generic_pins[] = { 0x3b, };
164 static int jz4730_nand_cs1_pins[] = { 0x53, };
165 static int jz4730_nand_cs2_pins[] = { 0x54, };
166 static int jz4730_nand_cs3_pins[] = { 0x55, };
167 static int jz4730_nand_cs4_pins[] = { 0x56, };
168 static int jz4730_nand_cs5_pins[] = { 0x57, };
169 static int jz4730_pwm_pwm0_pins[] = { 0x5e, };
170 static int jz4730_pwm_pwm1_pins[] = { 0x5f, };
172 static u8 jz4730_lcd_8bit_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, };
174 static const struct group_desc jz4730_groups[] = {
195 static const char *jz4730_mmc_groups[] = { "mmc-1bit", "mmc-4bit", };
196 static const char *jz4730_uart0_groups[] = { "uart0-data", };
197 static const char *jz4730_uart1_groups[] = { "uart1-data", };
198 static const char *jz4730_uart2_groups[] = { "uart2-data", };
199 static const char *jz4730_uart3_groups[] = { "uart3-data", "uart3-hwflow", };
200 static const char *jz4730_lcd_groups[] = {
203 static const char *jz4730_nand_groups[] = {
206 static const char *jz4730_pwm0_groups[] = { "pwm0", };
207 static const char *jz4730_pwm1_groups[] = { "pwm1", };
209 static const struct function_desc jz4730_functions[] = {
221 static const struct ingenic_chip_info jz4730_chip_info = {
233 static const u32 jz4740_pull_ups[4] = {
237 static const u32 jz4740_pull_downs[4] = {
241 static int jz4740_mmc_1bit_pins[] = { 0x69, 0x68, 0x6a, };
242 static int jz4740_mmc_4bit_pins[] = { 0x6b, 0x6c, 0x6d, };
243 static int jz4740_uart0_data_pins[] = { 0x7a, 0x79, };
244 static int jz4740_uart0_hwflow_pins[] = { 0x7e, 0x7f, };
245 static int jz4740_uart1_data_pins[] = { 0x7e, 0x7f, };
246 static int jz4740_lcd_8bit_pins[] = {
250 static int jz4740_lcd_16bit_pins[] = {
253 static int jz4740_lcd_18bit_pins[] = { 0x50, 0x51, };
254 static int jz4740_lcd_special_pins[] = { 0x31, 0x32, 0x56, 0x57, };
255 static int jz4740_lcd_generic_pins[] = { 0x55, };
256 static int jz4740_nand_cs1_pins[] = { 0x39, };
257 static int jz4740_nand_cs2_pins[] = { 0x3a, };
258 static int jz4740_nand_cs3_pins[] = { 0x3b, };
259 static int jz4740_nand_cs4_pins[] = { 0x3c, };
260 static int jz4740_nand_fre_fwe_pins[] = { 0x5c, 0x5d, };
261 static int jz4740_pwm_pwm0_pins[] = { 0x77, };
262 static int jz4740_pwm_pwm1_pins[] = { 0x78, };
263 static int jz4740_pwm_pwm2_pins[] = { 0x79, };
264 static int jz4740_pwm_pwm3_pins[] = { 0x7a, };
265 static int jz4740_pwm_pwm4_pins[] = { 0x7b, };
266 static int jz4740_pwm_pwm5_pins[] = { 0x7c, };
267 static int jz4740_pwm_pwm6_pins[] = { 0x7e, };
268 static int jz4740_pwm_pwm7_pins[] = { 0x7f, };
270 static const struct group_desc jz4740_groups[] = {
296 static const char *jz4740_mmc_groups[] = { "mmc-1bit", "mmc-4bit", };
297 static const char *jz4740_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
298 static const char *jz4740_uart1_groups[] = { "uart1-data", };
299 static const char *jz4740_lcd_groups[] = {
302 static const char *jz4740_nand_groups[] = {
305 static const char *jz4740_pwm0_groups[] = { "pwm0", };
306 static const char *jz4740_pwm1_groups[] = { "pwm1", };
307 static const char *jz4740_pwm2_groups[] = { "pwm2", };
308 static const char *jz4740_pwm3_groups[] = { "pwm3", };
309 static const char *jz4740_pwm4_groups[] = { "pwm4", };
310 static const char *jz4740_pwm5_groups[] = { "pwm5", };
311 static const char *jz4740_pwm6_groups[] = { "pwm6", };
312 static const char *jz4740_pwm7_groups[] = { "pwm7", };
314 static const struct function_desc jz4740_functions[] = {
330 static const struct ingenic_chip_info jz4740_chip_info = {
342 static int jz4725b_mmc0_1bit_pins[] = { 0x48, 0x49, 0x5c, };
343 static int jz4725b_mmc0_4bit_pins[] = { 0x5d, 0x5b, 0x56, };
344 static int jz4725b_mmc1_1bit_pins[] = { 0x7a, 0x7b, 0x7c, };
345 static int jz4725b_mmc1_4bit_pins[] = { 0x7d, 0x7e, 0x7f, };
346 static int jz4725b_uart_data_pins[] = { 0x4c, 0x4d, };
347 static int jz4725b_lcd_8bit_pins[] = {
351 static int jz4725b_lcd_16bit_pins[] = {
354 static int jz4725b_lcd_18bit_pins[] = { 0x70, 0x71, };
355 static int jz4725b_lcd_24bit_pins[] = { 0x76, 0x77, 0x78, 0x79, };
356 static int jz4725b_lcd_special_pins[] = { 0x76, 0x77, 0x78, 0x79, };
357 static int jz4725b_lcd_generic_pins[] = { 0x75, };
358 static int jz4725b_nand_cs1_pins[] = { 0x55, };
359 static int jz4725b_nand_cs2_pins[] = { 0x56, };
360 static int jz4725b_nand_cs3_pins[] = { 0x57, };
361 static int jz4725b_nand_cs4_pins[] = { 0x58, };
362 static int jz4725b_nand_cle_ale_pins[] = { 0x48, 0x49 };
363 static int jz4725b_nand_fre_fwe_pins[] = { 0x5c, 0x5d };
364 static int jz4725b_pwm_pwm0_pins[] = { 0x4a, };
365 static int jz4725b_pwm_pwm1_pins[] = { 0x4b, };
366 static int jz4725b_pwm_pwm2_pins[] = { 0x4c, };
367 static int jz4725b_pwm_pwm3_pins[] = { 0x4d, };
368 static int jz4725b_pwm_pwm4_pins[] = { 0x4e, };
369 static int jz4725b_pwm_pwm5_pins[] = { 0x4f, };
371 static u8 jz4725b_mmc0_4bit_funcs[] = { 1, 0, 1, };
373 static const struct group_desc jz4725b_groups[] = {
400 static const char *jz4725b_mmc0_groups[] = { "mmc0-1bit", "mmc0-4bit", };
401 static const char *jz4725b_mmc1_groups[] = { "mmc1-1bit", "mmc1-4bit", };
402 static const char *jz4725b_uart_groups[] = { "uart-data", };
403 static const char *jz4725b_lcd_groups[] = {
407 static const char *jz4725b_nand_groups[] = {
411 static const char *jz4725b_pwm0_groups[] = { "pwm0", };
412 static const char *jz4725b_pwm1_groups[] = { "pwm1", };
413 static const char *jz4725b_pwm2_groups[] = { "pwm2", };
414 static const char *jz4725b_pwm3_groups[] = { "pwm3", };
415 static const char *jz4725b_pwm4_groups[] = { "pwm4", };
416 static const char *jz4725b_pwm5_groups[] = { "pwm5", };
418 static const struct function_desc jz4725b_functions[] = {
432 static const struct ingenic_chip_info jz4725b_chip_info = {
444 static const u32 jz4750_pull_ups[6] = {
448 static const u32 jz4750_pull_downs[6] = {
452 static int jz4750_uart0_data_pins[] = { 0xa4, 0xa5, };
453 static int jz4750_uart0_hwflow_pins[] = { 0xa6, 0xa7, };
454 static int jz4750_uart1_data_pins[] = { 0x90, 0x91, };
455 static int jz4750_uart1_hwflow_pins[] = { 0x92, 0x93, };
456 static int jz4750_uart2_data_pins[] = { 0x9b, 0x9a, };
457 static int jz4750_uart3_data_pins[] = { 0xb0, 0xb1, };
458 static int jz4750_uart3_hwflow_pins[] = { 0xb2, 0xb3, };
459 static int jz4750_mmc0_1bit_pins[] = { 0xa8, 0xa9, 0xa0, };
460 static int jz4750_mmc0_4bit_pins[] = { 0xa1, 0xa2, 0xa3, };
461 static int jz4750_mmc0_8bit_pins[] = { 0xa4, 0xa5, 0xa6, 0xa7, };
462 static int jz4750_mmc1_1bit_pins[] = { 0xae, 0xaf, 0xaa, };
463 static int jz4750_mmc1_4bit_pins[] = { 0xab, 0xac, 0xad, };
464 static int jz4750_i2c_pins[] = { 0x8c, 0x8d, };
465 static int jz4750_cim_pins[] = {
469 static int jz4750_lcd_8bit_pins[] = {
473 static int jz4750_lcd_16bit_pins[] = {
476 static int jz4750_lcd_18bit_pins[] = { 0x70, 0x71, };
477 static int jz4750_lcd_24bit_pins[] = { 0x76, 0x77, 0x78, 0x79, 0xb2, 0xb3, };
478 static int jz4750_lcd_special_pins[] = { 0x76, 0x77, 0x78, 0x79, };
479 static int jz4750_lcd_generic_pins[] = { 0x75, };
480 static int jz4750_nand_cs1_pins[] = { 0x55, };
481 static int jz4750_nand_cs2_pins[] = { 0x56, };
482 static int jz4750_nand_cs3_pins[] = { 0x57, };
483 static int jz4750_nand_cs4_pins[] = { 0x58, };
484 static int jz4750_nand_fre_fwe_pins[] = { 0x5c, 0x5d, };
485 static int jz4750_pwm_pwm0_pins[] = { 0x94, };
486 static int jz4750_pwm_pwm1_pins[] = { 0x95, };
487 static int jz4750_pwm_pwm2_pins[] = { 0x96, };
488 static int jz4750_pwm_pwm3_pins[] = { 0x97, };
489 static int jz4750_pwm_pwm4_pins[] = { 0x98, };
490 static int jz4750_pwm_pwm5_pins[] = { 0x99, };
492 static const struct group_desc jz4750_groups[] = {
526 static const char *jz4750_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
527 static const char *jz4750_uart1_groups[] = { "uart1-data", "uart1-hwflow", };
528 static const char *jz4750_uart2_groups[] = { "uart2-data", };
529 static const char *jz4750_uart3_groups[] = { "uart3-data", "uart3-hwflow", };
530 static const char *jz4750_mmc0_groups[] = {
533 static const char *jz4750_mmc1_groups[] = { "mmc0-1bit", "mmc0-4bit", };
534 static const char *jz4750_i2c_groups[] = { "i2c-data", };
535 static const char *jz4750_cim_groups[] = { "cim-data", };
536 static const char *jz4750_lcd_groups[] = {
540 static const char *jz4750_nand_groups[] = {
543 static const char *jz4750_pwm0_groups[] = { "pwm0", };
544 static const char *jz4750_pwm1_groups[] = { "pwm1", };
545 static const char *jz4750_pwm2_groups[] = { "pwm2", };
546 static const char *jz4750_pwm3_groups[] = { "pwm3", };
547 static const char *jz4750_pwm4_groups[] = { "pwm4", };
548 static const char *jz4750_pwm5_groups[] = { "pwm5", };
550 static const struct function_desc jz4750_functions[] = {
569 static const struct ingenic_chip_info jz4750_chip_info = {
581 static const u32 jz4755_pull_ups[6] = {
585 static const u32 jz4755_pull_downs[6] = {
589 static int jz4755_uart0_data_pins[] = { 0x7c, 0x7d, };
590 static int jz4755_uart0_hwflow_pins[] = { 0x7e, 0x7f, };
591 static int jz4755_uart1_data_pins[] = { 0x97, 0x99, };
592 static int jz4755_uart2_data_pins[] = { 0x9f, };
593 static int jz4755_ssi_dt_b_pins[] = { 0x3b, };
594 static int jz4755_ssi_dt_f_pins[] = { 0xa1, };
595 static int jz4755_ssi_dr_b_pins[] = { 0x3c, };
596 static int jz4755_ssi_dr_f_pins[] = { 0xa2, };
597 static int jz4755_ssi_clk_b_pins[] = { 0x3a, };
598 static int jz4755_ssi_clk_f_pins[] = { 0xa0, };
599 static int jz4755_ssi_gpc_b_pins[] = { 0x3e, };
600 static int jz4755_ssi_gpc_f_pins[] = { 0xa4, };
601 static int jz4755_ssi_ce0_b_pins[] = { 0x3d, };
602 static int jz4755_ssi_ce0_f_pins[] = { 0xa3, };
603 static int jz4755_ssi_ce1_b_pins[] = { 0x3f, };
604 static int jz4755_ssi_ce1_f_pins[] = { 0xa5, };
605 static int jz4755_mmc0_1bit_pins[] = { 0x2f, 0x50, 0x5c, };
606 static int jz4755_mmc0_4bit_pins[] = { 0x5d, 0x5b, 0x51, };
607 static int jz4755_mmc1_1bit_pins[] = { 0x3a, 0x3d, 0x3c, };
608 static int jz4755_mmc1_4bit_pins[] = { 0x3b, 0x3e, 0x3f, };
609 static int jz4755_i2c_pins[] = { 0x8c, 0x8d, };
610 static int jz4755_cim_pins[] = {
614 static int jz4755_lcd_8bit_pins[] = {
618 static int jz4755_lcd_16bit_pins[] = {
621 static int jz4755_lcd_18bit_pins[] = { 0x70, 0x71, };
622 static int jz4755_lcd_24bit_pins[] = { 0x76, 0x77, 0x78, 0x79, 0x7a, 0x7b, };
623 static int jz4755_lcd_special_pins[] = { 0x76, 0x77, 0x78, 0x79, };
624 static int jz4755_lcd_generic_pins[] = { 0x75, };
625 static int jz4755_nand_cs1_pins[] = { 0x55, };
626 static int jz4755_nand_cs2_pins[] = { 0x56, };
627 static int jz4755_nand_cs3_pins[] = { 0x57, };
628 static int jz4755_nand_cs4_pins[] = { 0x58, };
629 static int jz4755_nand_fre_fwe_pins[] = { 0x5c, 0x5d, };
630 static int jz4755_pwm_pwm0_pins[] = { 0x94, };
631 static int jz4755_pwm_pwm1_pins[] = { 0xab, };
632 static int jz4755_pwm_pwm2_pins[] = { 0x96, };
633 static int jz4755_pwm_pwm3_pins[] = { 0x97, };
634 static int jz4755_pwm_pwm4_pins[] = { 0x98, };
635 static int jz4755_pwm_pwm5_pins[] = { 0x99, };
637 static u8 jz4755_mmc0_1bit_funcs[] = { 2, 2, 1, };
638 static u8 jz4755_mmc0_4bit_funcs[] = { 1, 0, 1, };
639 static u8 jz4755_lcd_24bit_funcs[] = { 1, 1, 1, 1, 0, 0, };
641 static const struct group_desc jz4755_groups[] = {
686 static const char *jz4755_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
687 static const char *jz4755_uart1_groups[] = { "uart1-data", };
688 static const char *jz4755_uart2_groups[] = { "uart2-data", };
689 static const char *jz4755_ssi_groups[] = {
697 static const char *jz4755_mmc0_groups[] = { "mmc0-1bit", "mmc0-4bit", };
698 static const char *jz4755_mmc1_groups[] = { "mmc0-1bit", "mmc0-4bit", };
699 static const char *jz4755_i2c_groups[] = { "i2c-data", };
700 static const char *jz4755_cim_groups[] = { "cim-data", };
701 static const char *jz4755_lcd_groups[] = {
705 static const char *jz4755_nand_groups[] = {
708 static const char *jz4755_pwm0_groups[] = { "pwm0", };
709 static const char *jz4755_pwm1_groups[] = { "pwm1", };
710 static const char *jz4755_pwm2_groups[] = { "pwm2", };
711 static const char *jz4755_pwm3_groups[] = { "pwm3", };
712 static const char *jz4755_pwm4_groups[] = { "pwm4", };
713 static const char *jz4755_pwm5_groups[] = { "pwm5", };
715 static const struct function_desc jz4755_functions[] = {
734 static const struct ingenic_chip_info jz4755_chip_info = {
746 static const u32 jz4760_pull_ups[6] = {
750 static const u32 jz4760_pull_downs[6] = {
754 static int jz4760_uart0_data_pins[] = { 0xa0, 0xa3, };
755 static int jz4760_uart0_hwflow_pins[] = { 0xa1, 0xa2, };
756 static int jz4760_uart1_data_pins[] = { 0x7a, 0x7c, };
757 static int jz4760_uart1_hwflow_pins[] = { 0x7b, 0x7d, };
758 static int jz4760_uart2_data_pins[] = { 0x5c, 0x5e, };
759 static int jz4760_uart2_hwflow_pins[] = { 0x5d, 0x5f, };
760 static int jz4760_uart3_data_pins[] = { 0x6c, 0x85, };
761 static int jz4760_uart3_hwflow_pins[] = { 0x88, 0x89, };
762 static int jz4760_ssi0_dt_a_pins[] = { 0x15, };
763 static int jz4760_ssi0_dt_b_pins[] = { 0x35, };
764 static int jz4760_ssi0_dt_d_pins[] = { 0x75, };
765 static int jz4760_ssi0_dt_e_pins[] = { 0x91, };
766 static int jz4760_ssi0_dr_a_pins[] = { 0x14, };
767 static int jz4760_ssi0_dr_b_pins[] = { 0x34, };
768 static int jz4760_ssi0_dr_d_pins[] = { 0x74, };
769 static int jz4760_ssi0_dr_e_pins[] = { 0x8e, };
770 static int jz4760_ssi0_clk_a_pins[] = { 0x12, };
771 static int jz4760_ssi0_clk_b_pins[] = { 0x3c, };
772 static int jz4760_ssi0_clk_d_pins[] = { 0x78, };
773 static int jz4760_ssi0_clk_e_pins[] = { 0x8f, };
774 static int jz4760_ssi0_gpc_b_pins[] = { 0x3e, };
775 static int jz4760_ssi0_gpc_d_pins[] = { 0x76, };
776 static int jz4760_ssi0_gpc_e_pins[] = { 0x93, };
777 static int jz4760_ssi0_ce0_a_pins[] = { 0x13, };
778 static int jz4760_ssi0_ce0_b_pins[] = { 0x3d, };
779 static int jz4760_ssi0_ce0_d_pins[] = { 0x79, };
780 static int jz4760_ssi0_ce0_e_pins[] = { 0x90, };
781 static int jz4760_ssi0_ce1_b_pins[] = { 0x3f, };
782 static int jz4760_ssi0_ce1_d_pins[] = { 0x77, };
783 static int jz4760_ssi0_ce1_e_pins[] = { 0x92, };
784 static int jz4760_ssi1_dt_b_9_pins[] = { 0x29, };
785 static int jz4760_ssi1_dt_b_21_pins[] = { 0x35, };
786 static int jz4760_ssi1_dt_d_12_pins[] = { 0x6c, };
787 static int jz4760_ssi1_dt_d_21_pins[] = { 0x75, };
788 static int jz4760_ssi1_dt_e_pins[] = { 0x91, };
789 static int jz4760_ssi1_dt_f_pins[] = { 0xa3, };
790 static int jz4760_ssi1_dr_b_6_pins[] = { 0x26, };
791 static int jz4760_ssi1_dr_b_20_pins[] = { 0x34, };
792 static int jz4760_ssi1_dr_d_13_pins[] = { 0x6d, };
793 static int jz4760_ssi1_dr_d_20_pins[] = { 0x74, };
794 static int jz4760_ssi1_dr_e_pins[] = { 0x8e, };
795 static int jz4760_ssi1_dr_f_pins[] = { 0xa0, };
796 static int jz4760_ssi1_clk_b_7_pins[] = { 0x27, };
797 static int jz4760_ssi1_clk_b_28_pins[] = { 0x3c, };
798 static int jz4760_ssi1_clk_d_pins[] = { 0x78, };
799 static int jz4760_ssi1_clk_e_7_pins[] = { 0x87, };
800 static int jz4760_ssi1_clk_e_15_pins[] = { 0x8f, };
801 static int jz4760_ssi1_clk_f_pins[] = { 0xa2, };
802 static int jz4760_ssi1_gpc_b_pins[] = { 0x3e, };
803 static int jz4760_ssi1_gpc_d_pins[] = { 0x76, };
804 static int jz4760_ssi1_gpc_e_pins[] = { 0x93, };
805 static int jz4760_ssi1_ce0_b_8_pins[] = { 0x28, };
806 static int jz4760_ssi1_ce0_b_29_pins[] = { 0x3d, };
807 static int jz4760_ssi1_ce0_d_pins[] = { 0x79, };
808 static int jz4760_ssi1_ce0_e_6_pins[] = { 0x86, };
809 static int jz4760_ssi1_ce0_e_16_pins[] = { 0x90, };
810 static int jz4760_ssi1_ce0_f_pins[] = { 0xa1, };
811 static int jz4760_ssi1_ce1_b_pins[] = { 0x3f, };
812 static int jz4760_ssi1_ce1_d_pins[] = { 0x77, };
813 static int jz4760_ssi1_ce1_e_pins[] = { 0x92, };
814 static int jz4760_mmc0_1bit_a_pins[] = { 0x12, 0x13, 0x14, };
815 static int jz4760_mmc0_4bit_a_pins[] = { 0x15, 0x16, 0x17, };
816 static int jz4760_mmc0_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
817 static int jz4760_mmc0_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
818 static int jz4760_mmc0_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };
819 static int jz4760_mmc1_1bit_d_pins[] = { 0x78, 0x79, 0x74, };
820 static int jz4760_mmc1_4bit_d_pins[] = { 0x75, 0x76, 0x77, };
821 static int jz4760_mmc1_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
822 static int jz4760_mmc1_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
823 static int jz4760_mmc1_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };
824 static int jz4760_mmc2_1bit_b_pins[] = { 0x3c, 0x3d, 0x34, };
825 static int jz4760_mmc2_4bit_b_pins[] = { 0x35, 0x3e, 0x3f, };
826 static int jz4760_mmc2_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
827 static int jz4760_mmc2_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
828 static int jz4760_mmc2_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };
829 static int jz4760_nemc_8bit_data_pins[] = {
832 static int jz4760_nemc_16bit_data_pins[] = {
835 static int jz4760_nemc_cle_ale_pins[] = { 0x20, 0x21, };
836 static int jz4760_nemc_addr_pins[] = { 0x22, 0x23, 0x24, 0x25, };
837 static int jz4760_nemc_rd_we_pins[] = { 0x10, 0x11, };
838 static int jz4760_nemc_frd_fwe_pins[] = { 0x12, 0x13, };
839 static int jz4760_nemc_wait_pins[] = { 0x1b, };
840 static int jz4760_nemc_cs1_pins[] = { 0x15, };
841 static int jz4760_nemc_cs2_pins[] = { 0x16, };
842 static int jz4760_nemc_cs3_pins[] = { 0x17, };
843 static int jz4760_nemc_cs4_pins[] = { 0x18, };
844 static int jz4760_nemc_cs5_pins[] = { 0x19, };
845 static int jz4760_nemc_cs6_pins[] = { 0x1a, };
846 static int jz4760_i2c0_pins[] = { 0x7e, 0x7f, };
847 static int jz4760_i2c1_pins[] = { 0x9e, 0x9f, };
848 static int jz4760_cim_pins[] = {
852 static int jz4760_lcd_8bit_pins[] = {
856 static int jz4760_lcd_16bit_pins[] = {
859 static int jz4760_lcd_18bit_pins[] = {
862 static int jz4760_lcd_24bit_pins[] = {
865 static int jz4760_lcd_special_pins[] = { 0x54, 0x4a, 0x41, 0x40, };
866 static int jz4760_lcd_generic_pins[] = { 0x49, };
867 static int jz4760_pwm_pwm0_pins[] = { 0x80, };
868 static int jz4760_pwm_pwm1_pins[] = { 0x81, };
869 static int jz4760_pwm_pwm2_pins[] = { 0x82, };
870 static int jz4760_pwm_pwm3_pins[] = { 0x83, };
871 static int jz4760_pwm_pwm4_pins[] = { 0x84, };
872 static int jz4760_pwm_pwm5_pins[] = { 0x85, };
873 static int jz4760_pwm_pwm6_pins[] = { 0x6a, };
874 static int jz4760_pwm_pwm7_pins[] = { 0x6b, };
875 static int jz4760_otg_pins[] = { 0x8a, };
877 static u8 jz4760_uart3_data_funcs[] = { 0, 1, };
878 static u8 jz4760_mmc0_1bit_a_funcs[] = { 1, 1, 0, };
880 static const struct group_desc jz4760_groups[] = {
991 static const char *jz4760_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
992 static const char *jz4760_uart1_groups[] = { "uart1-data", "uart1-hwflow", };
993 static const char *jz4760_uart2_groups[] = { "uart2-data", "uart2-hwflow", };
994 static const char *jz4760_uart3_groups[] = { "uart3-data", "uart3-hwflow", };
995 static const char *jz4760_ssi0_groups[] = {
1003 static const char *jz4760_ssi1_groups[] = {
1011 static const char *jz4760_mmc0_groups[] = {
1015 static const char *jz4760_mmc1_groups[] = {
1019 static const char *jz4760_mmc2_groups[] = {
1023 static const char *jz4760_nemc_groups[] = {
1027 static const char *jz4760_cs1_groups[] = { "nemc-cs1", };
1028 static const char *jz4760_cs2_groups[] = { "nemc-cs2", };
1029 static const char *jz4760_cs3_groups[] = { "nemc-cs3", };
1030 static const char *jz4760_cs4_groups[] = { "nemc-cs4", };
1031 static const char *jz4760_cs5_groups[] = { "nemc-cs5", };
1032 static const char *jz4760_cs6_groups[] = { "nemc-cs6", };
1033 static const char *jz4760_i2c0_groups[] = { "i2c0-data", };
1034 static const char *jz4760_i2c1_groups[] = { "i2c1-data", };
1035 static const char *jz4760_cim_groups[] = { "cim-data", };
1036 static const char *jz4760_lcd_groups[] = {
1040 static const char *jz4760_pwm0_groups[] = { "pwm0", };
1041 static const char *jz4760_pwm1_groups[] = { "pwm1", };
1042 static const char *jz4760_pwm2_groups[] = { "pwm2", };
1043 static const char *jz4760_pwm3_groups[] = { "pwm3", };
1044 static const char *jz4760_pwm4_groups[] = { "pwm4", };
1045 static const char *jz4760_pwm5_groups[] = { "pwm5", };
1046 static const char *jz4760_pwm6_groups[] = { "pwm6", };
1047 static const char *jz4760_pwm7_groups[] = { "pwm7", };
1048 static const char *jz4760_otg_groups[] = { "otg-vbus", };
1050 static const struct function_desc jz4760_functions[] = {
1082 static const struct ingenic_chip_info jz4760_chip_info = {
1094 static const u32 jz4770_pull_ups[6] = {
1098 static const u32 jz4770_pull_downs[6] = {
1102 static int jz4770_uart0_data_pins[] = { 0xa0, 0xa3, };
1103 static int jz4770_uart0_hwflow_pins[] = { 0xa1, 0xa2, };
1104 static int jz4770_uart1_data_pins[] = { 0x7a, 0x7c, };
1105 static int jz4770_uart1_hwflow_pins[] = { 0x7b, 0x7d, };
1106 static int jz4770_uart2_data_pins[] = { 0x5c, 0x5e, };
1107 static int jz4770_uart2_hwflow_pins[] = { 0x5d, 0x5f, };
1108 static int jz4770_uart3_data_pins[] = { 0x6c, 0x85, };
1109 static int jz4770_uart3_hwflow_pins[] = { 0x88, 0x89, };
1110 static int jz4770_ssi0_dt_a_pins[] = { 0x15, };
1111 static int jz4770_ssi0_dt_b_pins[] = { 0x35, };
1112 static int jz4770_ssi0_dt_d_pins[] = { 0x75, };
1113 static int jz4770_ssi0_dt_e_pins[] = { 0x91, };
1114 static int jz4770_ssi0_dr_a_pins[] = { 0x14, };
1115 static int jz4770_ssi0_dr_b_pins[] = { 0x34, };
1116 static int jz4770_ssi0_dr_d_pins[] = { 0x74, };
1117 static int jz4770_ssi0_dr_e_pins[] = { 0x8e, };
1118 static int jz4770_ssi0_clk_a_pins[] = { 0x12, };
1119 static int jz4770_ssi0_clk_b_pins[] = { 0x3c, };
1120 static int jz4770_ssi0_clk_d_pins[] = { 0x78, };
1121 static int jz4770_ssi0_clk_e_pins[] = { 0x8f, };
1122 static int jz4770_ssi0_gpc_b_pins[] = { 0x3e, };
1123 static int jz4770_ssi0_gpc_d_pins[] = { 0x76, };
1124 static int jz4770_ssi0_gpc_e_pins[] = { 0x93, };
1125 static int jz4770_ssi0_ce0_a_pins[] = { 0x13, };
1126 static int jz4770_ssi0_ce0_b_pins[] = { 0x3d, };
1127 static int jz4770_ssi0_ce0_d_pins[] = { 0x79, };
1128 static int jz4770_ssi0_ce0_e_pins[] = { 0x90, };
1129 static int jz4770_ssi0_ce1_b_pins[] = { 0x3f, };
1130 static int jz4770_ssi0_ce1_d_pins[] = { 0x77, };
1131 static int jz4770_ssi0_ce1_e_pins[] = { 0x92, };
1132 static int jz4770_ssi1_dt_b_pins[] = { 0x35, };
1133 static int jz4770_ssi1_dt_d_pins[] = { 0x75, };
1134 static int jz4770_ssi1_dt_e_pins[] = { 0x91, };
1135 static int jz4770_ssi1_dr_b_pins[] = { 0x34, };
1136 static int jz4770_ssi1_dr_d_pins[] = { 0x74, };
1137 static int jz4770_ssi1_dr_e_pins[] = { 0x8e, };
1138 static int jz4770_ssi1_clk_b_pins[] = { 0x3c, };
1139 static int jz4770_ssi1_clk_d_pins[] = { 0x78, };
1140 static int jz4770_ssi1_clk_e_pins[] = { 0x8f, };
1141 static int jz4770_ssi1_gpc_b_pins[] = { 0x3e, };
1142 static int jz4770_ssi1_gpc_d_pins[] = { 0x76, };
1143 static int jz4770_ssi1_gpc_e_pins[] = { 0x93, };
1144 static int jz4770_ssi1_ce0_b_pins[] = { 0x3d, };
1145 static int jz4770_ssi1_ce0_d_pins[] = { 0x79, };
1146 static int jz4770_ssi1_ce0_e_pins[] = { 0x90, };
1147 static int jz4770_ssi1_ce1_b_pins[] = { 0x3f, };
1148 static int jz4770_ssi1_ce1_d_pins[] = { 0x77, };
1149 static int jz4770_ssi1_ce1_e_pins[] = { 0x92, };
1150 static int jz4770_mmc0_1bit_a_pins[] = { 0x12, 0x13, 0x14, };
1151 static int jz4770_mmc0_4bit_a_pins[] = { 0x15, 0x16, 0x17, };
1152 static int jz4770_mmc0_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
1153 static int jz4770_mmc0_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
1154 static int jz4770_mmc0_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };
1155 static int jz4770_mmc1_1bit_d_pins[] = { 0x78, 0x79, 0x74, };
1156 static int jz4770_mmc1_4bit_d_pins[] = { 0x75, 0x76, 0x77, };
1157 static int jz4770_mmc1_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
1158 static int jz4770_mmc1_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
1159 static int jz4770_mmc1_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };
1160 static int jz4770_mmc2_1bit_b_pins[] = { 0x3c, 0x3d, 0x34, };
1161 static int jz4770_mmc2_4bit_b_pins[] = { 0x35, 0x3e, 0x3f, };
1162 static int jz4770_mmc2_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
1163 static int jz4770_mmc2_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
1164 static int jz4770_mmc2_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };
1165 static int jz4770_nemc_8bit_data_pins[] = {
1168 static int jz4770_nemc_16bit_data_pins[] = {
1171 static int jz4770_nemc_cle_ale_pins[] = { 0x20, 0x21, };
1172 static int jz4770_nemc_addr_pins[] = { 0x22, 0x23, 0x24, 0x25, };
1173 static int jz4770_nemc_rd_we_pins[] = { 0x10, 0x11, };
1174 static int jz4770_nemc_frd_fwe_pins[] = { 0x12, 0x13, };
1175 static int jz4770_nemc_wait_pins[] = { 0x1b, };
1176 static int jz4770_nemc_cs1_pins[] = { 0x15, };
1177 static int jz4770_nemc_cs2_pins[] = { 0x16, };
1178 static int jz4770_nemc_cs3_pins[] = { 0x17, };
1179 static int jz4770_nemc_cs4_pins[] = { 0x18, };
1180 static int jz4770_nemc_cs5_pins[] = { 0x19, };
1181 static int jz4770_nemc_cs6_pins[] = { 0x1a, };
1182 static int jz4770_i2c0_pins[] = { 0x7e, 0x7f, };
1183 static int jz4770_i2c1_pins[] = { 0x9e, 0x9f, };
1184 static int jz4770_i2c2_pins[] = { 0xb0, 0xb1, };
1185 static int jz4770_cim_8bit_pins[] = {
1189 static int jz4770_cim_12bit_pins[] = {
1192 static int jz4770_lcd_8bit_pins[] = {
1196 static int jz4770_lcd_16bit_pins[] = {
1199 static int jz4770_lcd_18bit_pins[] = {
1202 static int jz4770_lcd_24bit_pins[] = {
1208 static int jz4770_lcd_special_pins[] = { 0x54, 0x4a, 0x41, 0x40, };
1209 static int jz4770_lcd_generic_pins[] = { 0x49, };
1210 static int jz4770_pwm_pwm0_pins[] = { 0x80, };
1211 static int jz4770_pwm_pwm1_pins[] = { 0x81, };
1212 static int jz4770_pwm_pwm2_pins[] = { 0x82, };
1213 static int jz4770_pwm_pwm3_pins[] = { 0x83, };
1214 static int jz4770_pwm_pwm4_pins[] = { 0x84, };
1215 static int jz4770_pwm_pwm5_pins[] = { 0x85, };
1216 static int jz4770_pwm_pwm6_pins[] = { 0x6a, };
1217 static int jz4770_pwm_pwm7_pins[] = { 0x6b, };
1218 static int jz4770_mac_rmii_pins[] = {
1221 static int jz4770_mac_mii_pins[] = {
1225 static const struct group_desc jz4770_groups[] = {
1328 static const char *jz4770_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
1329 static const char *jz4770_uart1_groups[] = { "uart1-data", "uart1-hwflow", };
1330 static const char *jz4770_uart2_groups[] = { "uart2-data", "uart2-hwflow", };
1331 static const char *jz4770_uart3_groups[] = { "uart3-data", "uart3-hwflow", };
1332 static const char *jz4770_ssi0_groups[] = {
1340 static const char *jz4770_ssi1_groups[] = {
1348 static const char *jz4770_mmc0_groups[] = {
1352 static const char *jz4770_mmc1_groups[] = {
1356 static const char *jz4770_mmc2_groups[] = {
1360 static const char *jz4770_nemc_groups[] = {
1364 static const char *jz4770_cs1_groups[] = { "nemc-cs1", };
1365 static const char *jz4770_cs2_groups[] = { "nemc-cs2", };
1366 static const char *jz4770_cs3_groups[] = { "nemc-cs3", };
1367 static const char *jz4770_cs4_groups[] = { "nemc-cs4", };
1368 static const char *jz4770_cs5_groups[] = { "nemc-cs5", };
1369 static const char *jz4770_cs6_groups[] = { "nemc-cs6", };
1370 static const char *jz4770_i2c0_groups[] = { "i2c0-data", };
1371 static const char *jz4770_i2c1_groups[] = { "i2c1-data", };
1372 static const char *jz4770_i2c2_groups[] = { "i2c2-data", };
1373 static const char *jz4770_cim_groups[] = { "cim-data-8bit", "cim-data-12bit", };
1374 static const char *jz4770_lcd_groups[] = {
1378 static const char *jz4770_pwm0_groups[] = { "pwm0", };
1379 static const char *jz4770_pwm1_groups[] = { "pwm1", };
1380 static const char *jz4770_pwm2_groups[] = { "pwm2", };
1381 static const char *jz4770_pwm3_groups[] = { "pwm3", };
1382 static const char *jz4770_pwm4_groups[] = { "pwm4", };
1383 static const char *jz4770_pwm5_groups[] = { "pwm5", };
1384 static const char *jz4770_pwm6_groups[] = { "pwm6", };
1385 static const char *jz4770_pwm7_groups[] = { "pwm7", };
1386 static const char *jz4770_mac_groups[] = { "mac-rmii", "mac-mii", };
1388 static const struct function_desc jz4770_functions[] = {
1422 static const struct ingenic_chip_info jz4770_chip_info = {
1434 static const u32 jz4775_pull_ups[7] = {
1438 static const u32 jz4775_pull_downs[7] = {
1442 static int jz4775_uart0_data_pins[] = { 0xa0, 0xa3, };
1443 static int jz4775_uart0_hwflow_pins[] = { 0xa1, 0xa2, };
1444 static int jz4775_uart1_data_pins[] = { 0x7a, 0x7c, };
1445 static int jz4775_uart1_hwflow_pins[] = { 0x7b, 0x7d, };
1446 static int jz4775_uart2_data_c_pins[] = { 0x54, 0x4a, };
1447 static int jz4775_uart2_data_f_pins[] = { 0xa5, 0xa4, };
1448 static int jz4775_uart3_data_pins[] = { 0x1e, 0x1f, };
1449 static int jz4775_ssi_dt_a_pins[] = { 0x13, };
1450 static int jz4775_ssi_dt_d_pins[] = { 0x75, };
1451 static int jz4775_ssi_dr_a_pins[] = { 0x14, };
1452 static int jz4775_ssi_dr_d_pins[] = { 0x74, };
1453 static int jz4775_ssi_clk_a_pins[] = { 0x12, };
1454 static int jz4775_ssi_clk_d_pins[] = { 0x78, };
1455 static int jz4775_ssi_gpc_pins[] = { 0x76, };
1456 static int jz4775_ssi_ce0_a_pins[] = { 0x17, };
1457 static int jz4775_ssi_ce0_d_pins[] = { 0x79, };
1458 static int jz4775_ssi_ce1_pins[] = { 0x77, };
1459 static int jz4775_mmc0_1bit_a_pins[] = { 0x12, 0x13, 0x14, };
1460 static int jz4775_mmc0_4bit_a_pins[] = { 0x15, 0x16, 0x17, };
1461 static int jz4775_mmc0_8bit_a_pins[] = { 0x04, 0x05, 0x06, 0x07, };
1462 static int jz4775_mmc0_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
1463 static int jz4775_mmc0_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
1464 static int jz4775_mmc1_1bit_d_pins[] = { 0x78, 0x79, 0x74, };
1465 static int jz4775_mmc1_4bit_d_pins[] = { 0x75, 0x76, 0x77, };
1466 static int jz4775_mmc1_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
1467 static int jz4775_mmc1_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
1468 static int jz4775_mmc2_1bit_b_pins[] = { 0x3c, 0x3d, 0x34, };
1469 static int jz4775_mmc2_4bit_b_pins[] = { 0x35, 0x3e, 0x3f, };
1470 static int jz4775_mmc2_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
1471 static int jz4775_mmc2_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
1472 static int jz4775_nemc_8bit_data_pins[] = {
1475 static int jz4775_nemc_16bit_data_pins[] = {
1478 static int jz4775_nemc_cle_ale_pins[] = { 0x20, 0x21, };
1479 static int jz4775_nemc_addr_pins[] = { 0x22, 0x23, 0x24, 0x25, };
1480 static int jz4775_nemc_rd_we_pins[] = { 0x10, 0x11, };
1481 static int jz4775_nemc_frd_fwe_pins[] = { 0x12, 0x13, };
1482 static int jz4775_nemc_wait_pins[] = { 0x1b, };
1483 static int jz4775_nemc_cs1_pins[] = { 0x15, };
1484 static int jz4775_nemc_cs2_pins[] = { 0x16, };
1485 static int jz4775_nemc_cs3_pins[] = { 0x17, };
1486 static int jz4775_i2c0_pins[] = { 0x7e, 0x7f, };
1487 static int jz4775_i2c1_pins[] = { 0x9e, 0x9f, };
1488 static int jz4775_i2c2_pins[] = { 0x80, 0x83, };
1489 static int jz4775_i2s_data_tx_pins[] = { 0xa3, };
1490 static int jz4775_i2s_data_rx_pins[] = { 0xa2, };
1491 static int jz4775_i2s_clk_txrx_pins[] = { 0xa0, 0xa1, };
1492 static int jz4775_i2s_sysclk_pins[] = { 0x83, };
1493 static int jz4775_dmic_pins[] = { 0xaa, 0xab, };
1494 static int jz4775_cim_pins[] = {
1498 static int jz4775_lcd_8bit_pins[] = {
1502 static int jz4775_lcd_16bit_pins[] = {
1505 static int jz4775_lcd_18bit_pins[] = {
1508 static int jz4775_lcd_24bit_pins[] = {
1511 static int jz4775_lcd_special_pins[] = { 0x54, 0x4a, 0x41, 0x40, };
1512 static int jz4775_lcd_generic_pins[] = { 0x49, };
1513 static int jz4775_pwm_pwm0_pins[] = { 0x80, };
1514 static int jz4775_pwm_pwm1_pins[] = { 0x81, };
1515 static int jz4775_pwm_pwm2_pins[] = { 0x82, };
1516 static int jz4775_pwm_pwm3_pins[] = { 0x83, };
1517 static int jz4775_mac_rmii_pins[] = {
1520 static int jz4775_mac_mii_pins[] = {
1523 static int jz4775_mac_rgmii_pins[] = {
1527 static int jz4775_mac_gmii_pins[] = {
1531 static int jz4775_otg_pins[] = { 0x8a, };
1533 static u8 jz4775_uart3_data_funcs[] = { 0, 1, };
1534 static u8 jz4775_mac_mii_funcs[] = { 1, 1, 1, 1, 0, 1, 0, };
1535 static u8 jz4775_mac_rgmii_funcs[] = {
1539 static u8 jz4775_mac_gmii_funcs[] = {
1544 static const struct group_desc jz4775_groups[] = {
1615 static const char *jz4775_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
1616 static const char *jz4775_uart1_groups[] = { "uart1-data", "uart1-hwflow", };
1617 static const char *jz4775_uart2_groups[] = { "uart2-data-c", "uart2-data-f", };
1618 static const char *jz4775_uart3_groups[] = { "uart3-data", };
1619 static const char *jz4775_ssi_groups[] = {
1627 static const char *jz4775_mmc0_groups[] = {
1631 static const char *jz4775_mmc1_groups[] = {
1635 static const char *jz4775_mmc2_groups[] = {
1639 static const char *jz4775_nemc_groups[] = {
1643 static const char *jz4775_cs1_groups[] = { "nemc-cs1", };
1644 static const char *jz4775_cs2_groups[] = { "nemc-cs2", };
1645 static const char *jz4775_cs3_groups[] = { "nemc-cs3", };
1646 static const char *jz4775_i2c0_groups[] = { "i2c0-data", };
1647 static const char *jz4775_i2c1_groups[] = { "i2c1-data", };
1648 static const char *jz4775_i2c2_groups[] = { "i2c2-data", };
1649 static const char *jz4775_i2s_groups[] = {
1652 static const char *jz4775_dmic_groups[] = { "dmic", };
1653 static const char *jz4775_cim_groups[] = { "cim-data", };
1654 static const char *jz4775_lcd_groups[] = {
1658 static const char *jz4775_pwm0_groups[] = { "pwm0", };
1659 static const char *jz4775_pwm1_groups[] = { "pwm1", };
1660 static const char *jz4775_pwm2_groups[] = { "pwm2", };
1661 static const char *jz4775_pwm3_groups[] = { "pwm3", };
1662 static const char *jz4775_mac_groups[] = {
1665 static const char *jz4775_otg_groups[] = { "otg-vbus", };
1667 static const struct function_desc jz4775_functions[] = {
1695 static const struct ingenic_chip_info jz4775_chip_info = {
1707 static const u32 jz4780_pull_ups[6] = {
1711 static const u32 jz4780_pull_downs[6] = {
1715 static int jz4780_uart2_data_pins[] = { 0x66, 0x67, };
1716 static int jz4780_uart2_hwflow_pins[] = { 0x65, 0x64, };
1717 static int jz4780_uart4_data_pins[] = { 0x54, 0x4a, };
1718 static int jz4780_ssi0_dt_a_19_pins[] = { 0x13, };
1719 static int jz4780_ssi0_dt_a_21_pins[] = { 0x15, };
1720 static int jz4780_ssi0_dt_a_28_pins[] = { 0x1c, };
1721 static int jz4780_ssi0_dt_b_pins[] = { 0x3d, };
1722 static int jz4780_ssi0_dt_d_pins[] = { 0x79, };
1723 static int jz4780_ssi0_dr_a_20_pins[] = { 0x14, };
1724 static int jz4780_ssi0_dr_a_27_pins[] = { 0x1b, };
1725 static int jz4780_ssi0_dr_b_pins[] = { 0x34, };
1726 static int jz4780_ssi0_dr_d_pins[] = { 0x74, };
1727 static int jz4780_ssi0_clk_a_pins[] = { 0x12, };
1728 static int jz4780_ssi0_clk_b_5_pins[] = { 0x25, };
1729 static int jz4780_ssi0_clk_b_28_pins[] = { 0x3c, };
1730 static int jz4780_ssi0_clk_d_pins[] = { 0x78, };
1731 static int jz4780_ssi0_gpc_b_pins[] = { 0x3e, };
1732 static int jz4780_ssi0_gpc_d_pins[] = { 0x76, };
1733 static int jz4780_ssi0_ce0_a_23_pins[] = { 0x17, };
1734 static int jz4780_ssi0_ce0_a_25_pins[] = { 0x19, };
1735 static int jz4780_ssi0_ce0_b_pins[] = { 0x3f, };
1736 static int jz4780_ssi0_ce0_d_pins[] = { 0x77, };
1737 static int jz4780_ssi0_ce1_b_pins[] = { 0x35, };
1738 static int jz4780_ssi0_ce1_d_pins[] = { 0x75, };
1739 static int jz4780_ssi1_dt_b_pins[] = { 0x3d, };
1740 static int jz4780_ssi1_dt_d_pins[] = { 0x79, };
1741 static int jz4780_ssi1_dr_b_pins[] = { 0x34, };
1742 static int jz4780_ssi1_dr_d_pins[] = { 0x74, };
1743 static int jz4780_ssi1_clk_b_pins[] = { 0x3c, };
1744 static int jz4780_ssi1_clk_d_pins[] = { 0x78, };
1745 static int jz4780_ssi1_gpc_b_pins[] = { 0x3e, };
1746 static int jz4780_ssi1_gpc_d_pins[] = { 0x76, };
1747 static int jz4780_ssi1_ce0_b_pins[] = { 0x3f, };
1748 static int jz4780_ssi1_ce0_d_pins[] = { 0x77, };
1749 static int jz4780_ssi1_ce1_b_pins[] = { 0x35, };
1750 static int jz4780_ssi1_ce1_d_pins[] = { 0x75, };
1751 static int jz4780_mmc0_8bit_a_pins[] = { 0x04, 0x05, 0x06, 0x07, 0x18, };
1752 static int jz4780_i2c3_pins[] = { 0x6a, 0x6b, };
1753 static int jz4780_i2c4_e_pins[] = { 0x8c, 0x8d, };
1754 static int jz4780_i2c4_f_pins[] = { 0xb9, 0xb8, };
1755 static int jz4780_i2s_data_tx_pins[] = { 0x87, };
1756 static int jz4780_i2s_data_rx_pins[] = { 0x86, };
1757 static int jz4780_i2s_clk_txrx_pins[] = { 0x6c, 0x6d, };
1758 static int jz4780_i2s_clk_rx_pins[] = { 0x88, 0x89, };
1759 static int jz4780_i2s_sysclk_pins[] = { 0x85, };
1760 static int jz4780_dmic_pins[] = { 0x32, 0x33, };
1761 static int jz4780_hdmi_ddc_pins[] = { 0xb9, 0xb8, };
1763 static u8 jz4780_i2s_clk_txrx_funcs[] = { 1, 0, };
1765 static const struct group_desc jz4780_groups[] = {
1879 static const char *jz4780_uart2_groups[] = { "uart2-data", "uart2-hwflow", };
1880 static const char *jz4780_uart4_groups[] = { "uart4-data", };
1881 static const char *jz4780_ssi0_groups[] = {
1889 static const char *jz4780_ssi1_groups[] = {
1897 static const char *jz4780_mmc0_groups[] = {
1901 static const char *jz4780_mmc1_groups[] = {
1904 static const char *jz4780_mmc2_groups[] = {
1907 static const char *jz4780_nemc_groups[] = {
1911 static const char *jz4780_i2c3_groups[] = { "i2c3-data", };
1912 static const char *jz4780_i2c4_groups[] = { "i2c4-data-e", "i2c4-data-f", };
1913 static const char *jz4780_i2s_groups[] = {
1916 static const char *jz4780_dmic_groups[] = { "dmic", };
1917 static const char *jz4780_cim_groups[] = { "cim-data", };
1918 static const char *jz4780_hdmi_ddc_groups[] = { "hdmi-ddc", };
1920 static const struct function_desc jz4780_functions[] = {
1959 static const struct ingenic_chip_info jz4780_chip_info = {
1971 static const u32 x1000_pull_ups[4] = {
1975 static const u32 x1000_pull_downs[4] = {
1979 static int x1000_uart0_data_pins[] = { 0x4a, 0x4b, };
1980 static int x1000_uart0_hwflow_pins[] = { 0x4c, 0x4d, };
1981 static int x1000_uart1_data_a_pins[] = { 0x04, 0x05, };
1982 static int x1000_uart1_data_d_pins[] = { 0x62, 0x63, };
1983 static int x1000_uart1_hwflow_pins[] = { 0x64, 0x65, };
1984 static int x1000_uart2_data_a_pins[] = { 0x02, 0x03, };
1985 static int x1000_uart2_data_d_pins[] = { 0x65, 0x64, };
1986 static int x1000_sfc_data_pins[] = { 0x1d, 0x1c, 0x1e, 0x1f, };
1987 static int x1000_sfc_clk_pins[] = { 0x1a, };
1988 static int x1000_sfc_ce_pins[] = { 0x1b, };
1989 static int x1000_ssi_dt_a_22_pins[] = { 0x16, };
1990 static int x1000_ssi_dt_a_29_pins[] = { 0x1d, };
1991 static int x1000_ssi_dt_d_pins[] = { 0x62, };
1992 static int x1000_ssi_dr_a_23_pins[] = { 0x17, };
1993 static int x1000_ssi_dr_a_28_pins[] = { 0x1c, };
1994 static int x1000_ssi_dr_d_pins[] = { 0x63, };
1995 static int x1000_ssi_clk_a_24_pins[] = { 0x18, };
1996 static int x1000_ssi_clk_a_26_pins[] = { 0x1a, };
1997 static int x1000_ssi_clk_d_pins[] = { 0x60, };
1998 static int x1000_ssi_gpc_a_20_pins[] = { 0x14, };
1999 static int x1000_ssi_gpc_a_31_pins[] = { 0x1f, };
2000 static int x1000_ssi_ce0_a_25_pins[] = { 0x19, };
2001 static int x1000_ssi_ce0_a_27_pins[] = { 0x1b, };
2002 static int x1000_ssi_ce0_d_pins[] = { 0x61, };
2003 static int x1000_ssi_ce1_a_21_pins[] = { 0x15, };
2004 static int x1000_ssi_ce1_a_30_pins[] = { 0x1e, };
2005 static int x1000_mmc0_1bit_pins[] = { 0x18, 0x19, 0x17, };
2006 static int x1000_mmc0_4bit_pins[] = { 0x16, 0x15, 0x14, };
2007 static int x1000_mmc0_8bit_pins[] = { 0x13, 0x12, 0x11, 0x10, };
2008 static int x1000_mmc1_1bit_pins[] = { 0x40, 0x41, 0x42, };
2009 static int x1000_mmc1_4bit_pins[] = { 0x43, 0x44, 0x45, };
2010 static int x1000_emc_8bit_data_pins[] = {
2013 static int x1000_emc_16bit_data_pins[] = {
2016 static int x1000_emc_addr_pins[] = {
2020 static int x1000_emc_rd_we_pins[] = { 0x30, 0x31, };
2021 static int x1000_emc_wait_pins[] = { 0x34, };
2022 static int x1000_emc_cs1_pins[] = { 0x32, };
2023 static int x1000_emc_cs2_pins[] = { 0x33, };
2024 static int x1000_i2c0_pins[] = { 0x38, 0x37, };
2025 static int x1000_i2c1_a_pins[] = { 0x01, 0x00, };
2026 static int x1000_i2c1_c_pins[] = { 0x5b, 0x5a, };
2027 static int x1000_i2c2_pins[] = { 0x61, 0x60, };
2028 static int x1000_i2s_data_tx_pins[] = { 0x24, };
2029 static int x1000_i2s_data_rx_pins[] = { 0x23, };
2030 static int x1000_i2s_clk_txrx_pins[] = { 0x21, 0x22, };
2031 static int x1000_i2s_sysclk_pins[] = { 0x20, };
2032 static int x1000_dmic_if0_pins[] = { 0x35, 0x36, };
2033 static int x1000_dmic_if1_pins[] = { 0x25, };
2034 static int x1000_cim_pins[] = {
2038 static int x1000_lcd_8bit_pins[] = {
2042 static int x1000_lcd_16bit_pins[] = {
2045 static int x1000_pwm_pwm0_pins[] = { 0x59, };
2046 static int x1000_pwm_pwm1_pins[] = { 0x5a, };
2047 static int x1000_pwm_pwm2_pins[] = { 0x5b, };
2048 static int x1000_pwm_pwm3_pins[] = { 0x26, };
2049 static int x1000_pwm_pwm4_pins[] = { 0x58, };
2050 static int x1000_mac_pins[] = {
2054 static const struct group_desc x1000_groups[] = {
2114 static const char *x1000_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
2115 static const char *x1000_uart1_groups[] = {
2118 static const char *x1000_uart2_groups[] = { "uart2-data-a", "uart2-data-d", };
2119 static const char *x1000_sfc_groups[] = { "sfc-data", "sfc-clk", "sfc-ce", };
2120 static const char *x1000_ssi_groups[] = {
2128 static const char *x1000_mmc0_groups[] = {
2131 static const char *x1000_mmc1_groups[] = {
2134 static const char *x1000_emc_groups[] = {
2138 static const char *x1000_cs1_groups[] = { "emc-cs1", };
2139 static const char *x1000_cs2_groups[] = { "emc-cs2", };
2140 static const char *x1000_i2c0_groups[] = { "i2c0-data", };
2141 static const char *x1000_i2c1_groups[] = { "i2c1-data-a", "i2c1-data-c", };
2142 static const char *x1000_i2c2_groups[] = { "i2c2-data", };
2143 static const char *x1000_i2s_groups[] = {
2146 static const char *x1000_dmic_groups[] = { "dmic-if0", "dmic-if1", };
2147 static const char *x1000_cim_groups[] = { "cim-data", };
2148 static const char *x1000_lcd_groups[] = { "lcd-8bit", "lcd-16bit", };
2149 static const char *x1000_pwm0_groups[] = { "pwm0", };
2150 static const char *x1000_pwm1_groups[] = { "pwm1", };
2151 static const char *x1000_pwm2_groups[] = { "pwm2", };
2152 static const char *x1000_pwm3_groups[] = { "pwm3", };
2153 static const char *x1000_pwm4_groups[] = { "pwm4", };
2154 static const char *x1000_mac_groups[] = { "mac", };
2156 static const struct function_desc x1000_functions[] = {
2182 static const struct ingenic_chip_info x1000_chip_info = {
2194 static int x1500_uart0_data_pins[] = { 0x4a, 0x4b, };
2195 static int x1500_uart0_hwflow_pins[] = { 0x4c, 0x4d, };
2196 static int x1500_uart1_data_a_pins[] = { 0x04, 0x05, };
2197 static int x1500_uart1_data_d_pins[] = { 0x62, 0x63, };
2198 static int x1500_uart1_hwflow_pins[] = { 0x64, 0x65, };
2199 static int x1500_uart2_data_a_pins[] = { 0x02, 0x03, };
2200 static int x1500_uart2_data_d_pins[] = { 0x65, 0x64, };
2201 static int x1500_mmc_1bit_pins[] = { 0x18, 0x19, 0x17, };
2202 static int x1500_mmc_4bit_pins[] = { 0x16, 0x15, 0x14, };
2203 static int x1500_i2c0_pins[] = { 0x38, 0x37, };
2204 static int x1500_i2c1_a_pins[] = { 0x01, 0x00, };
2205 static int x1500_i2c1_c_pins[] = { 0x5b, 0x5a, };
2206 static int x1500_i2c2_pins[] = { 0x61, 0x60, };
2207 static int x1500_i2s_data_tx_pins[] = { 0x24, };
2208 static int x1500_i2s_data_rx_pins[] = { 0x23, };
2209 static int x1500_i2s_clk_txrx_pins[] = { 0x21, 0x22, };
2210 static int x1500_i2s_sysclk_pins[] = { 0x20, };
2211 static int x1500_dmic_if0_pins[] = { 0x35, 0x36, };
2212 static int x1500_dmic_if1_pins[] = { 0x25, };
2213 static int x1500_cim_pins[] = {
2217 static int x1500_pwm_pwm0_pins[] = { 0x59, };
2218 static int x1500_pwm_pwm1_pins[] = { 0x5a, };
2219 static int x1500_pwm_pwm2_pins[] = { 0x5b, };
2220 static int x1500_pwm_pwm3_pins[] = { 0x26, };
2221 static int x1500_pwm_pwm4_pins[] = { 0x58, };
2223 static const struct group_desc x1500_groups[] = {
2254 static const char *x1500_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
2255 static const char *x1500_uart1_groups[] = {
2258 static const char *x1500_uart2_groups[] = { "uart2-data-a", "uart2-data-d", };
2259 static const char *x1500_mmc_groups[] = { "mmc-1bit", "mmc-4bit", };
2260 static const char *x1500_i2c0_groups[] = { "i2c0-data", };
2261 static const char *x1500_i2c1_groups[] = { "i2c1-data-a", "i2c1-data-c", };
2262 static const char *x1500_i2c2_groups[] = { "i2c2-data", };
2263 static const char *x1500_i2s_groups[] = {
2266 static const char *x1500_dmic_groups[] = { "dmic-if0", "dmic-if1", };
2267 static const char *x1500_cim_groups[] = { "cim-data", };
2268 static const char *x1500_pwm0_groups[] = { "pwm0", };
2269 static const char *x1500_pwm1_groups[] = { "pwm1", };
2270 static const char *x1500_pwm2_groups[] = { "pwm2", };
2271 static const char *x1500_pwm3_groups[] = { "pwm3", };
2272 static const char *x1500_pwm4_groups[] = { "pwm4", };
2274 static const struct function_desc x1500_functions[] = {
2293 static const struct ingenic_chip_info x1500_chip_info = {
2305 static const u32 x1830_pull_ups[4] = {
2309 static const u32 x1830_pull_downs[4] = {
2313 static int x1830_uart0_data_pins[] = { 0x33, 0x36, };
2314 static int x1830_uart0_hwflow_pins[] = { 0x34, 0x35, };
2315 static int x1830_uart1_data_pins[] = { 0x38, 0x37, };
2316 static int x1830_sfc_data_pins[] = { 0x17, 0x18, 0x1a, 0x19, };
2317 static int x1830_sfc_clk_pins[] = { 0x1b, };
2318 static int x1830_sfc_ce_pins[] = { 0x1c, };
2319 static int x1830_ssi0_dt_pins[] = { 0x4c, };
2320 static int x1830_ssi0_dr_pins[] = { 0x4b, };
2321 static int x1830_ssi0_clk_pins[] = { 0x4f, };
2322 static int x1830_ssi0_gpc_pins[] = { 0x4d, };
2323 static int x1830_ssi0_ce0_pins[] = { 0x50, };
2324 static int x1830_ssi0_ce1_pins[] = { 0x4e, };
2325 static int x1830_ssi1_dt_c_pins[] = { 0x53, };
2326 static int x1830_ssi1_dt_d_pins[] = { 0x62, };
2327 static int x1830_ssi1_dr_c_pins[] = { 0x54, };
2328 static int x1830_ssi1_dr_d_pins[] = { 0x63, };
2329 static int x1830_ssi1_clk_c_pins[] = { 0x57, };
2330 static int x1830_ssi1_clk_d_pins[] = { 0x66, };
2331 static int x1830_ssi1_gpc_c_pins[] = { 0x55, };
2332 static int x1830_ssi1_gpc_d_pins[] = { 0x64, };
2333 static int x1830_ssi1_ce0_c_pins[] = { 0x58, };
2334 static int x1830_ssi1_ce0_d_pins[] = { 0x67, };
2335 static int x1830_ssi1_ce1_c_pins[] = { 0x56, };
2336 static int x1830_ssi1_ce1_d_pins[] = { 0x65, };
2337 static int x1830_mmc0_1bit_pins[] = { 0x24, 0x25, 0x20, };
2338 static int x1830_mmc0_4bit_pins[] = { 0x21, 0x22, 0x23, };
2339 static int x1830_mmc1_1bit_pins[] = { 0x42, 0x43, 0x44, };
2340 static int x1830_mmc1_4bit_pins[] = { 0x45, 0x46, 0x47, };
2341 static int x1830_i2c0_pins[] = { 0x0c, 0x0d, };
2342 static int x1830_i2c1_pins[] = { 0x39, 0x3a, };
2343 static int x1830_i2c2_pins[] = { 0x5b, 0x5c, };
2344 static int x1830_i2s_data_tx_pins[] = { 0x53, };
2345 static int x1830_i2s_data_rx_pins[] = { 0x54, };
2346 static int x1830_i2s_clk_txrx_pins[] = { 0x58, 0x52, };
2347 static int x1830_i2s_clk_rx_pins[] = { 0x56, 0x55, };
2348 static int x1830_i2s_sysclk_pins[] = { 0x57, };
2349 static int x1830_dmic_if0_pins[] = { 0x48, 0x59, };
2350 static int x1830_dmic_if1_pins[] = { 0x5a, };
2351 static int x1830_lcd_tft_8bit_pins[] = {
2355 static int x1830_lcd_tft_24bit_pins[] = {
2359 static int x1830_lcd_slcd_8bit_pins[] = {
2363 static int x1830_lcd_slcd_16bit_pins[] = {
2366 static int x1830_pwm_pwm0_b_pins[] = { 0x31, };
2367 static int x1830_pwm_pwm0_c_pins[] = { 0x4b, };
2368 static int x1830_pwm_pwm1_b_pins[] = { 0x32, };
2369 static int x1830_pwm_pwm1_c_pins[] = { 0x4c, };
2370 static int x1830_pwm_pwm2_c_8_pins[] = { 0x48, };
2371 static int x1830_pwm_pwm2_c_13_pins[] = { 0x4d, };
2372 static int x1830_pwm_pwm3_c_9_pins[] = { 0x49, };
2373 static int x1830_pwm_pwm3_c_14_pins[] = { 0x4e, };
2374 static int x1830_pwm_pwm4_c_15_pins[] = { 0x4f, };
2375 static int x1830_pwm_pwm4_c_25_pins[] = { 0x59, };
2376 static int x1830_pwm_pwm5_c_16_pins[] = { 0x50, };
2377 static int x1830_pwm_pwm5_c_26_pins[] = { 0x5a, };
2378 static int x1830_pwm_pwm6_c_17_pins[] = { 0x51, };
2379 static int x1830_pwm_pwm6_c_27_pins[] = { 0x5b, };
2380 static int x1830_pwm_pwm7_c_18_pins[] = { 0x52, };
2381 static int x1830_pwm_pwm7_c_28_pins[] = { 0x5c, };
2382 static int x1830_mac_pins[] = {
2386 static const struct group_desc x1830_groups[] = {
2448 static const char *x1830_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
2449 static const char *x1830_uart1_groups[] = { "uart1-data", };
2450 static const char *x1830_sfc_groups[] = { "sfc-data", "sfc-clk", "sfc-ce", };
2451 static const char *x1830_ssi0_groups[] = {
2454 static const char *x1830_ssi1_groups[] = {
2462 static const char *x1830_mmc0_groups[] = { "mmc0-1bit", "mmc0-4bit", };
2463 static const char *x1830_mmc1_groups[] = { "mmc1-1bit", "mmc1-4bit", };
2464 static const char *x1830_i2c0_groups[] = { "i2c0-data", };
2465 static const char *x1830_i2c1_groups[] = { "i2c1-data", };
2466 static const char *x1830_i2c2_groups[] = { "i2c2-data", };
2467 static const char *x1830_i2s_groups[] = {
2470 static const char *x1830_dmic_groups[] = { "dmic-if0", "dmic-if1", };
2471 static const char *x1830_lcd_groups[] = {
2474 static const char *x1830_pwm0_groups[] = { "pwm0-b", "pwm0-c", };
2475 static const char *x1830_pwm1_groups[] = { "pwm1-b", "pwm1-c", };
2476 static const char *x1830_pwm2_groups[] = { "pwm2-c-8", "pwm2-c-13", };
2477 static const char *x1830_pwm3_groups[] = { "pwm3-c-9", "pwm3-c-14", };
2478 static const char *x1830_pwm4_groups[] = { "pwm4-c-15", "pwm4-c-25", };
2479 static const char *x1830_pwm5_groups[] = { "pwm5-c-16", "pwm5-c-26", };
2480 static const char *x1830_pwm6_groups[] = { "pwm6-c-17", "pwm6-c-27", };
2481 static const char *x1830_pwm7_groups[] = { "pwm7-c-18", "pwm7-c-28", };
2482 static const char *x1830_mac_groups[] = { "mac", };
2484 static const struct function_desc x1830_functions[] = {
2509 static const struct ingenic_chip_info x1830_chip_info = {
2521 static const u32 x2000_pull_ups[5] = {
2525 static const u32 x2000_pull_downs[5] = {
2529 static int x2000_uart0_data_pins[] = { 0x77, 0x78, };
2530 static int x2000_uart0_hwflow_pins[] = { 0x79, 0x7a, };
2531 static int x2000_uart1_data_pins[] = { 0x57, 0x58, };
2532 static int x2000_uart1_hwflow_pins[] = { 0x55, 0x56, };
2533 static int x2000_uart2_data_pins[] = { 0x7e, 0x7f, };
2534 static int x2000_uart3_data_c_pins[] = { 0x59, 0x5a, };
2535 static int x2000_uart3_data_d_pins[] = { 0x62, 0x63, };
2536 static int x2000_uart3_hwflow_c_pins[] = { 0x5b, 0x5c, };
2537 static int x2000_uart3_hwflow_d_pins[] = { 0x60, 0x61, };
2538 static int x2000_uart4_data_a_pins[] = { 0x02, 0x03, };
2539 static int x2000_uart4_data_c_pins[] = { 0x4b, 0x4c, };
2540 static int x2000_uart4_hwflow_a_pins[] = { 0x00, 0x01, };
2541 static int x2000_uart4_hwflow_c_pins[] = { 0x49, 0x4a, };
2542 static int x2000_uart5_data_a_pins[] = { 0x04, 0x05, };
2543 static int x2000_uart5_data_c_pins[] = { 0x45, 0x46, };
2544 static int x2000_uart6_data_a_pins[] = { 0x06, 0x07, };
2545 static int x2000_uart6_data_c_pins[] = { 0x47, 0x48, };
2546 static int x2000_uart7_data_a_pins[] = { 0x08, 0x09, };
2547 static int x2000_uart7_data_c_pins[] = { 0x41, 0x42, };
2548 static int x2000_uart8_data_pins[] = { 0x3c, 0x3d, };
2549 static int x2000_uart9_data_pins[] = { 0x3e, 0x3f, };
2550 static int x2000_sfc_data_if0_d_pins[] = { 0x73, 0x74, 0x75, 0x76, };
2551 static int x2000_sfc_data_if0_e_pins[] = { 0x92, 0x93, 0x94, 0x95, };
2552 static int x2000_sfc_data_if1_pins[] = { 0x77, 0x78, 0x79, 0x7a, };
2553 static int x2000_sfc_clk_d_pins[] = { 0x71, };
2554 static int x2000_sfc_clk_e_pins[] = { 0x90, };
2555 static int x2000_sfc_ce_d_pins[] = { 0x72, };
2556 static int x2000_sfc_ce_e_pins[] = { 0x91, };
2557 static int x2000_ssi0_dt_b_pins[] = { 0x3e, };
2558 static int x2000_ssi0_dt_d_pins[] = { 0x69, };
2559 static int x2000_ssi0_dr_b_pins[] = { 0x3d, };
2560 static int x2000_ssi0_dr_d_pins[] = { 0x6a, };
2561 static int x2000_ssi0_clk_b_pins[] = { 0x3f, };
2562 static int x2000_ssi0_clk_d_pins[] = { 0x68, };
2563 static int x2000_ssi0_ce_b_pins[] = { 0x3c, };
2564 static int x2000_ssi0_ce_d_pins[] = { 0x6d, };
2565 static int x2000_ssi1_dt_c_pins[] = { 0x4b, };
2566 static int x2000_ssi1_dt_d_pins[] = { 0x72, };
2567 static int x2000_ssi1_dt_e_pins[] = { 0x91, };
2568 static int x2000_ssi1_dr_c_pins[] = { 0x4a, };
2569 static int x2000_ssi1_dr_d_pins[] = { 0x73, };
2570 static int x2000_ssi1_dr_e_pins[] = { 0x92, };
2571 static int x2000_ssi1_clk_c_pins[] = { 0x4c, };
2572 static int x2000_ssi1_clk_d_pins[] = { 0x71, };
2573 static int x2000_ssi1_clk_e_pins[] = { 0x90, };
2574 static int x2000_ssi1_ce_c_pins[] = { 0x49, };
2575 static int x2000_ssi1_ce_d_pins[] = { 0x76, };
2576 static int x2000_ssi1_ce_e_pins[] = { 0x95, };
2577 static int x2000_mmc0_1bit_pins[] = { 0x71, 0x72, 0x73, };
2578 static int x2000_mmc0_4bit_pins[] = { 0x74, 0x75, 0x75, };
2579 static int x2000_mmc0_8bit_pins[] = { 0x77, 0x78, 0x79, 0x7a, };
2580 static int x2000_mmc1_1bit_pins[] = { 0x68, 0x69, 0x6a, };
2581 static int x2000_mmc1_4bit_pins[] = { 0x6b, 0x6c, 0x6d, };
2582 static int x2000_mmc2_1bit_pins[] = { 0x80, 0x81, 0x82, };
2583 static int x2000_mmc2_4bit_pins[] = { 0x83, 0x84, 0x85, };
2584 static int x2000_emc_8bit_data_pins[] = {
2587 static int x2000_emc_16bit_data_pins[] = {
2590 static int x2000_emc_addr_pins[] = {
2594 static int x2000_emc_rd_we_pins[] = { 0x2d, 0x2e, };
2595 static int x2000_emc_wait_pins[] = { 0x2f, };
2596 static int x2000_emc_cs1_pins[] = { 0x57, };
2597 static int x2000_emc_cs2_pins[] = { 0x58, };
2598 static int x2000_i2c0_pins[] = { 0x4e, 0x4d, };
2599 static int x2000_i2c1_c_pins[] = { 0x58, 0x57, };
2600 static int x2000_i2c1_d_pins[] = { 0x6c, 0x6b, };
2601 static int x2000_i2c2_b_pins[] = { 0x37, 0x36, };
2602 static int x2000_i2c2_d_pins[] = { 0x75, 0x74, };
2603 static int x2000_i2c2_e_pins[] = { 0x94, 0x93, };
2604 static int x2000_i2c3_a_pins[] = { 0x11, 0x10, };
2605 static int x2000_i2c3_d_pins[] = { 0x7f, 0x7e, };
2606 static int x2000_i2c4_c_pins[] = { 0x5a, 0x59, };
2607 static int x2000_i2c4_d_pins[] = { 0x61, 0x60, };
2608 static int x2000_i2c5_c_pins[] = { 0x5c, 0x5b, };
2609 static int x2000_i2c5_d_pins[] = { 0x65, 0x64, };
2610 static int x2000_i2s1_data_tx_pins[] = { 0x47, };
2611 static int x2000_i2s1_data_rx_pins[] = { 0x44, };
2612 static int x2000_i2s1_clk_tx_pins[] = { 0x45, 0x46, };
2613 static int x2000_i2s1_clk_rx_pins[] = { 0x42, 0x43, };
2614 static int x2000_i2s1_sysclk_tx_pins[] = { 0x48, };
2615 static int x2000_i2s1_sysclk_rx_pins[] = { 0x41, };
2616 static int x2000_i2s2_data_rx0_pins[] = { 0x0a, };
2617 static int x2000_i2s2_data_rx1_pins[] = { 0x0b, };
2618 static int x2000_i2s2_data_rx2_pins[] = { 0x0c, };
2619 static int x2000_i2s2_data_rx3_pins[] = { 0x0d, };
2620 static int x2000_i2s2_clk_rx_pins[] = { 0x11, 0x09, };
2621 static int x2000_i2s2_sysclk_rx_pins[] = { 0x07, };
2622 static int x2000_i2s3_data_tx0_pins[] = { 0x03, };
2623 static int x2000_i2s3_data_tx1_pins[] = { 0x04, };
2624 static int x2000_i2s3_data_tx2_pins[] = { 0x05, };
2625 static int x2000_i2s3_data_tx3_pins[] = { 0x06, };
2626 static int x2000_i2s3_clk_tx_pins[] = { 0x10, 0x02, };
2627 static int x2000_i2s3_sysclk_tx_pins[] = { 0x00, };
2628 static int x2000_dmic_if0_pins[] = { 0x54, 0x55, };
2629 static int x2000_dmic_if1_pins[] = { 0x56, };
2630 static int x2000_dmic_if2_pins[] = { 0x57, };
2631 static int x2000_dmic_if3_pins[] = { 0x58, };
2632 static int x2000_cim_8bit_pins[] = {
2636 static int x2000_cim_12bit_pins[] = { 0x08, 0x09, 0x0a, 0x0b, };
2637 static int x2000_lcd_tft_8bit_pins[] = {
2641 static int x2000_lcd_tft_16bit_pins[] = {
2644 static int x2000_lcd_tft_18bit_pins[] = {
2647 static int x2000_lcd_tft_24bit_pins[] = {
2650 static int x2000_lcd_slcd_8bit_pins[] = {
2654 static int x2000_pwm_pwm0_c_pins[] = { 0x40, };
2655 static int x2000_pwm_pwm0_d_pins[] = { 0x7e, };
2656 static int x2000_pwm_pwm1_c_pins[] = { 0x41, };
2657 static int x2000_pwm_pwm1_d_pins[] = { 0x7f, };
2658 static int x2000_pwm_pwm2_c_pins[] = { 0x42, };
2659 static int x2000_pwm_pwm2_e_pins[] = { 0x80, };
2660 static int x2000_pwm_pwm3_c_pins[] = { 0x43, };
2661 static int x2000_pwm_pwm3_e_pins[] = { 0x81, };
2662 static int x2000_pwm_pwm4_c_pins[] = { 0x44, };
2663 static int x2000_pwm_pwm4_e_pins[] = { 0x82, };
2664 static int x2000_pwm_pwm5_c_pins[] = { 0x45, };
2665 static int x2000_pwm_pwm5_e_pins[] = { 0x83, };
2666 static int x2000_pwm_pwm6_c_pins[] = { 0x46, };
2667 static int x2000_pwm_pwm6_e_pins[] = { 0x84, };
2668 static int x2000_pwm_pwm7_c_pins[] = { 0x47, };
2669 static int x2000_pwm_pwm7_e_pins[] = { 0x85, };
2670 static int x2000_pwm_pwm8_pins[] = { 0x48, };
2671 static int x2000_pwm_pwm9_pins[] = { 0x49, };
2672 static int x2000_pwm_pwm10_pins[] = { 0x4a, };
2673 static int x2000_pwm_pwm11_pins[] = { 0x4b, };
2674 static int x2000_pwm_pwm12_pins[] = { 0x4c, };
2675 static int x2000_pwm_pwm13_pins[] = { 0x4d, };
2676 static int x2000_pwm_pwm14_pins[] = { 0x4e, };
2677 static int x2000_pwm_pwm15_pins[] = { 0x4f, };
2678 static int x2000_mac0_rmii_pins[] = {
2681 static int x2000_mac0_rgmii_pins[] = {
2685 static int x2000_mac1_rmii_pins[] = {
2688 static int x2000_mac1_rgmii_pins[] = {
2692 static int x2000_otg_pins[] = { 0x96, };
2694 static u8 x2000_cim_8bit_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, };
2696 static const struct group_desc x2000_groups[] = {
2833 static const char *x2000_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
2834 static const char *x2000_uart1_groups[] = { "uart1-data", "uart1-hwflow", };
2835 static const char *x2000_uart2_groups[] = { "uart2-data", };
2836 static const char *x2000_uart3_groups[] = {
2839 static const char *x2000_uart4_groups[] = {
2842 static const char *x2000_uart5_groups[] = { "uart5-data-a", "uart5-data-c", };
2843 static const char *x2000_uart6_groups[] = { "uart6-data-a", "uart6-data-c", };
2844 static const char *x2000_uart7_groups[] = { "uart7-data-a", "uart7-data-c", };
2845 static const char *x2000_uart8_groups[] = { "uart8-data", };
2846 static const char *x2000_uart9_groups[] = { "uart9-data", };
2847 static const char *x2000_sfc_groups[] = {
2851 static const char *x2000_ssi0_groups[] = {
2857 static const char *x2000_ssi1_groups[] = {
2863 static const char *x2000_mmc0_groups[] = { "mmc0-1bit", "mmc0-4bit", "mmc0-8bit", };
2864 static const char *x2000_mmc1_groups[] = { "mmc1-1bit", "mmc1-4bit", };
2865 static const char *x2000_mmc2_groups[] = { "mmc2-1bit", "mmc2-4bit", };
2866 static const char *x2000_emc_groups[] = {
2870 static const char *x2000_cs1_groups[] = { "emc-cs1", };
2871 static const char *x2000_cs2_groups[] = { "emc-cs2", };
2872 static const char *x2000_i2c0_groups[] = { "i2c0-data", };
2873 static const char *x2000_i2c1_groups[] = { "i2c1-data-c", "i2c1-data-d", };
2874 static const char *x2000_i2c2_groups[] = { "i2c2-data-b", "i2c2-data-d", };
2875 static const char *x2000_i2c3_groups[] = { "i2c3-data-a", "i2c3-data-d", };
2876 static const char *x2000_i2c4_groups[] = { "i2c4-data-c", "i2c4-data-d", };
2877 static const char *x2000_i2c5_groups[] = { "i2c5-data-c", "i2c5-data-d", };
2878 static const char *x2000_i2s1_groups[] = {
2883 static const char *x2000_i2s2_groups[] = {
2887 static const char *x2000_i2s3_groups[] = {
2891 static const char *x2000_dmic_groups[] = {
2894 static const char *x2000_cim_groups[] = { "cim-data-8bit", "cim-data-12bit", };
2895 static const char *x2000_lcd_groups[] = {
2899 static const char *x2000_pwm0_groups[] = { "pwm0-c", "pwm0-d", };
2900 static const char *x2000_pwm1_groups[] = { "pwm1-c", "pwm1-d", };
2901 static const char *x2000_pwm2_groups[] = { "pwm2-c", "pwm2-e", };
2902 static const char *x2000_pwm3_groups[] = { "pwm3-c", "pwm3-r", };
2903 static const char *x2000_pwm4_groups[] = { "pwm4-c", "pwm4-e", };
2904 static const char *x2000_pwm5_groups[] = { "pwm5-c", "pwm5-e", };
2905 static const char *x2000_pwm6_groups[] = { "pwm6-c", "pwm6-e", };
2906 static const char *x2000_pwm7_groups[] = { "pwm7-c", "pwm7-e", };
2907 static const char *x2000_pwm8_groups[] = { "pwm8", };
2908 static const char *x2000_pwm9_groups[] = { "pwm9", };
2909 static const char *x2000_pwm10_groups[] = { "pwm10", };
2910 static const char *x2000_pwm11_groups[] = { "pwm11", };
2911 static const char *x2000_pwm12_groups[] = { "pwm12", };
2912 static const char *x2000_pwm13_groups[] = { "pwm13", };
2913 static const char *x2000_pwm14_groups[] = { "pwm14", };
2914 static const char *x2000_pwm15_groups[] = { "pwm15", };
2915 static const char *x2000_mac0_groups[] = { "mac0-rmii", "mac0-rgmii", };
2916 static const char *x2000_mac1_groups[] = { "mac1-rmii", "mac1-rgmii", };
2917 static const char *x2000_otg_groups[] = { "otg-vbus", };
2919 static const struct function_desc x2000_functions[] = {
2972 static const struct ingenic_chip_info x2000_chip_info = {
2984 static const u32 x2100_pull_ups[5] = {
2988 static const u32 x2100_pull_downs[5] = {
2992 static int x2100_mac_pins[] = {
2996 static const struct group_desc x2100_groups[] = {
3129 static const char *x2100_mac_groups[] = { "mac", };
3131 static const struct function_desc x2100_functions[] = {
3182 static const struct ingenic_chip_info x2100_chip_info = {
3194 static u32 ingenic_gpio_read_reg(struct ingenic_gpio_chip *jzgc, u8 reg)  in ingenic_gpio_read_reg()
3203 static void ingenic_gpio_set_bit(struct ingenic_gpio_chip *jzgc,  in ingenic_gpio_set_bit()
3220 static void ingenic_gpio_shadow_set_bit(struct ingenic_gpio_chip *jzgc,  in ingenic_gpio_shadow_set_bit()
3232 static void ingenic_gpio_shadow_set_bit_load(struct ingenic_gpio_chip *jzgc)  in ingenic_gpio_shadow_set_bit_load()
3239 static void jz4730_gpio_set_bits(struct ingenic_gpio_chip *jzgc,  in jz4730_gpio_set_bits()
3253 static inline bool ingenic_gpio_get_value(struct ingenic_gpio_chip *jzgc,  in ingenic_gpio_get_value()
3261 static void ingenic_gpio_set_value(struct ingenic_gpio_chip *jzgc,  in ingenic_gpio_set_value()
3272 static void irq_set_type(struct ingenic_gpio_chip *jzgc,  in irq_set_type()
3329 static void ingenic_gpio_irq_mask(struct irq_data *irqd)  in ingenic_gpio_irq_mask()
3341 static void ingenic_gpio_irq_unmask(struct irq_data *irqd)  in ingenic_gpio_irq_unmask()
3353 static void ingenic_gpio_irq_enable(struct irq_data *irqd)  in ingenic_gpio_irq_enable()
3369 static void ingenic_gpio_irq_disable(struct irq_data *irqd)  in ingenic_gpio_irq_disable()
3385 static void ingenic_gpio_irq_ack(struct irq_data *irqd)  in ingenic_gpio_irq_ack()
3413 static int ingenic_gpio_irq_set_type(struct irq_data *irqd, unsigned int type)  in ingenic_gpio_irq_set_type()
3447 static int ingenic_gpio_irq_set_wake(struct irq_data *irqd, unsigned int on)  in ingenic_gpio_irq_set_wake()
3455 static void ingenic_gpio_irq_handler(struct irq_desc *desc)  in ingenic_gpio_irq_handler()
3476 static void ingenic_gpio_set(struct gpio_chip *gc,  in ingenic_gpio_set()
3484 static int ingenic_gpio_get(struct gpio_chip *gc, unsigned int offset)  in ingenic_gpio_get()
3491 static int ingenic_gpio_direction_input(struct gpio_chip *gc,  in ingenic_gpio_direction_input()
3497 static int ingenic_gpio_direction_output(struct gpio_chip *gc,  in ingenic_gpio_direction_output()
3504 static inline void ingenic_config_pin(struct ingenic_pinctrl *jzpc,  in ingenic_config_pin()
3527 static inline void ingenic_shadow_config_pin(struct ingenic_pinctrl *jzpc,  in ingenic_shadow_config_pin()
3536 static inline void ingenic_shadow_config_pin_load(struct ingenic_pinctrl *jzpc,  in ingenic_shadow_config_pin_load()
3543 static inline void jz4730_config_pin_function(struct ingenic_pinctrl *jzpc,  in jz4730_config_pin_function()
3559 static inline bool ingenic_get_pin_config(struct ingenic_pinctrl *jzpc,  in ingenic_get_pin_config()
3571 static int ingenic_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)  in ingenic_gpio_get_direction()
3597 static const struct pinctrl_ops ingenic_pctlops = {
3605 static int ingenic_gpio_irq_request(struct irq_data *data)  in ingenic_gpio_irq_request()
3617 static void ingenic_gpio_irq_release(struct irq_data *data)  in ingenic_gpio_irq_release()
3624 static int ingenic_pinmux_set_pin_fn(struct ingenic_pinctrl *jzpc,  in ingenic_pinmux_set_pin_fn()
3656 static int ingenic_pinmux_set_mux(struct pinctrl_dev *pctldev,  in ingenic_pinmux_set_mux()
3691 static int ingenic_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev,  in ingenic_pinmux_gpio_set_direction()
3724 static const struct pinmux_ops ingenic_pmxops = {
3732 static int ingenic_pinconf_get(struct pinctrl_dev *pctldev,  in ingenic_pinconf_get()
3828 static void ingenic_set_bias(struct ingenic_pinctrl *jzpc,  in ingenic_set_bias()
3876 static void ingenic_set_schmitt_trigger(struct ingenic_pinctrl *jzpc,  in ingenic_set_schmitt_trigger()
3885 static void ingenic_set_output_level(struct ingenic_pinctrl *jzpc,  in ingenic_set_output_level()
3896 static void ingenic_set_slew_rate(struct ingenic_pinctrl *jzpc,  in ingenic_set_slew_rate()
3905 static int ingenic_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,  in ingenic_pinconf_set()
3985 static int ingenic_pinconf_group_get(struct pinctrl_dev *pctldev,  in ingenic_pinconf_group_get()
4010 static int ingenic_pinconf_group_set(struct pinctrl_dev *pctldev,  in ingenic_pinconf_group_set()
4032 static const struct pinconf_ops ingenic_confops = {
4040 static const struct regmap_config ingenic_pinctrl_regmap_config = {
4046 static const struct of_device_id ingenic_gpio_of_matches[] __initconst = {
4063 static int __init ingenic_gpio_probe(struct ingenic_pinctrl *jzpc,  in ingenic_gpio_probe()
4144 static int __init ingenic_pinctrl_probe(struct platform_device *pdev)  in ingenic_pinctrl_probe()
4253 static const struct of_device_id ingenic_pinctrl_of_matches[] = {
4325 static struct platform_driver ingenic_pinctrl_driver = {
4332 static int __init ingenic_pinctrl_drv_register(void)  in ingenic_pinctrl_drv_register()