Lines Matching full:pio
40 int pioc_hwirq; /* PIO bank interrupt identifier on AIC */
41 int pioc_virq; /* PIO bank Linux virtual interrupt */
42 int pioc_idx; /* PIO bank index */
43 void __iomem *regbase; /* PIO bank virtual address */
173 enum at91_mux (*get_periph)(void __iomem *pio, unsigned mask);
174 void (*mux_A_periph)(void __iomem *pio, unsigned mask);
175 void (*mux_B_periph)(void __iomem *pio, unsigned mask);
176 void (*mux_C_periph)(void __iomem *pio, unsigned mask);
177 void (*mux_D_periph)(void __iomem *pio, unsigned mask);
178 bool (*get_deglitch)(void __iomem *pio, unsigned pin);
179 void (*set_deglitch)(void __iomem *pio, unsigned mask, bool is_on);
180 bool (*get_debounce)(void __iomem *pio, unsigned pin, u32 *div);
181 void (*set_debounce)(void __iomem *pio, unsigned mask, bool is_on, u32 div);
182 bool (*get_pulldown)(void __iomem *pio, unsigned pin);
183 void (*set_pulldown)(void __iomem *pio, unsigned mask, bool is_on);
184 bool (*get_schmitt_trig)(void __iomem *pio, unsigned pin);
185 void (*disable_schmitt_trig)(void __iomem *pio, unsigned mask);
186 unsigned (*get_drivestrength)(void __iomem *pio, unsigned pin);
187 void (*set_drivestrength)(void __iomem *pio, unsigned pin,
189 unsigned (*get_slewrate)(void __iomem *pio, unsigned pin);
190 void (*set_slewrate)(void __iomem *pio, unsigned pin, u32 slewrate);
386 static void at91_mux_disable_interrupt(void __iomem *pio, unsigned mask) in at91_mux_disable_interrupt() argument
388 writel_relaxed(mask, pio + PIO_IDR); in at91_mux_disable_interrupt()
391 static unsigned at91_mux_get_pullup(void __iomem *pio, unsigned pin) in at91_mux_get_pullup() argument
393 return !((readl_relaxed(pio + PIO_PUSR) >> pin) & 0x1); in at91_mux_get_pullup()
396 static void at91_mux_set_pullup(void __iomem *pio, unsigned mask, bool on) in at91_mux_set_pullup() argument
399 writel_relaxed(mask, pio + PIO_PPDDR); in at91_mux_set_pullup()
401 writel_relaxed(mask, pio + (on ? PIO_PUER : PIO_PUDR)); in at91_mux_set_pullup()
404 static bool at91_mux_get_output(void __iomem *pio, unsigned int pin, bool *val) in at91_mux_get_output() argument
406 *val = (readl_relaxed(pio + PIO_ODSR) >> pin) & 0x1; in at91_mux_get_output()
407 return (readl_relaxed(pio + PIO_OSR) >> pin) & 0x1; in at91_mux_get_output()
410 static void at91_mux_set_output(void __iomem *pio, unsigned int mask, in at91_mux_set_output() argument
413 writel_relaxed(mask, pio + (val ? PIO_SODR : PIO_CODR)); in at91_mux_set_output()
414 writel_relaxed(mask, pio + (is_on ? PIO_OER : PIO_ODR)); in at91_mux_set_output()
417 static unsigned at91_mux_get_multidrive(void __iomem *pio, unsigned pin) in at91_mux_get_multidrive() argument
419 return (readl_relaxed(pio + PIO_MDSR) >> pin) & 0x1; in at91_mux_get_multidrive()
422 static void at91_mux_set_multidrive(void __iomem *pio, unsigned mask, bool on) in at91_mux_set_multidrive() argument
424 writel_relaxed(mask, pio + (on ? PIO_MDER : PIO_MDDR)); in at91_mux_set_multidrive()
427 static void at91_mux_set_A_periph(void __iomem *pio, unsigned mask) in at91_mux_set_A_periph() argument
429 writel_relaxed(mask, pio + PIO_ASR); in at91_mux_set_A_periph()
432 static void at91_mux_set_B_periph(void __iomem *pio, unsigned mask) in at91_mux_set_B_periph() argument
434 writel_relaxed(mask, pio + PIO_BSR); in at91_mux_set_B_periph()
437 static void at91_mux_pio3_set_A_periph(void __iomem *pio, unsigned mask) in at91_mux_pio3_set_A_periph() argument
440 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR1) & ~mask, in at91_mux_pio3_set_A_periph()
441 pio + PIO_ABCDSR1); in at91_mux_pio3_set_A_periph()
442 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR2) & ~mask, in at91_mux_pio3_set_A_periph()
443 pio + PIO_ABCDSR2); in at91_mux_pio3_set_A_periph()
446 static void at91_mux_pio3_set_B_periph(void __iomem *pio, unsigned mask) in at91_mux_pio3_set_B_periph() argument
448 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR1) | mask, in at91_mux_pio3_set_B_periph()
449 pio + PIO_ABCDSR1); in at91_mux_pio3_set_B_periph()
450 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR2) & ~mask, in at91_mux_pio3_set_B_periph()
451 pio + PIO_ABCDSR2); in at91_mux_pio3_set_B_periph()
454 static void at91_mux_pio3_set_C_periph(void __iomem *pio, unsigned mask) in at91_mux_pio3_set_C_periph() argument
456 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR1) & ~mask, pio + PIO_ABCDSR1); in at91_mux_pio3_set_C_periph()
457 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR2) | mask, pio + PIO_ABCDSR2); in at91_mux_pio3_set_C_periph()
460 static void at91_mux_pio3_set_D_periph(void __iomem *pio, unsigned mask) in at91_mux_pio3_set_D_periph() argument
462 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR1) | mask, pio + PIO_ABCDSR1); in at91_mux_pio3_set_D_periph()
463 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR2) | mask, pio + PIO_ABCDSR2); in at91_mux_pio3_set_D_periph()
466 static enum at91_mux at91_mux_pio3_get_periph(void __iomem *pio, unsigned mask) in at91_mux_pio3_get_periph() argument
470 if (readl_relaxed(pio + PIO_PSR) & mask) in at91_mux_pio3_get_periph()
473 select = !!(readl_relaxed(pio + PIO_ABCDSR1) & mask); in at91_mux_pio3_get_periph()
474 select |= (!!(readl_relaxed(pio + PIO_ABCDSR2) & mask) << 1); in at91_mux_pio3_get_periph()
479 static enum at91_mux at91_mux_get_periph(void __iomem *pio, unsigned mask) in at91_mux_get_periph() argument
483 if (readl_relaxed(pio + PIO_PSR) & mask) in at91_mux_get_periph()
486 select = readl_relaxed(pio + PIO_ABSR) & mask; in at91_mux_get_periph()
491 static bool at91_mux_get_deglitch(void __iomem *pio, unsigned pin) in at91_mux_get_deglitch() argument
493 return (readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1; in at91_mux_get_deglitch()
496 static void at91_mux_set_deglitch(void __iomem *pio, unsigned mask, bool is_on) in at91_mux_set_deglitch() argument
498 writel_relaxed(mask, pio + (is_on ? PIO_IFER : PIO_IFDR)); in at91_mux_set_deglitch()
501 static bool at91_mux_pio3_get_deglitch(void __iomem *pio, unsigned pin) in at91_mux_pio3_get_deglitch() argument
503 if ((readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1) in at91_mux_pio3_get_deglitch()
504 return !((readl_relaxed(pio + PIO_IFSCSR) >> pin) & 0x1); in at91_mux_pio3_get_deglitch()
509 static void at91_mux_pio3_set_deglitch(void __iomem *pio, unsigned mask, bool is_on) in at91_mux_pio3_set_deglitch() argument
512 writel_relaxed(mask, pio + PIO_IFSCDR); in at91_mux_pio3_set_deglitch()
513 at91_mux_set_deglitch(pio, mask, is_on); in at91_mux_pio3_set_deglitch()
516 static bool at91_mux_pio3_get_debounce(void __iomem *pio, unsigned pin, u32 *div) in at91_mux_pio3_get_debounce() argument
518 *div = readl_relaxed(pio + PIO_SCDR); in at91_mux_pio3_get_debounce()
520 return ((readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1) && in at91_mux_pio3_get_debounce()
521 ((readl_relaxed(pio + PIO_IFSCSR) >> pin) & 0x1); in at91_mux_pio3_get_debounce()
524 static void at91_mux_pio3_set_debounce(void __iomem *pio, unsigned mask, in at91_mux_pio3_set_debounce() argument
528 writel_relaxed(mask, pio + PIO_IFSCER); in at91_mux_pio3_set_debounce()
529 writel_relaxed(div & PIO_SCDR_DIV, pio + PIO_SCDR); in at91_mux_pio3_set_debounce()
530 writel_relaxed(mask, pio + PIO_IFER); in at91_mux_pio3_set_debounce()
532 writel_relaxed(mask, pio + PIO_IFSCDR); in at91_mux_pio3_set_debounce()
535 static bool at91_mux_pio3_get_pulldown(void __iomem *pio, unsigned pin) in at91_mux_pio3_get_pulldown() argument
537 return !((readl_relaxed(pio + PIO_PPDSR) >> pin) & 0x1); in at91_mux_pio3_get_pulldown()
540 static void at91_mux_pio3_set_pulldown(void __iomem *pio, unsigned mask, bool is_on) in at91_mux_pio3_set_pulldown() argument
543 writel_relaxed(mask, pio + PIO_PUDR); in at91_mux_pio3_set_pulldown()
545 writel_relaxed(mask, pio + (is_on ? PIO_PPDER : PIO_PPDDR)); in at91_mux_pio3_set_pulldown()
548 static void at91_mux_pio3_disable_schmitt_trig(void __iomem *pio, unsigned mask) in at91_mux_pio3_disable_schmitt_trig() argument
550 writel_relaxed(readl_relaxed(pio + PIO_SCHMITT) | mask, pio + PIO_SCHMITT); in at91_mux_pio3_disable_schmitt_trig()
553 static bool at91_mux_pio3_get_schmitt_trig(void __iomem *pio, unsigned pin) in at91_mux_pio3_get_schmitt_trig() argument
555 return (readl_relaxed(pio + PIO_SCHMITT) >> pin) & 0x1; in at91_mux_pio3_get_schmitt_trig()
567 static unsigned at91_mux_sama5d3_get_drivestrength(void __iomem *pio, in at91_mux_sama5d3_get_drivestrength() argument
570 unsigned tmp = read_drive_strength(pio + in at91_mux_sama5d3_get_drivestrength()
581 static unsigned at91_mux_sam9x5_get_drivestrength(void __iomem *pio, in at91_mux_sam9x5_get_drivestrength() argument
584 unsigned tmp = read_drive_strength(pio + in at91_mux_sam9x5_get_drivestrength()
594 static unsigned at91_mux_sam9x60_get_drivestrength(void __iomem *pio, in at91_mux_sam9x60_get_drivestrength() argument
597 unsigned tmp = readl_relaxed(pio + SAM9X60_PIO_DRIVER1); in at91_mux_sam9x60_get_drivestrength()
605 static unsigned at91_mux_sam9x60_get_slewrate(void __iomem *pio, unsigned pin) in at91_mux_sam9x60_get_slewrate() argument
607 unsigned tmp = readl_relaxed(pio + SAM9X60_PIO_SLEWR); in at91_mux_sam9x60_get_slewrate()
626 static void at91_mux_sama5d3_set_drivestrength(void __iomem *pio, unsigned pin, in at91_mux_sama5d3_set_drivestrength() argument
634 set_drive_strength(pio + sama5d3_get_drive_register(pin), pin, setting); in at91_mux_sama5d3_set_drivestrength()
637 static void at91_mux_sam9x5_set_drivestrength(void __iomem *pio, unsigned pin, in at91_mux_sam9x5_set_drivestrength() argument
648 set_drive_strength(pio + at91sam9x5_get_drive_register(pin), pin, in at91_mux_sam9x5_set_drivestrength()
652 static void at91_mux_sam9x60_set_drivestrength(void __iomem *pio, unsigned pin, in at91_mux_sam9x60_set_drivestrength() argument
662 tmp = readl_relaxed(pio + SAM9X60_PIO_DRIVER1); in at91_mux_sam9x60_set_drivestrength()
670 writel_relaxed(tmp, pio + SAM9X60_PIO_DRIVER1); in at91_mux_sam9x60_set_drivestrength()
673 static void at91_mux_sam9x60_set_slewrate(void __iomem *pio, unsigned pin, in at91_mux_sam9x60_set_slewrate() argument
681 tmp = readl_relaxed(pio + SAM9X60_PIO_SLEWR); in at91_mux_sam9x60_set_slewrate()
688 writel_relaxed(tmp, pio + SAM9X60_PIO_SLEWR); in at91_mux_sam9x60_set_slewrate()
762 dev_dbg(dev, "pio%c%d configured as periph%c with conf = 0x%lx\n", in at91_pin_dbg()
765 dev_dbg(dev, "pio%c%d configured as gpio with conf = 0x%lx\n", in at91_pin_dbg()
806 dev_err(info->dev, "%s: pin conf %d mux_id %d not supported for pio%c%d\n", in pin_check_config()
814 static void at91_mux_gpio_disable(void __iomem *pio, unsigned mask) in at91_mux_gpio_disable() argument
816 writel_relaxed(mask, pio + PIO_PDR); in at91_mux_gpio_disable()
819 static void at91_mux_gpio_enable(void __iomem *pio, unsigned mask, bool input) in at91_mux_gpio_enable() argument
821 writel_relaxed(mask, pio + PIO_PER); in at91_mux_gpio_enable()
822 writel_relaxed(mask, pio + (input ? PIO_ODR : PIO_OER)); in at91_mux_gpio_enable()
834 void __iomem *pio; in at91_pmx_set() local
851 pio = pin_to_controller(info, pin->bank); in at91_pmx_set()
853 if (!pio) in at91_pmx_set()
857 at91_mux_disable_interrupt(pio, mask); in at91_pmx_set()
860 at91_mux_gpio_enable(pio, mask, 1); in at91_pmx_set()
863 info->ops->mux_A_periph(pio, mask); in at91_pmx_set()
866 info->ops->mux_B_periph(pio, mask); in at91_pmx_set()
871 info->ops->mux_C_periph(pio, mask); in at91_pmx_set()
876 info->ops->mux_D_periph(pio, mask); in at91_pmx_set()
880 at91_mux_gpio_disable(pio, mask); in at91_pmx_set()
937 dev_dbg(npct->dev, "enable pin %u as PIO%c%d 0x%x\n", in at91_gpio_request_enable()
968 void __iomem *pio; in at91_pinconf_get() local
975 pio = pin_to_controller(info, pin_to_bank(pin_id)); in at91_pinconf_get()
977 if (!pio) in at91_pinconf_get()
982 if (at91_mux_get_multidrive(pio, pin)) in at91_pinconf_get()
985 if (at91_mux_get_pullup(pio, pin)) in at91_pinconf_get()
988 if (info->ops->get_deglitch && info->ops->get_deglitch(pio, pin)) in at91_pinconf_get()
990 if (info->ops->get_debounce && info->ops->get_debounce(pio, pin, &div)) in at91_pinconf_get()
992 if (info->ops->get_pulldown && info->ops->get_pulldown(pio, pin)) in at91_pinconf_get()
994 if (info->ops->get_schmitt_trig && info->ops->get_schmitt_trig(pio, pin)) in at91_pinconf_get()
997 *config |= (info->ops->get_drivestrength(pio, pin) in at91_pinconf_get()
1000 *config |= (info->ops->get_slewrate(pio, pin) << SLEWRATE_SHIFT); in at91_pinconf_get()
1001 if (at91_mux_get_output(pio, pin, &out)) in at91_pinconf_get()
1013 void __iomem *pio; in at91_pinconf_set() local
1024 pio = pin_to_controller(info, pin_to_bank(pin_id)); in at91_pinconf_set()
1026 if (!pio) in at91_pinconf_set()
1035 at91_mux_set_output(pio, mask, config & OUTPUT, in at91_pinconf_set()
1037 at91_mux_set_pullup(pio, mask, config & PULL_UP); in at91_pinconf_set()
1038 at91_mux_set_multidrive(pio, mask, config & MULTI_DRIVE); in at91_pinconf_set()
1040 info->ops->set_deglitch(pio, mask, config & DEGLITCH); in at91_pinconf_set()
1042 info->ops->set_debounce(pio, mask, config & DEBOUNCE, in at91_pinconf_set()
1045 info->ops->set_pulldown(pio, mask, config & PULL_DOWN); in at91_pinconf_set()
1047 info->ops->disable_schmitt_trig(pio, mask); in at91_pinconf_set()
1049 info->ops->set_drivestrength(pio, pin, in at91_pinconf_set()
1053 info->ops->set_slewrate(pio, pin, in at91_pinconf_set()
1390 pdesc->name = kasprintf(GFP_KERNEL, "pio%c%d", i + 'A', j); in at91_pinctrl_probe()
1417 void __iomem *pio = at91_gpio->regbase; in at91_gpio_get_direction() local
1421 osr = readl_relaxed(pio + PIO_OSR); in at91_gpio_get_direction()
1431 void __iomem *pio = at91_gpio->regbase; in at91_gpio_direction_input() local
1434 writel_relaxed(mask, pio + PIO_ODR); in at91_gpio_direction_input()
1441 void __iomem *pio = at91_gpio->regbase; in at91_gpio_get() local
1445 pdsr = readl_relaxed(pio + PIO_PDSR); in at91_gpio_get()
1453 void __iomem *pio = at91_gpio->regbase; in at91_gpio_set() local
1456 writel_relaxed(mask, pio + (val ? PIO_SODR : PIO_CODR)); in at91_gpio_set()
1463 void __iomem *pio = at91_gpio->regbase; in at91_gpio_set_multiple() local
1470 writel_relaxed(set_mask, pio + PIO_SODR); in at91_gpio_set_multiple()
1471 writel_relaxed(clear_mask, pio + PIO_CODR); in at91_gpio_set_multiple()
1478 void __iomem *pio = at91_gpio->regbase; in at91_gpio_direction_output() local
1481 writel_relaxed(mask, pio + (val ? PIO_SODR : PIO_CODR)); in at91_gpio_direction_output()
1482 writel_relaxed(mask, pio + PIO_OER); in at91_gpio_direction_output()
1493 void __iomem *pio = at91_gpio->regbase; in at91_gpio_dbg_show() local
1499 mode = at91_gpio->ops->get_periph(pio, mask); in at91_gpio_dbg_show()
1505 readl_relaxed(pio + PIO_OSR) & mask ? in at91_gpio_dbg_show()
1508 readl_relaxed(pio + PIO_PDSR) & mask ? in at91_gpio_dbg_show()
1537 void __iomem *pio = at91_gpio->regbase; in gpio_irq_mask() local
1540 if (pio) in gpio_irq_mask()
1541 writel_relaxed(mask, pio + PIO_IDR); in gpio_irq_mask()
1547 void __iomem *pio = at91_gpio->regbase; in gpio_irq_unmask() local
1550 if (pio) in gpio_irq_unmask()
1551 writel_relaxed(mask, pio + PIO_IER); in gpio_irq_unmask()
1569 void __iomem *pio = at91_gpio->regbase; in alt_gpio_irq_type() local
1575 writel_relaxed(mask, pio + PIO_ESR); in alt_gpio_irq_type()
1576 writel_relaxed(mask, pio + PIO_REHLSR); in alt_gpio_irq_type()
1580 writel_relaxed(mask, pio + PIO_ESR); in alt_gpio_irq_type()
1581 writel_relaxed(mask, pio + PIO_FELLSR); in alt_gpio_irq_type()
1585 writel_relaxed(mask, pio + PIO_LSR); in alt_gpio_irq_type()
1586 writel_relaxed(mask, pio + PIO_FELLSR); in alt_gpio_irq_type()
1590 writel_relaxed(mask, pio + PIO_LSR); in alt_gpio_irq_type()
1591 writel_relaxed(mask, pio + PIO_REHLSR); in alt_gpio_irq_type()
1599 writel_relaxed(mask, pio + PIO_AIMDR); in alt_gpio_irq_type()
1608 writel_relaxed(mask, pio + PIO_AIMER); in alt_gpio_irq_type()
1647 void __iomem *pio; in at91_pinctrl_gpio_suspend() local
1652 pio = gpio_chips[i]->regbase; in at91_pinctrl_gpio_suspend()
1654 backups[i] = readl_relaxed(pio + PIO_IMR); in at91_pinctrl_gpio_suspend()
1655 writel_relaxed(backups[i], pio + PIO_IDR); in at91_pinctrl_gpio_suspend()
1656 writel_relaxed(wakeups[i], pio + PIO_IER); in at91_pinctrl_gpio_suspend()
1671 void __iomem *pio; in at91_pinctrl_gpio_resume() local
1676 pio = gpio_chips[i]->regbase; in at91_pinctrl_gpio_resume()
1681 writel_relaxed(wakeups[i], pio + PIO_IDR); in at91_pinctrl_gpio_resume()
1682 writel_relaxed(backups[i], pio + PIO_IER); in at91_pinctrl_gpio_resume()
1695 void __iomem *pio = at91_gpio->regbase; in gpio_irq_handler() local
1705 isr = readl_relaxed(pio + PIO_ISR) & readl_relaxed(pio + PIO_IMR); in gpio_irq_handler()
1710 pio = at91_gpio->regbase; in gpio_irq_handler()
1747 /* Disable irqs of this PIO controller */ in at91_gpio_of_irq_setup()
1894 names[i] = kasprintf(GFP_KERNEL, "pio%c%d", alias_idx + 'A', i); in at91_gpio_probe()