1 // SPDX-License-Identifier: GPL-2.0
3  * Copyright (c) 2016-2020, NVIDIA CORPORATION.  All rights reserved.
18 #include "xusb.h"
21 #define HS_CURR_LEVEL_PADX_SHIFT(x)	((x) ? (11 + (x - 1) * 6) : 0)
31 /* XUSB PADCTL registers */
116 /* XUSB AO registers */
261 	/* padctl context */
267 	writel(value, priv->ao_regs + offset);  in ao_writel()
272 	return readl(priv->ao_regs + offset);  in ao_readl()
276 to_tegra186_xusb_padctl(struct tegra_xusb_padctl *padctl)  in to_tegra186_xusb_padctl()  argument
278 	return container_of(padctl, struct tegra186_xusb_padctl, base);  in to_tegra186_xusb_padctl()
291 		return ERR_PTR(-ENOMEM);  in tegra186_usb2_lane_probe()
293 	INIT_LIST_HEAD(&usb2->base.list);  in tegra186_usb2_lane_probe()
294 	usb2->base.soc = &pad->soc->lanes[index];  in tegra186_usb2_lane_probe()
295 	usb2->base.index = index;  in tegra186_usb2_lane_probe()
296 	usb2->base.pad = pad;  in tegra186_usb2_lane_probe()
297 	usb2->base.np = np;  in tegra186_usb2_lane_probe()
299 	err = tegra_xusb_lane_parse_dt(&usb2->base, np);  in tegra186_usb2_lane_probe()
305 	return &usb2->base;  in tegra186_usb2_lane_probe()
318 	struct tegra_xusb_padctl *padctl = lane->pad->padctl;  in tegra186_utmi_enable_phy_sleepwalk()  local
319 	struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl);  in tegra186_utmi_enable_phy_sleepwalk()
320 	unsigned int index = lane->index;  in tegra186_utmi_enable_phy_sleepwalk()
323 	mutex_lock(&padctl->lock);  in tegra186_utmi_enable_phy_sleepwalk()
400 	/* setup the pull-ups and pull-downs of the signals during the four  in tegra186_utmi_enable_phy_sleepwalk()
411 		/* J state: D+/D- = high/low, K state: D+/D- = low/high */  in tegra186_utmi_enable_phy_sleepwalk()
418 		/* J state: D+/D- = low/high, K state: D+/D- = high/low */  in tegra186_utmi_enable_phy_sleepwalk()
455 	mutex_unlock(&padctl->lock);  in tegra186_utmi_enable_phy_sleepwalk()
462 	struct tegra_xusb_padctl *padctl = lane->pad->padctl;  in tegra186_utmi_disable_phy_sleepwalk()  local
463 	struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl);  in tegra186_utmi_disable_phy_sleepwalk()
464 	unsigned int index = lane->index;  in tegra186_utmi_disable_phy_sleepwalk()
467 	mutex_lock(&padctl->lock);  in tegra186_utmi_disable_phy_sleepwalk()
474 	/* switch the electric control of the USB2.0 pad to XUSB vcore logic */  in tegra186_utmi_disable_phy_sleepwalk()
496 	mutex_unlock(&padctl->lock);  in tegra186_utmi_disable_phy_sleepwalk()
503 	struct tegra_xusb_padctl *padctl = lane->pad->padctl;  in tegra186_utmi_enable_phy_wake()  local
504 	unsigned int index = lane->index;  in tegra186_utmi_enable_phy_wake()
507 	mutex_lock(&padctl->lock);  in tegra186_utmi_enable_phy_wake()
509 	value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM);  in tegra186_utmi_enable_phy_wake()
512 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM);  in tegra186_utmi_enable_phy_wake()
516 	value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM);  in tegra186_utmi_enable_phy_wake()
519 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM);  in tegra186_utmi_enable_phy_wake()
521 	mutex_unlock(&padctl->lock);  in tegra186_utmi_enable_phy_wake()
528 	struct tegra_xusb_padctl *padctl = lane->pad->padctl;  in tegra186_utmi_disable_phy_wake()  local
529 	unsigned int index = lane->index;  in tegra186_utmi_disable_phy_wake()
532 	mutex_lock(&padctl->lock);  in tegra186_utmi_disable_phy_wake()
534 	value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM);  in tegra186_utmi_disable_phy_wake()
537 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM);  in tegra186_utmi_disable_phy_wake()
541 	value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM);  in tegra186_utmi_disable_phy_wake()
544 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM);  in tegra186_utmi_disable_phy_wake()
546 	mutex_unlock(&padctl->lock);  in tegra186_utmi_disable_phy_wake()
553 	struct tegra_xusb_padctl *padctl = lane->pad->padctl;  in tegra186_utmi_phy_remote_wake_detected()  local
554 	unsigned int index = lane->index;  in tegra186_utmi_phy_remote_wake_detected()
557 	value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM);  in tegra186_utmi_phy_remote_wake_detected()
575 static void tegra186_utmi_bias_pad_power_on(struct tegra_xusb_padctl *padctl)  in tegra186_utmi_bias_pad_power_on()  argument
577 	struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl);  in tegra186_utmi_bias_pad_power_on()
578 	struct device *dev = padctl->dev;  in tegra186_utmi_bias_pad_power_on()
582 	mutex_lock(&padctl->lock);  in tegra186_utmi_bias_pad_power_on()
584 	if (priv->bias_pad_enable++ > 0) {  in tegra186_utmi_bias_pad_power_on()
585 		mutex_unlock(&padctl->lock);  in tegra186_utmi_bias_pad_power_on()
589 	err = clk_prepare_enable(priv->usb2_trk_clk);  in tegra186_utmi_bias_pad_power_on()
593 	value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL1);  in tegra186_utmi_bias_pad_power_on()
598 	padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL1);  in tegra186_utmi_bias_pad_power_on()
600 	value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL0);  in tegra186_utmi_bias_pad_power_on()
603 	value |= HS_SQUELCH_LEVEL(priv->calib.hs_squelch);  in tegra186_utmi_bias_pad_power_on()
604 	padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL0);  in tegra186_utmi_bias_pad_power_on()
608 	value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL1);  in tegra186_utmi_bias_pad_power_on()
610 	padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL1);  in tegra186_utmi_bias_pad_power_on()
612 	mutex_unlock(&padctl->lock);  in tegra186_utmi_bias_pad_power_on()
615 static void tegra186_utmi_bias_pad_power_off(struct tegra_xusb_padctl *padctl)  in tegra186_utmi_bias_pad_power_off()  argument
617 	struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl);  in tegra186_utmi_bias_pad_power_off()
620 	mutex_lock(&padctl->lock);  in tegra186_utmi_bias_pad_power_off()
622 	if (WARN_ON(priv->bias_pad_enable == 0)) {  in tegra186_utmi_bias_pad_power_off()
623 		mutex_unlock(&padctl->lock);  in tegra186_utmi_bias_pad_power_off()
627 	if (--priv->bias_pad_enable > 0) {  in tegra186_utmi_bias_pad_power_off()
628 		mutex_unlock(&padctl->lock);  in tegra186_utmi_bias_pad_power_off()
632 	value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL1);  in tegra186_utmi_bias_pad_power_off()
634 	padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL1);  in tegra186_utmi_bias_pad_power_off()
636 	clk_disable_unprepare(priv->usb2_trk_clk);  in tegra186_utmi_bias_pad_power_off()
638 	mutex_unlock(&padctl->lock);  in tegra186_utmi_bias_pad_power_off()
644 	struct tegra_xusb_padctl *padctl = lane->pad->padctl;  in tegra_phy_xusb_utmi_pad_power_on()  local
646 	struct device *dev = padctl->dev;  in tegra_phy_xusb_utmi_pad_power_on()
647 	unsigned int index = lane->index;  in tegra_phy_xusb_utmi_pad_power_on()
653 	port = tegra_xusb_find_usb2_port(padctl, index);  in tegra_phy_xusb_utmi_pad_power_on()
659 	tegra186_utmi_bias_pad_power_on(padctl);  in tegra_phy_xusb_utmi_pad_power_on()
663 	value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index));  in tegra_phy_xusb_utmi_pad_power_on()
665 	padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index));  in tegra_phy_xusb_utmi_pad_power_on()
667 	value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index));  in tegra_phy_xusb_utmi_pad_power_on()
669 	padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index));  in tegra_phy_xusb_utmi_pad_power_on()
675 	struct tegra_xusb_padctl *padctl = lane->pad->padctl;  in tegra_phy_xusb_utmi_pad_power_down()  local
676 	unsigned int index = lane->index;  in tegra_phy_xusb_utmi_pad_power_down()
682 	value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index));  in tegra_phy_xusb_utmi_pad_power_down()
684 	padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index));  in tegra_phy_xusb_utmi_pad_power_down()
686 	value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index));  in tegra_phy_xusb_utmi_pad_power_down()
688 	padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index));  in tegra_phy_xusb_utmi_pad_power_down()
692 	tegra186_utmi_bias_pad_power_off(padctl);  in tegra_phy_xusb_utmi_pad_power_down()
695 static int tegra186_xusb_padctl_vbus_override(struct tegra_xusb_padctl *padctl,  in tegra186_xusb_padctl_vbus_override()  argument
700 	dev_dbg(padctl->dev, "%s vbus override\n", status ? "set" : "clear");  in tegra186_xusb_padctl_vbus_override()
702 	value = padctl_readl(padctl, USB2_VBUS_ID);  in tegra186_xusb_padctl_vbus_override()
712 	padctl_writel(padctl, value, USB2_VBUS_ID);  in tegra186_xusb_padctl_vbus_override()
717 static int tegra186_xusb_padctl_id_override(struct tegra_xusb_padctl *padctl,  in tegra186_xusb_padctl_id_override()  argument
722 	dev_dbg(padctl->dev, "%s id override\n", status ? "set" : "clear");  in tegra186_xusb_padctl_id_override()
724 	value = padctl_readl(padctl, USB2_VBUS_ID);  in tegra186_xusb_padctl_id_override()
729 			padctl_writel(padctl, value, USB2_VBUS_ID);  in tegra186_xusb_padctl_id_override()
732 			value = padctl_readl(padctl, USB2_VBUS_ID);  in tegra186_xusb_padctl_id_override()
742 	padctl_writel(padctl, value, USB2_VBUS_ID);  in tegra186_xusb_padctl_id_override()
751 	struct tegra_xusb_padctl *padctl = lane->pad->padctl;  in tegra186_utmi_phy_set_mode()  local
752 	struct tegra_xusb_usb2_port *port = tegra_xusb_find_usb2_port(padctl,  in tegra186_utmi_phy_set_mode()
753 								lane->index);  in tegra186_utmi_phy_set_mode()
756 	mutex_lock(&padctl->lock);  in tegra186_utmi_phy_set_mode()
758 	dev_dbg(&port->base.dev, "%s: mode %d", __func__, mode);  in tegra186_utmi_phy_set_mode()
762 			tegra186_xusb_padctl_id_override(padctl, true);  in tegra186_utmi_phy_set_mode()
764 			err = regulator_enable(port->supply);  in tegra186_utmi_phy_set_mode()
766 			tegra186_xusb_padctl_vbus_override(padctl, true);  in tegra186_utmi_phy_set_mode()
773 			if (regulator_is_enabled(port->supply))  in tegra186_utmi_phy_set_mode()
774 				regulator_disable(port->supply);  in tegra186_utmi_phy_set_mode()
776 			tegra186_xusb_padctl_id_override(padctl, false);  in tegra186_utmi_phy_set_mode()
777 			tegra186_xusb_padctl_vbus_override(padctl, false);  in tegra186_utmi_phy_set_mode()
781 	mutex_unlock(&padctl->lock);  in tegra186_utmi_phy_set_mode()
790 	struct tegra_xusb_padctl *padctl = lane->pad->padctl;  in tegra186_utmi_phy_power_on()  local
791 	struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl);  in tegra186_utmi_phy_power_on()
793 	unsigned int index = lane->index;  in tegra186_utmi_phy_power_on()
794 	struct device *dev = padctl->dev;  in tegra186_utmi_phy_power_on()
797 	port = tegra_xusb_find_usb2_port(padctl, index);  in tegra186_utmi_phy_power_on()
800 		return -ENODEV;  in tegra186_utmi_phy_power_on()
803 	value = padctl_readl(padctl, XUSB_PADCTL_USB2_PAD_MUX);  in tegra186_utmi_phy_power_on()
806 	padctl_writel(padctl, value, XUSB_PADCTL_USB2_PAD_MUX);  in tegra186_utmi_phy_power_on()
808 	value = padctl_readl(padctl, XUSB_PADCTL_USB2_PORT_CAP);  in tegra186_utmi_phy_power_on()
811 	if (port->mode == USB_DR_MODE_UNKNOWN)  in tegra186_utmi_phy_power_on()
813 	else if (port->mode == USB_DR_MODE_PERIPHERAL)  in tegra186_utmi_phy_power_on()
815 	else if (port->mode == USB_DR_MODE_HOST)  in tegra186_utmi_phy_power_on()
817 	else if (port->mode == USB_DR_MODE_OTG)  in tegra186_utmi_phy_power_on()
820 	padctl_writel(padctl, value, XUSB_PADCTL_USB2_PORT_CAP);  in tegra186_utmi_phy_power_on()
822 	value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index));  in tegra186_utmi_phy_power_on()
827 	if (usb2->hs_curr_level_offset) {  in tegra186_utmi_phy_power_on()
830 		hs_current_level = (int)priv->calib.hs_curr_level[index] +  in tegra186_utmi_phy_power_on()
831 						usb2->hs_curr_level_offset;  in tegra186_utmi_phy_power_on()
840 		value |= HS_CURR_LEVEL(priv->calib.hs_curr_level[index]);  in tegra186_utmi_phy_power_on()
843 	padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index));  in tegra186_utmi_phy_power_on()
845 	value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index));  in tegra186_utmi_phy_power_on()
847 	value |= TERM_RANGE_ADJ(priv->calib.hs_term_range_adj);  in tegra186_utmi_phy_power_on()
849 	value |= RPD_CTRL(priv->calib.rpd_ctrl);  in tegra186_utmi_phy_power_on()
850 	padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index));  in tegra186_utmi_phy_power_on()
868 	struct tegra_xusb_padctl *padctl = lane->pad->padctl;  in tegra186_utmi_phy_init()  local
870 	unsigned int index = lane->index;  in tegra186_utmi_phy_init()
871 	struct device *dev = padctl->dev;  in tegra186_utmi_phy_init()
874 	port = tegra_xusb_find_usb2_port(padctl, index);  in tegra186_utmi_phy_init()
877 		return -ENODEV;  in tegra186_utmi_phy_init()
880 	if (port->supply && port->mode == USB_DR_MODE_HOST) {  in tegra186_utmi_phy_init()
881 		err = regulator_enable(port->supply);  in tegra186_utmi_phy_init()
895 	struct tegra_xusb_padctl *padctl = lane->pad->padctl;  in tegra186_utmi_phy_exit()  local
897 	unsigned int index = lane->index;  in tegra186_utmi_phy_exit()
898 	struct device *dev = padctl->dev;  in tegra186_utmi_phy_exit()
901 	port = tegra_xusb_find_usb2_port(padctl, index);  in tegra186_utmi_phy_exit()
904 		return -ENODEV;  in tegra186_utmi_phy_exit()
907 	if (port->supply && port->mode == USB_DR_MODE_HOST) {  in tegra186_utmi_phy_exit()
908 		err = regulator_disable(port->supply);  in tegra186_utmi_phy_exit()
929 tegra186_usb2_pad_probe(struct tegra_xusb_padctl *padctl,  in tegra186_usb2_pad_probe()  argument
933 	struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl);  in tegra186_usb2_pad_probe()
940 		return ERR_PTR(-ENOMEM);  in tegra186_usb2_pad_probe()
942 	pad = &usb2->base;  in tegra186_usb2_pad_probe()
943 	pad->ops = &tegra186_usb2_lane_ops;  in tegra186_usb2_pad_probe()
944 	pad->soc = soc;  in tegra186_usb2_pad_probe()
946 	err = tegra_xusb_pad_init(pad, padctl, np);  in tegra186_usb2_pad_probe()
952 	priv->usb2_trk_clk = devm_clk_get(&pad->dev, "trk");  in tegra186_usb2_pad_probe()
953 	if (IS_ERR(priv->usb2_trk_clk)) {  in tegra186_usb2_pad_probe()
954 		err = PTR_ERR(priv->usb2_trk_clk);  in tegra186_usb2_pad_probe()
955 		dev_dbg(&pad->dev, "failed to get usb2 trk clock: %d\n", err);  in tegra186_usb2_pad_probe()
963 	dev_set_drvdata(&pad->dev, pad);  in tegra186_usb2_pad_probe()
968 	device_unregister(&pad->dev);  in tegra186_usb2_pad_probe()
986 	"xusb",
1001 	return tegra_xusb_find_lane(port->padctl, "usb2", port->index);  in tegra186_usb2_port_map()
1022 		return ERR_PTR(-ENOMEM);  in tegra186_usb3_lane_probe()
1024 	INIT_LIST_HEAD(&usb3->base.list);  in tegra186_usb3_lane_probe()
1025 	usb3->base.soc = &pad->soc->lanes[index];  in tegra186_usb3_lane_probe()
1026 	usb3->base.index = index;  in tegra186_usb3_lane_probe()
1027 	usb3->base.pad = pad;  in tegra186_usb3_lane_probe()
1028 	usb3->base.np = np;  in tegra186_usb3_lane_probe()
1030 	err = tegra_xusb_lane_parse_dt(&usb3->base, np);  in tegra186_usb3_lane_probe()
1036 	return &usb3->base;  in tegra186_usb3_lane_probe()
1049 	struct tegra_xusb_padctl *padctl = lane->pad->padctl;  in tegra186_usb3_enable_phy_sleepwalk()  local
1050 	unsigned int index = lane->index;  in tegra186_usb3_enable_phy_sleepwalk()
1053 	mutex_lock(&padctl->lock);  in tegra186_usb3_enable_phy_sleepwalk()
1055 	value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1);  in tegra186_usb3_enable_phy_sleepwalk()
1057 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1);  in tegra186_usb3_enable_phy_sleepwalk()
1061 	value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1);  in tegra186_usb3_enable_phy_sleepwalk()
1063 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1);  in tegra186_usb3_enable_phy_sleepwalk()
1067 	mutex_unlock(&padctl->lock);  in tegra186_usb3_enable_phy_sleepwalk()
1074 	struct tegra_xusb_padctl *padctl = lane->pad->padctl;  in tegra186_usb3_disable_phy_sleepwalk()  local
1075 	unsigned int index = lane->index;  in tegra186_usb3_disable_phy_sleepwalk()
1078 	mutex_lock(&padctl->lock);  in tegra186_usb3_disable_phy_sleepwalk()
1080 	value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1);  in tegra186_usb3_disable_phy_sleepwalk()
1082 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1);  in tegra186_usb3_disable_phy_sleepwalk()
1086 	value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1);  in tegra186_usb3_disable_phy_sleepwalk()
1088 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1);  in tegra186_usb3_disable_phy_sleepwalk()
1090 	mutex_unlock(&padctl->lock);  in tegra186_usb3_disable_phy_sleepwalk()
1097 	struct tegra_xusb_padctl *padctl = lane->pad->padctl;  in tegra186_usb3_enable_phy_wake()  local
1098 	unsigned int index = lane->index;  in tegra186_usb3_enable_phy_wake()
1101 	mutex_lock(&padctl->lock);  in tegra186_usb3_enable_phy_wake()
1103 	value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM);  in tegra186_usb3_enable_phy_wake()
1106 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM);  in tegra186_usb3_enable_phy_wake()
1110 	value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM);  in tegra186_usb3_enable_phy_wake()
1113 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM);  in tegra186_usb3_enable_phy_wake()
1115 	mutex_unlock(&padctl->lock);  in tegra186_usb3_enable_phy_wake()
1122 	struct tegra_xusb_padctl *padctl = lane->pad->padctl;  in tegra186_usb3_disable_phy_wake()  local
1123 	unsigned int index = lane->index;  in tegra186_usb3_disable_phy_wake()
1126 	mutex_lock(&padctl->lock);  in tegra186_usb3_disable_phy_wake()
1128 	value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM);  in tegra186_usb3_disable_phy_wake()
1131 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM);  in tegra186_usb3_disable_phy_wake()
1135 	value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM);  in tegra186_usb3_disable_phy_wake()
1138 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM);  in tegra186_usb3_disable_phy_wake()
1140 	mutex_unlock(&padctl->lock);  in tegra186_usb3_disable_phy_wake()
1147 	struct tegra_xusb_padctl *padctl = lane->pad->padctl;  in tegra186_usb3_phy_remote_wake_detected()  local
1148 	unsigned int index = lane->index;  in tegra186_usb3_phy_remote_wake_detected()
1151 	value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM);  in tegra186_usb3_phy_remote_wake_detected()
1180 	return tegra_xusb_find_lane(port->padctl, "usb3", port->index);  in tegra186_usb3_port_map()
1194 	struct tegra_xusb_padctl *padctl = lane->pad->padctl;  in tegra186_usb3_phy_power_on()  local
1197 	unsigned int index = lane->index;  in tegra186_usb3_phy_power_on()
1198 	struct device *dev = padctl->dev;  in tegra186_usb3_phy_power_on()
1201 	port = tegra_xusb_find_usb3_port(padctl, index);  in tegra186_usb3_phy_power_on()
1204 		return -ENODEV;  in tegra186_usb3_phy_power_on()
1207 	usb2 = tegra_xusb_find_usb2_port(padctl, port->port);  in tegra186_usb3_phy_power_on()
1211 		return -ENODEV;  in tegra186_usb3_phy_power_on()
1214 	mutex_lock(&padctl->lock);  in tegra186_usb3_phy_power_on()
1216 	value = padctl_readl(padctl, XUSB_PADCTL_SS_PORT_CAP);  in tegra186_usb3_phy_power_on()
1219 	if (usb2->mode == USB_DR_MODE_UNKNOWN)  in tegra186_usb3_phy_power_on()
1221 	else if (usb2->mode == USB_DR_MODE_PERIPHERAL)  in tegra186_usb3_phy_power_on()
1223 	else if (usb2->mode == USB_DR_MODE_HOST)  in tegra186_usb3_phy_power_on()
1225 	else if (usb2->mode == USB_DR_MODE_OTG)  in tegra186_usb3_phy_power_on()
1228 	padctl_writel(padctl, value, XUSB_PADCTL_SS_PORT_CAP);  in tegra186_usb3_phy_power_on()
1230 	if (padctl->soc->supports_gen2 && port->disable_gen2) {  in tegra186_usb3_phy_power_on()
1231 		value = padctl_readl(padctl, XUSB_PADCTL_SS_PORT_CFG);  in tegra186_usb3_phy_power_on()
1236 		padctl_writel(padctl, value, XUSB_PADCTL_SS_PORT_CFG);  in tegra186_usb3_phy_power_on()
1239 	value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1);  in tegra186_usb3_phy_power_on()
1241 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1);  in tegra186_usb3_phy_power_on()
1245 	value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1);  in tegra186_usb3_phy_power_on()
1247 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1);  in tegra186_usb3_phy_power_on()
1251 	value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1);  in tegra186_usb3_phy_power_on()
1253 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1);  in tegra186_usb3_phy_power_on()
1255 	mutex_unlock(&padctl->lock);  in tegra186_usb3_phy_power_on()
1263 	struct tegra_xusb_padctl *padctl = lane->pad->padctl;  in tegra186_usb3_phy_power_off()  local
1265 	unsigned int index = lane->index;  in tegra186_usb3_phy_power_off()
1266 	struct device *dev = padctl->dev;  in tegra186_usb3_phy_power_off()
1269 	port = tegra_xusb_find_usb3_port(padctl, index);  in tegra186_usb3_phy_power_off()
1272 		return -ENODEV;  in tegra186_usb3_phy_power_off()
1275 	mutex_lock(&padctl->lock);  in tegra186_usb3_phy_power_off()
1277 	value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1);  in tegra186_usb3_phy_power_off()
1279 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1);  in tegra186_usb3_phy_power_off()
1283 	value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1);  in tegra186_usb3_phy_power_off()
1285 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1);  in tegra186_usb3_phy_power_off()
1289 	value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1);  in tegra186_usb3_phy_power_off()
1291 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1);  in tegra186_usb3_phy_power_off()
1293 	mutex_unlock(&padctl->lock);  in tegra186_usb3_phy_power_off()
1317 tegra186_usb3_pad_probe(struct tegra_xusb_padctl *padctl,  in tegra186_usb3_pad_probe()  argument
1327 		return ERR_PTR(-ENOMEM);  in tegra186_usb3_pad_probe()
1329 	pad = &usb3->base;  in tegra186_usb3_pad_probe()
1330 	pad->ops = &tegra186_usb3_lane_ops;  in tegra186_usb3_pad_probe()
1331 	pad->soc = soc;  in tegra186_usb3_pad_probe()
1333 	err = tegra_xusb_pad_init(pad, padctl, np);  in tegra186_usb3_pad_probe()
1343 	dev_set_drvdata(&pad->dev, pad);  in tegra186_usb3_pad_probe()
1348 	device_unregister(&pad->dev);  in tegra186_usb3_pad_probe()
1366 	"xusb",
1370 tegra186_xusb_read_fuse_calibration(struct tegra186_xusb_padctl *padctl)  in tegra186_xusb_read_fuse_calibration()  argument
1372 	struct device *dev = padctl->base.dev;  in tegra186_xusb_read_fuse_calibration()
1377 	count = padctl->base.soc->ports.usb2.count;  in tegra186_xusb_read_fuse_calibration()
1381 		return -ENOMEM;  in tegra186_xusb_read_fuse_calibration()
1385 		if (err != -EPROBE_DEFER)  in tegra186_xusb_read_fuse_calibration()
1397 	padctl->calib.hs_curr_level = level;  in tegra186_xusb_read_fuse_calibration()
1399 	padctl->calib.hs_squelch = (value >> HS_SQUELCH_SHIFT) &  in tegra186_xusb_read_fuse_calibration()
1401 	padctl->calib.hs_term_range_adj = (value >> HS_TERM_RANGE_ADJ_SHIFT) &  in tegra186_xusb_read_fuse_calibration()
1412 	padctl->calib.rpd_ctrl = (value >> RPD_CTRL_SHIFT) & RPD_CTRL_MASK;  in tegra186_xusb_read_fuse_calibration()
1428 		return ERR_PTR(-ENOMEM);  in tegra186_xusb_padctl_probe()
1430 	priv->base.dev = dev;  in tegra186_xusb_padctl_probe()
1431 	priv->base.soc = soc;  in tegra186_xusb_padctl_probe()
1434 	priv->ao_regs = devm_ioremap_resource(dev, res);  in tegra186_xusb_padctl_probe()
1435 	if (IS_ERR(priv->ao_regs))  in tegra186_xusb_padctl_probe()
1436 		return ERR_CAST(priv->ao_regs);  in tegra186_xusb_padctl_probe()
1442 	return &priv->base;  in tegra186_xusb_padctl_probe()
1445 static void tegra186_xusb_padctl_save(struct tegra_xusb_padctl *padctl)  in tegra186_xusb_padctl_save()  argument
1447 	struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl);  in tegra186_xusb_padctl_save()
1449 	priv->context.vbus_id = padctl_readl(padctl, USB2_VBUS_ID);  in tegra186_xusb_padctl_save()
1450 	priv->context.usb2_pad_mux = padctl_readl(padctl, XUSB_PADCTL_USB2_PAD_MUX);  in tegra186_xusb_padctl_save()
1451 	priv->context.usb2_port_cap = padctl_readl(padctl, XUSB_PADCTL_USB2_PORT_CAP);  in tegra186_xusb_padctl_save()
1452 	priv->context.ss_port_cap = padctl_readl(padctl, XUSB_PADCTL_SS_PORT_CAP);  in tegra186_xusb_padctl_save()
1455 static void tegra186_xusb_padctl_restore(struct tegra_xusb_padctl *padctl)  in tegra186_xusb_padctl_restore()  argument
1457 	struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl);  in tegra186_xusb_padctl_restore()
1459 	padctl_writel(padctl, priv->context.usb2_pad_mux, XUSB_PADCTL_USB2_PAD_MUX);  in tegra186_xusb_padctl_restore()
1460 	padctl_writel(padctl, priv->context.usb2_port_cap, XUSB_PADCTL_USB2_PORT_CAP);  in tegra186_xusb_padctl_restore()
1461 	padctl_writel(padctl, priv->context.ss_port_cap, XUSB_PADCTL_SS_PORT_CAP);  in tegra186_xusb_padctl_restore()
1462 	padctl_writel(padctl, priv->context.vbus_id, USB2_VBUS_ID);  in tegra186_xusb_padctl_restore()
1465 static int tegra186_xusb_padctl_suspend_noirq(struct tegra_xusb_padctl *padctl)  in tegra186_xusb_padctl_suspend_noirq()  argument
1467 	tegra186_xusb_padctl_save(padctl);  in tegra186_xusb_padctl_suspend_noirq()
1472 static int tegra186_xusb_padctl_resume_noirq(struct tegra_xusb_padctl *padctl)  in tegra186_xusb_padctl_resume_noirq()  argument
1474 	tegra186_xusb_padctl_restore(padctl);  in tegra186_xusb_padctl_resume_noirq()
1479 static void tegra186_xusb_padctl_remove(struct tegra_xusb_padctl *padctl)  in tegra186_xusb_padctl_remove()  argument
1493 	"avdd-pll-erefeut",
1494 	"avdd-usb",
1495 	"vclamp-usb",
1496 	"vddio-hsic",
1500 	TEGRA186_LANE("usb2-0", 0,  0, 0, usb2),
1501 	TEGRA186_LANE("usb2-1", 0,  0, 0, usb2),
1502 	TEGRA186_LANE("usb2-2", 0,  0, 0, usb2),
1513 	TEGRA186_LANE("usb3-0", 0,  0, 0, usb3),
1514 	TEGRA186_LANE("usb3-1", 0,  0, 0, usb3),
1515 	TEGRA186_LANE("usb3-2", 0,  0, 0, usb3),
1561 	"avdd-usb",
1562 	"vclamp-usb",
1566 	TEGRA186_LANE("usb2-0", 0,  0, 0, usb2),
1567 	TEGRA186_LANE("usb2-1", 0,  0, 0, usb2),
1568 	TEGRA186_LANE("usb2-2", 0,  0, 0, usb2),
1569 	TEGRA186_LANE("usb2-3", 0,  0, 0, usb2),
1580 	TEGRA186_LANE("usb3-0", 0,  0, 0, usb3),
1581 	TEGRA186_LANE("usb3-1", 0,  0, 0, usb3),
1582 	TEGRA186_LANE("usb3-2", 0,  0, 0, usb3),
1583 	TEGRA186_LANE("usb3-3", 0,  0, 0, usb3),
1620 MODULE_DESCRIPTION("NVIDIA Tegra186 XUSB Pad Controller driver");