387 static inline u8 inno_read(struct inno_hdmi_phy *inno, u32 reg)  in inno_read()  function
429 	intr_stat1 = inno_read(inno, 0x04);  in inno_hdmi_phy_rk3328_hardirq()
430 	intr_stat2 = inno_read(inno, 0x06);  in inno_hdmi_phy_rk3328_hardirq()
431 	intr_stat3 = inno_read(inno, 0x08);  in inno_hdmi_phy_rk3328_hardirq()
545 	status = inno_read(inno, 0xe0) & RK3228_PRE_PLL_POWER_DOWN;  in inno_hdmi_phy_rk3228_clk_is_prepared()
574 	nd = inno_read(inno, 0xe2) & RK3228_PRE_PLL_PRE_DIV_MASK;  in inno_hdmi_phy_rk3228_clk_recalc_rate()
575 	nf = (inno_read(inno, 0xe2) & RK3228_PRE_PLL_FB_DIV_8_MASK) << 1;  in inno_hdmi_phy_rk3228_clk_recalc_rate()
576 	nf |= inno_read(inno, 0xe3);  in inno_hdmi_phy_rk3228_clk_recalc_rate()
579 	if (inno_read(inno, 0xe2) & RK3228_PCLK_VCO_DIV_5_MASK) {  in inno_hdmi_phy_rk3228_clk_recalc_rate()
582 		no_a = inno_read(inno, 0xe4) & RK3228_PRE_PLL_PCLK_DIV_A_MASK;  in inno_hdmi_phy_rk3228_clk_recalc_rate()
585 		no_b = inno_read(inno, 0xe4) & RK3228_PRE_PLL_PCLK_DIV_B_MASK;  in inno_hdmi_phy_rk3228_clk_recalc_rate()
588 		no_d = inno_read(inno, 0xe5) & RK3228_PRE_PLL_PCLK_DIV_D_MASK;  in inno_hdmi_phy_rk3228_clk_recalc_rate()
691 	status = inno_read(inno, 0xa0) & RK3328_PRE_PLL_POWER_DOWN;  in inno_hdmi_phy_rk3328_clk_is_prepared()
721 	nd = inno_read(inno, 0xa1) & RK3328_PRE_PLL_PRE_DIV_MASK;  in inno_hdmi_phy_rk3328_clk_recalc_rate()
722 	nf = ((inno_read(inno, 0xa2) & RK3328_PRE_PLL_FB_DIV_11_8_MASK) << 8);  in inno_hdmi_phy_rk3328_clk_recalc_rate()
723 	nf |= inno_read(inno, 0xa3);  in inno_hdmi_phy_rk3328_clk_recalc_rate()
726 	if (!(inno_read(inno, 0xa2) & RK3328_PRE_PLL_FRAC_DIV_DISABLE)) {  in inno_hdmi_phy_rk3328_clk_recalc_rate()
727 		frac = inno_read(inno, 0xd3) |  in inno_hdmi_phy_rk3328_clk_recalc_rate()
728 		       (inno_read(inno, 0xd2) << 8) |  in inno_hdmi_phy_rk3328_clk_recalc_rate()
729 		       (inno_read(inno, 0xd1) << 16);  in inno_hdmi_phy_rk3328_clk_recalc_rate()
733 	if (inno_read(inno, 0xa0) & RK3328_PCLK_VCO_DIV_5_MASK) {  in inno_hdmi_phy_rk3328_clk_recalc_rate()
736 		no_a = inno_read(inno, 0xa5) & RK3328_PRE_PLL_PCLK_DIV_A_MASK;  in inno_hdmi_phy_rk3328_clk_recalc_rate()
737 		no_b = inno_read(inno, 0xa5) & RK3328_PRE_PLL_PCLK_DIV_B_MASK;  in inno_hdmi_phy_rk3328_clk_recalc_rate()
740 		no_c = inno_read(inno, 0xa6) & RK3328_PRE_PLL_PCLK_DIV_C_MASK;  in inno_hdmi_phy_rk3328_clk_recalc_rate()
743 		no_d = inno_read(inno, 0xa6) & RK3328_PRE_PLL_PCLK_DIV_D_MASK;  in inno_hdmi_phy_rk3328_clk_recalc_rate()