358 	struct mtk_phy_instance *instance)  in hs_slew_rate_calibrate()  argument
360 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in hs_slew_rate_calibrate()
372 	if (instance->eye_src)  in hs_slew_rate_calibrate()
391 		tmp |= P2F_RG_MONCLK_SEL_VAL(instance->index >> 1);  in hs_slew_rate_calibrate()
426 		instance->index, fm_out, calibration_val,  in hs_slew_rate_calibrate()
442 	struct mtk_phy_instance *instance)  in u3_phy_instance_init()  argument
444 	struct u3phy_banks *u3_banks = &instance->u3_banks;  in u3_phy_instance_init()
488 	dev_dbg(tphy->dev, "%s(%d)\n", __func__, instance->index);  in u3_phy_instance_init()
492 	struct mtk_phy_instance *instance)  in u2_phy_pll_26m_set()  argument
494 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in u2_phy_pll_26m_set()
519 	struct mtk_phy_instance *instance)  in u2_phy_instance_init()  argument
521 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in u2_phy_instance_init()
523 	u32 index = instance->index;  in u2_phy_instance_init()
578 	u2_phy_pll_26m_set(tphy, instance);  in u2_phy_instance_init()
584 	struct mtk_phy_instance *instance)  in u2_phy_instance_power_on()  argument
586 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in u2_phy_instance_power_on()
588 	u32 index = instance->index;  in u2_phy_instance_power_on()
618 	struct mtk_phy_instance *instance)  in u2_phy_instance_power_off()  argument
620 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in u2_phy_instance_power_off()
622 	u32 index = instance->index;  in u2_phy_instance_power_off()
653 	struct mtk_phy_instance *instance)  in u2_phy_instance_exit()  argument
655 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in u2_phy_instance_exit()
657 	u32 index = instance->index;  in u2_phy_instance_exit()
672 				     struct mtk_phy_instance *instance,  in u2_phy_instance_set_mode()  argument
675 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in u2_phy_instance_set_mode()
697 	struct mtk_phy_instance *instance)  in pcie_phy_instance_init()  argument
699 	struct u3phy_banks *u3_banks = &instance->u3_banks;  in pcie_phy_instance_init()
766 	dev_dbg(tphy->dev, "%s(%d)\n", __func__, instance->index);  in pcie_phy_instance_init()
770 	struct mtk_phy_instance *instance)  in pcie_phy_instance_power_on()  argument
772 	struct u3phy_banks *bank = &instance->u3_banks;  in pcie_phy_instance_power_on()
785 	struct mtk_phy_instance *instance)  in pcie_phy_instance_power_off()  argument
788 	struct u3phy_banks *bank = &instance->u3_banks;  in pcie_phy_instance_power_off()
801 	struct mtk_phy_instance *instance)  in sata_phy_instance_init()  argument
803 	struct u3phy_banks *u3_banks = &instance->u3_banks;  in sata_phy_instance_init()
855 	dev_dbg(tphy->dev, "%s(%d)\n", __func__, instance->index);  in sata_phy_instance_init()
859 			      struct mtk_phy_instance *instance)  in phy_v1_banks_init()  argument
861 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in phy_v1_banks_init()
862 	struct u3phy_banks *u3_banks = &instance->u3_banks;  in phy_v1_banks_init()
864 	switch (instance->type) {  in phy_v1_banks_init()
868 		u2_banks->com = instance->port_base + SSUSB_SIFSLV_V1_U2PHY_COM;  in phy_v1_banks_init()
874 		u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V1_U3PHYD;  in phy_v1_banks_init()
875 		u3_banks->phya = instance->port_base + SSUSB_SIFSLV_V1_U3PHYA;  in phy_v1_banks_init()
878 		u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V1_U3PHYD;  in phy_v1_banks_init()
887 			      struct mtk_phy_instance *instance)  in phy_v2_banks_init()  argument
889 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in phy_v2_banks_init()
890 	struct u3phy_banks *u3_banks = &instance->u3_banks;  in phy_v2_banks_init()
892 	switch (instance->type) {  in phy_v2_banks_init()
894 		u2_banks->misc = instance->port_base + SSUSB_SIFSLV_V2_MISC;  in phy_v2_banks_init()
895 		u2_banks->fmreg = instance->port_base + SSUSB_SIFSLV_V2_U2FREQ;  in phy_v2_banks_init()
896 		u2_banks->com = instance->port_base + SSUSB_SIFSLV_V2_U2PHY_COM;  in phy_v2_banks_init()
900 		u3_banks->spllc = instance->port_base + SSUSB_SIFSLV_V2_SPLLC;  in phy_v2_banks_init()
901 		u3_banks->chip = instance->port_base + SSUSB_SIFSLV_V2_CHIP;  in phy_v2_banks_init()
902 		u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V2_U3PHYD;  in phy_v2_banks_init()
903 		u3_banks->phya = instance->port_base + SSUSB_SIFSLV_V2_U3PHYA;  in phy_v2_banks_init()
912 				struct mtk_phy_instance *instance)  in phy_parse_property()  argument
914 	struct device *dev = &instance->phy->dev;  in phy_parse_property()
916 	if (instance->type != PHY_TYPE_USB2)  in phy_parse_property()
919 	instance->bc12_en = device_property_read_bool(dev, "mediatek,bc12");  in phy_parse_property()
921 				 &instance->eye_src);  in phy_parse_property()
923 				 &instance->eye_vrt);  in phy_parse_property()
925 				 &instance->eye_term);  in phy_parse_property()
927 				 &instance->intr);  in phy_parse_property()
929 				 &instance->discth);  in phy_parse_property()
931 		instance->bc12_en, instance->eye_src,  in phy_parse_property()
932 		instance->eye_vrt, instance->eye_term,  in phy_parse_property()
933 		instance->intr, instance->discth);  in phy_parse_property()
937 			     struct mtk_phy_instance *instance)  in u2_phy_props_set()  argument
939 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in u2_phy_props_set()
943 	if (instance->bc12_en) {  in u2_phy_props_set()
949 	if (tphy->pdata->version < MTK_PHY_V3 && instance->eye_src) {  in u2_phy_props_set()
952 		tmp |= PA5_RG_U2_HSTX_SRCTRL_VAL(instance->eye_src);  in u2_phy_props_set()
956 	if (instance->eye_vrt) {  in u2_phy_props_set()
959 		tmp |= PA1_RG_VRT_SEL_VAL(instance->eye_vrt);  in u2_phy_props_set()
963 	if (instance->eye_term) {  in u2_phy_props_set()
966 		tmp |= PA1_RG_TERM_SEL_VAL(instance->eye_term);  in u2_phy_props_set()
970 	if (instance->intr) {  in u2_phy_props_set()
973 		tmp |= PA1_RG_INTR_CAL_VAL(instance->intr);  in u2_phy_props_set()
977 	if (instance->discth) {  in u2_phy_props_set()
980 		tmp |= PA6_RG_U2_DISCTH_VAL(instance->discth);  in u2_phy_props_set()
986 static int phy_type_syscon_get(struct mtk_phy_instance *instance,  in phy_type_syscon_get()  argument
1001 	instance->type_sw_reg = args.args[0];  in phy_type_syscon_get()
1002 	instance->type_sw_index = args.args[1] & 0x3; /* <=3 */  in phy_type_syscon_get()
1003 	instance->type_sw = syscon_node_to_regmap(args.np);  in phy_type_syscon_get()
1005 	dev_info(&instance->phy->dev, "type_sw - reg %#x, index %d\n",  in phy_type_syscon_get()
1006 		 instance->type_sw_reg, instance->type_sw_index);  in phy_type_syscon_get()
1008 	return PTR_ERR_OR_ZERO(instance->type_sw);  in phy_type_syscon_get()
1011 static int phy_type_set(struct mtk_phy_instance *instance)  in phy_type_set()  argument
1016 	if (!instance->type_sw)  in phy_type_set()
1019 	switch (instance->type) {  in phy_type_set()
1037 	mask = RG_PHY_SW_TYPE << (instance->type_sw_index * BITS_PER_BYTE);  in phy_type_set()
1038 	regmap_update_bits(instance->type_sw, instance->type_sw_reg, mask, type);  in phy_type_set()
1045 	struct mtk_phy_instance *instance = phy_get_drvdata(phy);  in mtk_phy_init()  local
1049 	ret = clk_bulk_prepare_enable(TPHY_CLKS_CNT, instance->clks);  in mtk_phy_init()
1053 	switch (instance->type) {  in mtk_phy_init()
1055 		u2_phy_instance_init(tphy, instance);  in mtk_phy_init()
1056 		u2_phy_props_set(tphy, instance);  in mtk_phy_init()
1059 		u3_phy_instance_init(tphy, instance);  in mtk_phy_init()
1062 		pcie_phy_instance_init(tphy, instance);  in mtk_phy_init()
1065 		sata_phy_instance_init(tphy, instance);  in mtk_phy_init()
1072 		clk_bulk_disable_unprepare(TPHY_CLKS_CNT, instance->clks);  in mtk_phy_init()
1081 	struct mtk_phy_instance *instance = phy_get_drvdata(phy);  in mtk_phy_power_on()  local
1084 	if (instance->type == PHY_TYPE_USB2) {  in mtk_phy_power_on()
1085 		u2_phy_instance_power_on(tphy, instance);  in mtk_phy_power_on()
1086 		hs_slew_rate_calibrate(tphy, instance);  in mtk_phy_power_on()
1087 	} else if (instance->type == PHY_TYPE_PCIE) {  in mtk_phy_power_on()
1088 		pcie_phy_instance_power_on(tphy, instance);  in mtk_phy_power_on()
1096 	struct mtk_phy_instance *instance = phy_get_drvdata(phy);  in mtk_phy_power_off()  local
1099 	if (instance->type == PHY_TYPE_USB2)  in mtk_phy_power_off()
1100 		u2_phy_instance_power_off(tphy, instance);  in mtk_phy_power_off()
1101 	else if (instance->type == PHY_TYPE_PCIE)  in mtk_phy_power_off()
1102 		pcie_phy_instance_power_off(tphy, instance);  in mtk_phy_power_off()
1109 	struct mtk_phy_instance *instance = phy_get_drvdata(phy);  in mtk_phy_exit()  local
1112 	if (instance->type == PHY_TYPE_USB2)  in mtk_phy_exit()
1113 		u2_phy_instance_exit(tphy, instance);  in mtk_phy_exit()
1115 	clk_bulk_disable_unprepare(TPHY_CLKS_CNT, instance->clks);  in mtk_phy_exit()
1121 	struct mtk_phy_instance *instance = phy_get_drvdata(phy);  in mtk_phy_set_mode()  local
1124 	if (instance->type == PHY_TYPE_USB2)  in mtk_phy_set_mode()
1125 		u2_phy_instance_set_mode(tphy, instance, mode);  in mtk_phy_set_mode()
1134 	struct mtk_phy_instance *instance = NULL;  in mtk_phy_xlate()  local
1145 			instance = tphy->phys[index];  in mtk_phy_xlate()
1149 	if (!instance) {  in mtk_phy_xlate()
1154 	instance->type = args->args[0];  in mtk_phy_xlate()
1155 	if (!(instance->type == PHY_TYPE_USB2 ||  in mtk_phy_xlate()
1156 	      instance->type == PHY_TYPE_USB3 ||  in mtk_phy_xlate()
1157 	      instance->type == PHY_TYPE_PCIE ||  in mtk_phy_xlate()
1158 	      instance->type == PHY_TYPE_SATA ||  in mtk_phy_xlate()
1159 	      instance->type == PHY_TYPE_SGMII)) {  in mtk_phy_xlate()
1160 		dev_err(dev, "unsupported device type: %d\n", instance->type);  in mtk_phy_xlate()
1166 		phy_v1_banks_init(tphy, instance);  in mtk_phy_xlate()
1170 		phy_v2_banks_init(tphy, instance);  in mtk_phy_xlate()
1177 	phy_parse_property(tphy, instance);  in mtk_phy_xlate()
1178 	phy_type_set(instance);  in mtk_phy_xlate()
1180 	return instance->phy;  in mtk_phy_xlate()
1279 		struct mtk_phy_instance *instance;  in mtk_tphy_probe()  local
1284 		instance = devm_kzalloc(dev, sizeof(*instance), GFP_KERNEL);  in mtk_tphy_probe()
1285 		if (!instance) {  in mtk_tphy_probe()
1290 		tphy->phys[port] = instance;  in mtk_tphy_probe()
1307 		instance->port_base = devm_ioremap_resource(subdev, &res);  in mtk_tphy_probe()
1308 		if (IS_ERR(instance->port_base)) {  in mtk_tphy_probe()
1309 			retval = PTR_ERR(instance->port_base);  in mtk_tphy_probe()
1313 		instance->phy = phy;  in mtk_tphy_probe()
1314 		instance->index = port;  in mtk_tphy_probe()
1315 		phy_set_drvdata(phy, instance);  in mtk_tphy_probe()
1318 		clks = instance->clks;  in mtk_tphy_probe()
1325 		retval = phy_type_syscon_get(instance, child_np);  in mtk_tphy_probe()