1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "phy-mtk-mipi-dsi.h"
16 	u32 temp = readl(mipi_tx->regs + offset);  in mtk_mipi_tx_clear_bits()
18 	writel(temp & ~bits, mipi_tx->regs + offset);  in mtk_mipi_tx_clear_bits()
24 	u32 temp = readl(mipi_tx->regs + offset);  in mtk_mipi_tx_set_bits()
26 	writel(temp | bits, mipi_tx->regs + offset);  in mtk_mipi_tx_set_bits()
32 	u32 temp = readl(mipi_tx->regs + offset);  in mtk_mipi_tx_update_bits()
34 	writel((temp & ~mask) | (data & mask), mipi_tx->regs + offset);  in mtk_mipi_tx_update_bits()
42 	dev_dbg(mipi_tx->dev, "set rate: %lu Hz\n", rate);  in mtk_mipi_tx_pll_set_rate()
44 	mipi_tx->data_rate = rate;  in mtk_mipi_tx_pll_set_rate()
54 	return mipi_tx->data_rate;  in mtk_mipi_tx_pll_recalc_rate()
63 	ret = clk_prepare_enable(mipi_tx->pll);  in mtk_mipi_tx_power_on()
68 	mipi_tx->driver_data->mipi_tx_enable_signal(phy);  in mtk_mipi_tx_power_on()
77 	mipi_tx->driver_data->mipi_tx_disable_signal(phy);  in mtk_mipi_tx_power_off()
80 	clk_disable_unprepare(mipi_tx->pll);  in mtk_mipi_tx_power_off()
97 	cell = nvmem_cell_get(mipi_tx->dev, "calibration-data");  in mtk_mipi_tx_get_calibration_datal()
99 		dev_info(mipi_tx->dev, "can't get nvmem_cell_get, ignore it\n");  in mtk_mipi_tx_get_calibration_datal()
106 		dev_info(mipi_tx->dev, "can't get data, ignore it\n");  in mtk_mipi_tx_get_calibration_datal()
111 		dev_info(mipi_tx->dev, "invalid calibration data\n");  in mtk_mipi_tx_get_calibration_datal()
116 	mipi_tx->rt_code[0] = ((buf[0] >> 6 & 0x1f) << 5) |  in mtk_mipi_tx_get_calibration_datal()
118 	mipi_tx->rt_code[1] = ((buf[1] >> 27 & 0x1f) << 5) |  in mtk_mipi_tx_get_calibration_datal()
120 	mipi_tx->rt_code[2] = ((buf[1] >> 17 & 0x1f) << 5) |  in mtk_mipi_tx_get_calibration_datal()
122 	mipi_tx->rt_code[3] = ((buf[1] >> 7 & 0x1f) << 5) |  in mtk_mipi_tx_get_calibration_datal()
124 	mipi_tx->rt_code[4] = ((buf[2] >> 27 & 0x1f) << 5) |  in mtk_mipi_tx_get_calibration_datal()
131 	struct device *dev = &pdev->dev;  in mtk_mipi_tx_probe()
146 		return -ENOMEM;  in mtk_mipi_tx_probe()
148 	mipi_tx->driver_data = of_device_get_match_data(dev);  in mtk_mipi_tx_probe()
150 	mipi_tx->regs = devm_platform_ioremap_resource(pdev, 0);  in mtk_mipi_tx_probe()
151 	if (IS_ERR(mipi_tx->regs))  in mtk_mipi_tx_probe()
152 		return PTR_ERR(mipi_tx->regs);  in mtk_mipi_tx_probe()
161 	ret = of_property_read_u32(dev->of_node, "drive-strength-microamp",  in mtk_mipi_tx_probe()
162 				   &mipi_tx->mipitx_drive);  in mtk_mipi_tx_probe()
163 	/* If can't get the "mipi_tx->mipitx_drive", set it default 0x8 */  in mtk_mipi_tx_probe()
165 		mipi_tx->mipitx_drive = 4600;  in mtk_mipi_tx_probe()
168 	if (mipi_tx->mipitx_drive > 6000 || mipi_tx->mipitx_drive < 3000) {  in mtk_mipi_tx_probe()
169 		dev_warn(dev, "drive-strength-microamp is invalid %d, not in 3000 ~ 6000\n",  in mtk_mipi_tx_probe()
170 			 mipi_tx->mipitx_drive);  in mtk_mipi_tx_probe()
171 		mipi_tx->mipitx_drive = clamp_val(mipi_tx->mipitx_drive, 3000,  in mtk_mipi_tx_probe()
177 	ret = of_property_read_string(dev->of_node, "clock-output-names",  in mtk_mipi_tx_probe()
180 		dev_err(dev, "Failed to read clock-output-names: %d\n", ret);  in mtk_mipi_tx_probe()
184 	clk_init.ops = mipi_tx->driver_data->mipi_tx_clk_ops;  in mtk_mipi_tx_probe()
186 	mipi_tx->pll_hw.init = &clk_init;  in mtk_mipi_tx_probe()
187 	mipi_tx->pll = devm_clk_register(dev, &mipi_tx->pll_hw);  in mtk_mipi_tx_probe()
188 	if (IS_ERR(mipi_tx->pll)) {  in mtk_mipi_tx_probe()
189 		ret = PTR_ERR(mipi_tx->pll);  in mtk_mipi_tx_probe()
197 		dev_err(dev, "Failed to create MIPI D-PHY: %d\n", ret);  in mtk_mipi_tx_probe()
206 	mipi_tx->dev = dev;  in mtk_mipi_tx_probe()
210 	return of_clk_add_provider(dev->of_node, of_clk_src_simple_get,  in mtk_mipi_tx_probe()
211 				   mipi_tx->pll);  in mtk_mipi_tx_probe()
216 	of_clk_del_provider(pdev->dev.of_node);  in mtk_mipi_tx_remove()
221 	{ .compatible = "mediatek,mt2701-mipi-tx",
223 	{ .compatible = "mediatek,mt8173-mipi-tx",
225 	{ .compatible = "mediatek,mt8183-mipi-tx",
235 		.name = "mediatek-mipi-tx",