Lines Matching full:dtc

86 /* The DTC node is where the magic happens */
90 /* DTC counters are paired in 64-bit registers on a 16-byte stride. Yuck */
116 * Even in the worst case a DTC counter can't wrap in fewer than 2^42 cycles,
202 int dtc; member
243 struct arm_cmn_dtc *dtc; member
657 writel_relaxed(0, cmn->dtc[0].base + CMN_DT_PMCR); in arm_cmn_set_state()
666 cmn->dtc[0].base + CMN_DT_PMCR); in arm_cmn_clear_state()
698 static u64 arm_cmn_read_cc(struct arm_cmn_dtc *dtc) in arm_cmn_read_cc() argument
700 u64 val = readq_relaxed(dtc->base + CMN_DT_PMCCNTR); in arm_cmn_read_cc()
702 writeq_relaxed(CMN_CC_INIT, dtc->base + CMN_DT_PMCCNTR); in arm_cmn_read_cc()
706 static u32 arm_cmn_read_counter(struct arm_cmn_dtc *dtc, int idx) in arm_cmn_read_counter() argument
710 val = readl_relaxed(dtc->base + pmevcnt); in arm_cmn_read_counter()
711 writel_relaxed(CMN_COUNTER_INIT, dtc->base + pmevcnt); in arm_cmn_read_counter()
723 writel_relaxed(CMN_COUNTER_INIT, cmn->dtc[i].base + pmevcnt); in arm_cmn_init_counter()
724 cmn->dtc[i].counters[hw->dtc_idx] = event; in arm_cmn_init_counter()
741 delta = arm_cmn_read_cc(cmn->dtc + i); in arm_cmn_event_read()
752 new = arm_cmn_read_counter(cmn->dtc + i, hw->dtc_idx); in arm_cmn_event_read()
769 writeq_relaxed(CMN_CC_INIT, cmn->dtc[i].base + CMN_DT_PMCCNTR); in arm_cmn_event_start()
770 cmn->dtc[i].cc_active = true; in arm_cmn_event_start()
798 cmn->dtc[i].cc_active = false; in arm_cmn_event_stop()
939 /* DTC events (i.e. cycles) already have everything they need */ in arm_cmn_event_init()
976 * By assuming events count in all DTC domains, we cunningly avoid in arm_cmn_event_init()
1006 cmn->dtc[i].counters[hw->dtc_idx] = NULL; in arm_cmn_event_clear()
1013 struct arm_cmn_dtc *dtc = &cmn->dtc[0]; in arm_cmn_event_add() local
1020 while (cmn->dtc[i].cycles) in arm_cmn_event_add()
1024 cmn->dtc[i].cycles = event; in arm_cmn_event_add()
1035 while (dtc->counters[dtc_idx]) in arm_cmn_event_add()
1063 CMN_EVENT_WP_COMBINE(dtc->counters[tmp])) in arm_cmn_event_add()
1123 cmn->dtc[__ffs(hw->dtcs_used)].cycles = NULL; in arm_cmn_event_del()
1165 irq_set_affinity(cmn->dtc[i].irq, cpumask_of(target)); in arm_cmn_pmu_offline_cpu()
1172 struct arm_cmn_dtc *dtc = dev_id; in arm_cmn_handle_irq() local
1176 u32 status = readl_relaxed(dtc->base + CMN_DT_PMOVSR); in arm_cmn_handle_irq()
1183 if (WARN_ON(!dtc->counters[i])) in arm_cmn_handle_irq()
1185 delta = (u64)arm_cmn_read_counter(dtc, i) << 16; in arm_cmn_handle_irq()
1186 local64_add(delta, &dtc->counters[i]->count); in arm_cmn_handle_irq()
1192 if (dtc->cc_active && !WARN_ON(!dtc->cycles)) { in arm_cmn_handle_irq()
1193 delta = arm_cmn_read_cc(dtc); in arm_cmn_handle_irq()
1194 local64_add(delta, &dtc->cycles->count); in arm_cmn_handle_irq()
1198 writel_relaxed(status, dtc->base + CMN_DT_PMOVSR_CLR); in arm_cmn_handle_irq()
1200 if (!dtc->irq_friend) in arm_cmn_handle_irq()
1202 dtc += dtc->irq_friend; in arm_cmn_handle_irq()
1212 irq = cmn->dtc[i].irq; in arm_cmn_init_irqs()
1214 if (cmn->dtc[j].irq == irq) { in arm_cmn_init_irqs()
1215 cmn->dtc[j].irq_friend = i - j; in arm_cmn_init_irqs()
1221 dev_name(cmn->dev), &cmn->dtc[i]); in arm_cmn_init_irqs()
1244 xp->dtc = -1; in arm_cmn_init_dtm()
1249 struct arm_cmn_dtc *dtc = cmn->dtc + idx; in arm_cmn_init_dtc() local
1252 dtc->base = dn->pmu_base - CMN_PMU_OFFSET; in arm_cmn_init_dtc()
1253 dtc->irq = platform_get_irq(to_platform_device(cmn->dev), idx); in arm_cmn_init_dtc()
1254 if (dtc->irq < 0) in arm_cmn_init_dtc()
1255 return dtc->irq; in arm_cmn_init_dtc()
1257 writel_relaxed(0, dtc->base + CMN_DT_PMCR); in arm_cmn_init_dtc()
1258 writel_relaxed(0x1ff, dtc->base + CMN_DT_PMOVSR_CLR); in arm_cmn_init_dtc()
1259 writel_relaxed(CMN_DT_PMCR_OVFL_INTR_EN, dtc->base + CMN_DT_PMCR); in arm_cmn_init_dtc()
1261 /* We do at least know that a DTC's XP must be in that DTC's domain */ in arm_cmn_init_dtc()
1263 xp->dtc = idx; in arm_cmn_init_dtc()
1284 cmn->dtc = devm_kcalloc(cmn->dev, cmn->num_dtcs, sizeof(cmn->dtc[0]), GFP_KERNEL); in arm_cmn_init_dtcs()
1285 if (!cmn->dtc) in arm_cmn_init_dtcs()
1296 dn->dtc = 0; in arm_cmn_init_dtcs()
1306 writel_relaxed(CMN_DT_DTC_CTL_DT_EN, cmn->dtc[0].base + CMN_DT_DTC_CTL); in arm_cmn_init_dtcs()
1572 writel_relaxed(0, cmn->dtc[0].base + CMN_DT_DTC_CTL); in arm_cmn_remove()