Lines Matching +full:pcie +full:- +full:rcar +full:- +full:gen2
1 // SPDX-License-Identifier: GPL-2.0
3 * PCIe driver for Renesas R-Car SoCs
4 * Copyright (C) 2014-2020 Renesas Electronics Europe Ltd
7 * arch/sh/drivers/pci/pcie-sh7786.c
8 * arch/sh/drivers/pci/ops-sh7786.c
9 * Copyright (C) 2009 - 2011 Paul Mundt
16 #include <linux/clk-provider.h>
35 #include "pcie-rcar.h"
48 * Here we keep a static copy of the remapped PCIe controller address.
50 * PCIe controller, to provide quick access to the PCIe controller in
61 /* Structure representing the PCIe interface */
63 struct rcar_pcie pcie; member
75 static u32 rcar_read_conf(struct rcar_pcie *pcie, int where) in rcar_read_conf() argument
78 u32 val = rcar_pci_read_reg(pcie, where & ~3); in rcar_read_conf()
88 struct rcar_pcie *pcie = &host->pcie; in rcar_pcie_config_access() local
97 * While each channel has its own memory-mapped extended config in rcar_pcie_config_access()
105 * the same channel <-> device access works for any PCI_SLOT() in rcar_pcie_config_access()
107 * space to devfn 0 in order to enable self-enumeration. In this in rcar_pcie_config_access()
116 *data = rcar_pci_read_reg(pcie, PCICONF(index)); in rcar_pcie_config_access()
118 rcar_pci_write_reg(pcie, *data, PCICONF(index)); in rcar_pcie_config_access()
124 rcar_pci_write_reg(pcie, rcar_pci_read_reg(pcie, PCIEERRFR), PCIEERRFR); in rcar_pcie_config_access()
127 rcar_pci_write_reg(pcie, PCIE_CONF_BUS(bus->number) | in rcar_pcie_config_access()
131 if (pci_is_root_bus(bus->parent)) in rcar_pcie_config_access()
132 rcar_pci_write_reg(pcie, CONFIG_SEND_ENABLE | TYPE0, PCIECCTLR); in rcar_pcie_config_access()
134 rcar_pci_write_reg(pcie, CONFIG_SEND_ENABLE | TYPE1, PCIECCTLR); in rcar_pcie_config_access()
137 if (rcar_pci_read_reg(pcie, PCIEERRFR) & UNSUPPORTED_REQUEST) in rcar_pcie_config_access()
141 if (rcar_read_conf(pcie, RCONF(PCI_STATUS)) & in rcar_pcie_config_access()
146 *data = rcar_pci_read_reg(pcie, PCIECDR); in rcar_pcie_config_access()
148 rcar_pci_write_reg(pcie, *data, PCIECDR); in rcar_pcie_config_access()
151 rcar_pci_write_reg(pcie, 0, PCIECCTLR); in rcar_pcie_config_access()
159 struct rcar_pcie_host *host = bus->sysdata; in rcar_pcie_read_conf()
174 dev_dbg(&bus->dev, "pcie-config-read: bus=%3d devfn=0x%04x where=0x%04x size=%d val=0x%08x\n", in rcar_pcie_read_conf()
175 bus->number, devfn, where, size, *val); in rcar_pcie_read_conf()
184 struct rcar_pcie_host *host = bus->sysdata; in rcar_pcie_write_conf()
194 dev_dbg(&bus->dev, "pcie-config-write: bus=%3d devfn=0x%04x where=0x%04x size=%d val=0x%08x\n", in rcar_pcie_write_conf()
195 bus->number, devfn, where, size, val); in rcar_pcie_write_conf()
219 static void rcar_pcie_force_speedup(struct rcar_pcie *pcie) in rcar_pcie_force_speedup() argument
221 struct device *dev = pcie->dev; in rcar_pcie_force_speedup()
225 if ((rcar_pci_read_reg(pcie, MACS2R) & LINK_SPEED) != LINK_SPEED_5_0GTS) in rcar_pcie_force_speedup()
228 if (rcar_pci_read_reg(pcie, MACCTLR) & SPEED_CHANGE) { in rcar_pcie_force_speedup()
233 macsr = rcar_pci_read_reg(pcie, MACSR); in rcar_pcie_force_speedup()
238 rcar_rmw32(pcie, EXPCAP(12), PCI_EXP_LNKSTA_CLS, in rcar_pcie_force_speedup()
242 rcar_rmw32(pcie, MACCGSPSETR, SPCNGRSN, 0); in rcar_pcie_force_speedup()
246 rcar_pci_write_reg(pcie, macsr, MACSR); in rcar_pcie_force_speedup()
249 rcar_rmw32(pcie, MACCTLR, SPEED_CHANGE, SPEED_CHANGE); in rcar_pcie_force_speedup()
251 while (timeout--) { in rcar_pcie_force_speedup()
252 macsr = rcar_pci_read_reg(pcie, MACSR); in rcar_pcie_force_speedup()
255 rcar_pci_write_reg(pcie, macsr, MACSR); in rcar_pcie_force_speedup()
275 struct rcar_pcie *pcie = &host->pcie; in rcar_pcie_hw_enable() local
282 rcar_pcie_force_speedup(pcie); in rcar_pcie_hw_enable()
285 resource_list_for_each_entry(win, &bridge->windows) { in rcar_pcie_hw_enable()
286 struct resource *res = win->res; in rcar_pcie_hw_enable()
288 if (!res->flags) in rcar_pcie_hw_enable()
294 rcar_pcie_set_outbound(pcie, i, win); in rcar_pcie_hw_enable()
309 bridge->sysdata = host; in rcar_pcie_enable()
310 bridge->ops = &rcar_pcie_ops; in rcar_pcie_enable()
315 static int phy_wait_for_ack(struct rcar_pcie *pcie) in phy_wait_for_ack() argument
317 struct device *dev = pcie->dev; in phy_wait_for_ack()
320 while (timeout--) { in phy_wait_for_ack()
321 if (rcar_pci_read_reg(pcie, H1_PCIEPHYADRR) & PHY_ACK) in phy_wait_for_ack()
327 dev_err(dev, "Access to PCIe phy timed out\n"); in phy_wait_for_ack()
329 return -ETIMEDOUT; in phy_wait_for_ack()
332 static void phy_write_reg(struct rcar_pcie *pcie, in phy_write_reg() argument
344 rcar_pci_write_reg(pcie, data, H1_PCIEPHYDOUTR); in phy_write_reg()
345 rcar_pci_write_reg(pcie, phyaddr, H1_PCIEPHYADRR); in phy_write_reg()
348 phy_wait_for_ack(pcie); in phy_write_reg()
351 rcar_pci_write_reg(pcie, 0, H1_PCIEPHYDOUTR); in phy_write_reg()
352 rcar_pci_write_reg(pcie, 0, H1_PCIEPHYADRR); in phy_write_reg()
355 phy_wait_for_ack(pcie); in phy_write_reg()
358 static int rcar_pcie_hw_init(struct rcar_pcie *pcie) in rcar_pcie_hw_init() argument
363 rcar_pci_write_reg(pcie, 0, PCIETCTLR); in rcar_pcie_hw_init()
366 rcar_pci_write_reg(pcie, 1, PCIEMSR); in rcar_pcie_hw_init()
368 err = rcar_pcie_wait_for_phyrdy(pcie); in rcar_pcie_hw_init()
377 rcar_pci_write_reg(pcie, PCI_CLASS_BRIDGE_PCI << 16, IDSETR1); in rcar_pcie_hw_init()
383 rcar_rmw32(pcie, RCONF(PCI_SECONDARY_BUS), 0xff, 1); in rcar_pcie_hw_init()
384 rcar_rmw32(pcie, RCONF(PCI_SUBORDINATE_BUS), 0xff, 1); in rcar_pcie_hw_init()
387 rcar_rmw32(pcie, REXPCAP(0), 0xff, PCI_CAP_ID_EXP); in rcar_pcie_hw_init()
388 rcar_rmw32(pcie, REXPCAP(PCI_EXP_FLAGS), in rcar_pcie_hw_init()
390 rcar_rmw32(pcie, RCONF(PCI_HEADER_TYPE), 0x7f, in rcar_pcie_hw_init()
394 rcar_rmw32(pcie, REXPCAP(PCI_EXP_LNKCAP), PCI_EXP_LNKCAP_DLLLARC, in rcar_pcie_hw_init()
398 rcar_rmw32(pcie, REXPCAP(PCI_EXP_SLTCAP), PCI_EXP_SLTCAP_PSN, 0); in rcar_pcie_hw_init()
401 rcar_rmw32(pcie, TLCTLR + 1, 0x3f, 50); in rcar_pcie_hw_init()
404 rcar_rmw32(pcie, RVCCAP(0), 0xfff00000, 0); in rcar_pcie_hw_init()
408 rcar_pci_write_reg(pcie, 0x801f0000, PCIEMSITXR); in rcar_pcie_hw_init()
410 rcar_pci_write_reg(pcie, MACCTLR_INIT_VAL, MACCTLR); in rcar_pcie_hw_init()
412 /* Finish initialization - establish a PCI Express link */ in rcar_pcie_hw_init()
413 rcar_pci_write_reg(pcie, CFINIT, PCIETCTLR); in rcar_pcie_hw_init()
416 err = rcar_pcie_wait_for_dl(pcie); in rcar_pcie_hw_init()
421 rcar_rmw32(pcie, PCIEINTXR, 0, 0xF << 8); in rcar_pcie_hw_init()
430 struct rcar_pcie *pcie = &host->pcie; in rcar_pcie_phy_init_h1() local
433 phy_write_reg(pcie, 0, 0x42, 0x1, 0x0EC34191); in rcar_pcie_phy_init_h1()
434 phy_write_reg(pcie, 1, 0x42, 0x1, 0x0EC34180); in rcar_pcie_phy_init_h1()
435 phy_write_reg(pcie, 0, 0x43, 0x1, 0x00210188); in rcar_pcie_phy_init_h1()
436 phy_write_reg(pcie, 1, 0x43, 0x1, 0x00210188); in rcar_pcie_phy_init_h1()
437 phy_write_reg(pcie, 0, 0x44, 0x1, 0x015C0014); in rcar_pcie_phy_init_h1()
438 phy_write_reg(pcie, 1, 0x44, 0x1, 0x015C0014); in rcar_pcie_phy_init_h1()
439 phy_write_reg(pcie, 1, 0x4C, 0x1, 0x786174A0); in rcar_pcie_phy_init_h1()
440 phy_write_reg(pcie, 1, 0x4D, 0x1, 0x048000BB); in rcar_pcie_phy_init_h1()
441 phy_write_reg(pcie, 0, 0x51, 0x1, 0x079EC062); in rcar_pcie_phy_init_h1()
442 phy_write_reg(pcie, 0, 0x52, 0x1, 0x20000000); in rcar_pcie_phy_init_h1()
443 phy_write_reg(pcie, 1, 0x52, 0x1, 0x20000000); in rcar_pcie_phy_init_h1()
444 phy_write_reg(pcie, 1, 0x56, 0x1, 0x00003806); in rcar_pcie_phy_init_h1()
446 phy_write_reg(pcie, 0, 0x60, 0x1, 0x004B03A5); in rcar_pcie_phy_init_h1()
447 phy_write_reg(pcie, 0, 0x64, 0x1, 0x3F0F1F0F); in rcar_pcie_phy_init_h1()
448 phy_write_reg(pcie, 0, 0x66, 0x1, 0x00008000); in rcar_pcie_phy_init_h1()
455 struct rcar_pcie *pcie = &host->pcie; in rcar_pcie_phy_init_gen2() local
458 * These settings come from the R-Car Series, 2nd Generation User's in rcar_pcie_phy_init_gen2()
461 rcar_pci_write_reg(pcie, 0x000f0030, GEN2_PCIEPHYADDR); in rcar_pcie_phy_init_gen2()
462 rcar_pci_write_reg(pcie, 0x00381203, GEN2_PCIEPHYDATA); in rcar_pcie_phy_init_gen2()
463 rcar_pci_write_reg(pcie, 0x00000001, GEN2_PCIEPHYCTRL); in rcar_pcie_phy_init_gen2()
464 rcar_pci_write_reg(pcie, 0x00000006, GEN2_PCIEPHYCTRL); in rcar_pcie_phy_init_gen2()
466 rcar_pci_write_reg(pcie, 0x000f0054, GEN2_PCIEPHYADDR); in rcar_pcie_phy_init_gen2()
468 rcar_pci_write_reg(pcie, 0x13802007, GEN2_PCIEPHYDATA); in rcar_pcie_phy_init_gen2()
469 rcar_pci_write_reg(pcie, 0x00000001, GEN2_PCIEPHYCTRL); in rcar_pcie_phy_init_gen2()
470 rcar_pci_write_reg(pcie, 0x00000006, GEN2_PCIEPHYCTRL); in rcar_pcie_phy_init_gen2()
479 err = phy_init(host->phy); in rcar_pcie_phy_init_gen3()
483 err = phy_power_on(host->phy); in rcar_pcie_phy_init_gen3()
485 phy_exit(host->phy); in rcar_pcie_phy_init_gen3()
493 struct rcar_pcie *pcie = &host->pcie; in rcar_pcie_msi_irq() local
494 struct rcar_msi *msi = &host->msi; in rcar_pcie_msi_irq()
495 struct device *dev = pcie->dev; in rcar_pcie_msi_irq()
498 reg = rcar_pci_read_reg(pcie, PCIEMSIFR); in rcar_pcie_msi_irq()
500 /* MSI & INTx share an interrupt - we only handle MSI here */ in rcar_pcie_msi_irq()
508 ret = generic_handle_domain_irq(msi->domain->parent, index); in rcar_pcie_msi_irq()
512 rcar_pci_write_reg(pcie, BIT(index), PCIEMSIFR); in rcar_pcie_msi_irq()
516 reg = rcar_pci_read_reg(pcie, PCIEMSIFR); in rcar_pcie_msi_irq()
540 .name = "PCIe MSI",
549 struct rcar_pcie *pcie = &msi_to_host(msi)->pcie; in rcar_msi_irq_ack() local
552 rcar_pci_write_reg(pcie, BIT(d->hwirq), PCIEMSIFR); in rcar_msi_irq_ack()
558 struct rcar_pcie *pcie = &msi_to_host(msi)->pcie; in rcar_msi_irq_mask() local
562 spin_lock_irqsave(&msi->mask_lock, flags); in rcar_msi_irq_mask()
563 value = rcar_pci_read_reg(pcie, PCIEMSIIER); in rcar_msi_irq_mask()
564 value &= ~BIT(d->hwirq); in rcar_msi_irq_mask()
565 rcar_pci_write_reg(pcie, value, PCIEMSIIER); in rcar_msi_irq_mask()
566 spin_unlock_irqrestore(&msi->mask_lock, flags); in rcar_msi_irq_mask()
572 struct rcar_pcie *pcie = &msi_to_host(msi)->pcie; in rcar_msi_irq_unmask() local
576 spin_lock_irqsave(&msi->mask_lock, flags); in rcar_msi_irq_unmask()
577 value = rcar_pci_read_reg(pcie, PCIEMSIIER); in rcar_msi_irq_unmask()
578 value |= BIT(d->hwirq); in rcar_msi_irq_unmask()
579 rcar_pci_write_reg(pcie, value, PCIEMSIIER); in rcar_msi_irq_unmask()
580 spin_unlock_irqrestore(&msi->mask_lock, flags); in rcar_msi_irq_unmask()
585 return -EINVAL; in rcar_msi_set_affinity()
591 struct rcar_pcie *pcie = &msi_to_host(msi)->pcie; in rcar_compose_msi_msg() local
593 msg->address_lo = rcar_pci_read_reg(pcie, PCIEMSIALR) & ~MSIFE; in rcar_compose_msi_msg()
594 msg->address_hi = rcar_pci_read_reg(pcie, PCIEMSIAUR); in rcar_compose_msi_msg()
595 msg->data = data->hwirq; in rcar_compose_msi_msg()
599 .name = "Rcar MSI",
610 struct rcar_msi *msi = domain->host_data; in rcar_msi_domain_alloc()
614 mutex_lock(&msi->map_lock); in rcar_msi_domain_alloc()
616 hwirq = bitmap_find_free_region(msi->used, INT_PCI_MSI_NR, order_base_2(nr_irqs)); in rcar_msi_domain_alloc()
618 mutex_unlock(&msi->map_lock); in rcar_msi_domain_alloc()
621 return -ENOSPC; in rcar_msi_domain_alloc()
625 &rcar_msi_bottom_chip, domain->host_data, in rcar_msi_domain_alloc()
635 struct rcar_msi *msi = domain->host_data; in rcar_msi_domain_free()
637 mutex_lock(&msi->map_lock); in rcar_msi_domain_free()
639 bitmap_release_region(msi->used, d->hwirq, order_base_2(nr_irqs)); in rcar_msi_domain_free()
641 mutex_unlock(&msi->map_lock); in rcar_msi_domain_free()
657 struct rcar_pcie *pcie = &msi_to_host(msi)->pcie; in rcar_allocate_domains() local
658 struct fwnode_handle *fwnode = dev_fwnode(pcie->dev); in rcar_allocate_domains()
664 dev_err(pcie->dev, "failed to create IRQ domain\n"); in rcar_allocate_domains()
665 return -ENOMEM; in rcar_allocate_domains()
669 msi->domain = pci_msi_create_irq_domain(fwnode, &rcar_msi_info, parent); in rcar_allocate_domains()
670 if (!msi->domain) { in rcar_allocate_domains()
671 dev_err(pcie->dev, "failed to create MSI domain\n"); in rcar_allocate_domains()
673 return -ENOMEM; in rcar_allocate_domains()
681 struct irq_domain *parent = msi->domain->parent; in rcar_free_domains()
683 irq_domain_remove(msi->domain); in rcar_free_domains()
689 struct rcar_pcie *pcie = &host->pcie; in rcar_pcie_enable_msi() local
690 struct device *dev = pcie->dev; in rcar_pcie_enable_msi()
691 struct rcar_msi *msi = &host->msi; in rcar_pcie_enable_msi()
695 mutex_init(&msi->map_lock); in rcar_pcie_enable_msi()
696 spin_lock_init(&msi->mask_lock); in rcar_pcie_enable_msi()
698 err = of_address_to_resource(dev->of_node, 0, &res); in rcar_pcie_enable_msi()
706 /* Two irqs are for MSI, but they are also used for non-MSI irqs */ in rcar_pcie_enable_msi()
707 err = devm_request_irq(dev, msi->irq1, rcar_pcie_msi_irq, in rcar_pcie_enable_msi()
715 err = devm_request_irq(dev, msi->irq2, rcar_pcie_msi_irq, in rcar_pcie_enable_msi()
724 rcar_pci_write_reg(pcie, 0, PCIEMSIIER); in rcar_pcie_enable_msi()
728 * is guaranteed to be in the low 32bit range on any RCar HW. in rcar_pcie_enable_msi()
730 rcar_pci_write_reg(pcie, lower_32_bits(res.start) | MSIFE, PCIEMSIALR); in rcar_pcie_enable_msi()
731 rcar_pci_write_reg(pcie, upper_32_bits(res.start), PCIEMSIAUR); in rcar_pcie_enable_msi()
742 struct rcar_pcie *pcie = &host->pcie; in rcar_pcie_teardown_msi() local
745 rcar_pci_write_reg(pcie, 0, PCIEMSIIER); in rcar_pcie_teardown_msi()
748 rcar_pci_write_reg(pcie, 0, PCIEMSIALR); in rcar_pcie_teardown_msi()
750 rcar_free_domains(&host->msi); in rcar_pcie_teardown_msi()
755 struct rcar_pcie *pcie = &host->pcie; in rcar_pcie_get_resources() local
756 struct device *dev = pcie->dev; in rcar_pcie_get_resources()
760 host->phy = devm_phy_optional_get(dev, "pcie"); in rcar_pcie_get_resources()
761 if (IS_ERR(host->phy)) in rcar_pcie_get_resources()
762 return PTR_ERR(host->phy); in rcar_pcie_get_resources()
764 err = of_address_to_resource(dev->of_node, 0, &res); in rcar_pcie_get_resources()
768 pcie->base = devm_ioremap_resource(dev, &res); in rcar_pcie_get_resources()
769 if (IS_ERR(pcie->base)) in rcar_pcie_get_resources()
770 return PTR_ERR(pcie->base); in rcar_pcie_get_resources()
772 host->bus_clk = devm_clk_get(dev, "pcie_bus"); in rcar_pcie_get_resources()
773 if (IS_ERR(host->bus_clk)) { in rcar_pcie_get_resources()
774 dev_err(dev, "cannot get pcie bus clock\n"); in rcar_pcie_get_resources()
775 return PTR_ERR(host->bus_clk); in rcar_pcie_get_resources()
778 i = irq_of_parse_and_map(dev->of_node, 0); in rcar_pcie_get_resources()
781 err = -ENOENT; in rcar_pcie_get_resources()
784 host->msi.irq1 = i; in rcar_pcie_get_resources()
786 i = irq_of_parse_and_map(dev->of_node, 1); in rcar_pcie_get_resources()
789 err = -ENOENT; in rcar_pcie_get_resources()
792 host->msi.irq2 = i; in rcar_pcie_get_resources()
796 pcie_base = pcie->base; in rcar_pcie_get_resources()
797 pcie_bus_clk = host->bus_clk; in rcar_pcie_get_resources()
803 irq_dispose_mapping(host->msi.irq1); in rcar_pcie_get_resources()
808 static int rcar_pcie_inbound_ranges(struct rcar_pcie *pcie, in rcar_pcie_inbound_ranges() argument
812 u64 restype = entry->res->flags; in rcar_pcie_inbound_ranges()
813 u64 cpu_addr = entry->res->start; in rcar_pcie_inbound_ranges()
814 u64 cpu_end = entry->res->end; in rcar_pcie_inbound_ranges()
815 u64 pci_addr = entry->res->start - entry->offset; in rcar_pcie_inbound_ranges()
818 u64 size = resource_size(entry->res); in rcar_pcie_inbound_ranges()
825 if (idx >= MAX_NR_INBOUND_MAPS - 1) { in rcar_pcie_inbound_ranges()
826 dev_err(pcie->dev, "Failed to map inbound regions!\n"); in rcar_pcie_inbound_ranges()
827 return -EINVAL; in rcar_pcie_inbound_ranges()
843 mask = roundup_pow_of_two(size) - 1; in rcar_pcie_inbound_ranges()
846 rcar_pcie_set_inbound(pcie, cpu_addr, pci_addr, in rcar_pcie_inbound_ranges()
864 resource_list_for_each_entry(entry, &bridge->dma_ranges) { in rcar_pcie_parse_map_dma_ranges()
865 err = rcar_pcie_inbound_ranges(&host->pcie, entry, &index); in rcar_pcie_parse_map_dma_ranges()
874 { .compatible = "renesas,pcie-r8a7779",
876 { .compatible = "renesas,pcie-r8a7790",
878 { .compatible = "renesas,pcie-r8a7791",
880 { .compatible = "renesas,pcie-rcar-gen2",
882 { .compatible = "renesas,pcie-r8a7795",
884 { .compatible = "renesas,pcie-rcar-gen3",
891 struct device *dev = &pdev->dev; in rcar_pcie_probe()
893 struct rcar_pcie *pcie; in rcar_pcie_probe() local
900 return -ENOMEM; in rcar_pcie_probe()
903 pcie = &host->pcie; in rcar_pcie_probe()
904 pcie->dev = dev; in rcar_pcie_probe()
907 pm_runtime_enable(pcie->dev); in rcar_pcie_probe()
908 err = pm_runtime_get_sync(pcie->dev); in rcar_pcie_probe()
910 dev_err(pcie->dev, "pm_runtime_get_sync failed\n"); in rcar_pcie_probe()
920 err = clk_prepare_enable(host->bus_clk); in rcar_pcie_probe()
930 host->phy_init_fn = of_device_get_match_data(dev); in rcar_pcie_probe()
931 err = host->phy_init_fn(host); in rcar_pcie_probe()
933 dev_err(dev, "failed to init PCIe PHY\n"); in rcar_pcie_probe()
938 if (rcar_pcie_hw_init(pcie)) { in rcar_pcie_probe()
939 dev_info(dev, "PCIe link down\n"); in rcar_pcie_probe()
940 err = -ENODEV; in rcar_pcie_probe()
944 data = rcar_pci_read_reg(pcie, MACSR); in rcar_pcie_probe()
945 dev_info(dev, "PCIe x%d: link up\n", (data >> 20) & 0x3f); in rcar_pcie_probe()
968 if (host->phy) { in rcar_pcie_probe()
969 phy_power_off(host->phy); in rcar_pcie_probe()
970 phy_exit(host->phy); in rcar_pcie_probe()
974 clk_disable_unprepare(host->bus_clk); in rcar_pcie_probe()
977 irq_dispose_mapping(host->msi.irq2); in rcar_pcie_probe()
978 irq_dispose_mapping(host->msi.irq1); in rcar_pcie_probe()
990 struct rcar_pcie *pcie = &host->pcie; in rcar_pcie_resume() local
999 err = host->phy_init_fn(host); in rcar_pcie_resume()
1001 dev_info(dev, "PCIe link down\n"); in rcar_pcie_resume()
1005 data = rcar_pci_read_reg(pcie, MACSR); in rcar_pcie_resume()
1006 dev_info(dev, "PCIe x%d: link up\n", (data >> 20) & 0x3f); in rcar_pcie_resume()
1013 of_address_to_resource(dev->of_node, 0, &res); in rcar_pcie_resume()
1014 rcar_pci_write_reg(pcie, upper_32_bits(res.start), PCIEMSIAUR); in rcar_pcie_resume()
1015 rcar_pci_write_reg(pcie, lower_32_bits(res.start) | MSIFE, PCIEMSIALR); in rcar_pcie_resume()
1017 bitmap_to_arr32(&val, host->msi.used, INT_PCI_MSI_NR); in rcar_pcie_resume()
1018 rcar_pci_write_reg(pcie, val, PCIEMSIIER); in rcar_pcie_resume()
1029 struct rcar_pcie *pcie = &host->pcie; in rcar_pcie_resume_noirq() local
1031 if (rcar_pci_read_reg(pcie, PMSR) && in rcar_pcie_resume_noirq()
1032 !(rcar_pci_read_reg(pcie, PCIETCTLR) & DL_DOWN)) in rcar_pcie_resume_noirq()
1035 /* Re-establish the PCIe link */ in rcar_pcie_resume_noirq()
1036 rcar_pci_write_reg(pcie, MACCTLR_INIT_VAL, MACCTLR); in rcar_pcie_resume_noirq()
1037 rcar_pci_write_reg(pcie, CFINIT, PCIETCTLR); in rcar_pcie_resume_noirq()
1038 return rcar_pcie_wait_for_dl(pcie); in rcar_pcie_resume_noirq()
1048 .name = "rcar-pcie",
1075 * Test if the PCIe controller received PM_ENTER_L1 DLLP and in rcar_pcie_aarch32_abort_handler()
1076 * the PCIe controller is not in L1 link state. If true, apply in rcar_pcie_aarch32_abort_handler()
1094 { .compatible = "renesas,pcie-r8a7779" },
1095 { .compatible = "renesas,pcie-r8a7790" },
1096 { .compatible = "renesas,pcie-r8a7791" },
1097 { .compatible = "renesas,pcie-rcar-gen2" },