705 	void __iomem *ctrl_base_addr = port->axi_base_addr + MC_PCIE_CTRL_ADDR;  in get_events()  local
708 	events |= pcie_events(ctrl_base_addr + PCIE_EVENT_INT);  in get_events()
709 	events |= sec_errors(ctrl_base_addr + SEC_ERROR_INT);  in get_events()
710 	events |= ded_errors(ctrl_base_addr + DED_ERROR_INT);  in get_events()
988 	void __iomem *ctrl_base_addr;  in mc_platform_init()  local
1011 	ctrl_base_addr = port->axi_base_addr + MC_PCIE_CTRL_ADDR;  in mc_platform_init()
1068 	writel_relaxed(val, ctrl_base_addr + ECC_CONTROL);  in mc_platform_init()
1073 	writel_relaxed(val, ctrl_base_addr + PCIE_EVENT_INT);  in mc_platform_init()
1079 	writel_relaxed(val, ctrl_base_addr + SEC_ERROR_INT);  in mc_platform_init()
1080 	writel_relaxed(0, ctrl_base_addr + SEC_ERROR_INT_MASK);  in mc_platform_init()
1081 	writel_relaxed(0, ctrl_base_addr + SEC_ERROR_CNT);  in mc_platform_init()
1087 	writel_relaxed(val, ctrl_base_addr + DED_ERROR_INT);  in mc_platform_init()
1088 	writel_relaxed(0, ctrl_base_addr + DED_ERROR_INT_MASK);  in mc_platform_init()
1089 	writel_relaxed(0, ctrl_base_addr + DED_ERROR_CNT);  in mc_platform_init()