Lines Matching refs:appl_writel
301 static inline void appl_writel(struct tegra_pcie_dw *pcie, const u32 value, in appl_writel() function
362 appl_writel(pcie, val, APPL_INTR_STATUS_L1_0_0); in tegra_pcie_rp_irq_handler()
367 appl_writel(pcie, val, APPL_CAR_RESET_OVRD); in tegra_pcie_rp_irq_handler()
371 appl_writel(pcie, val, APPL_CAR_RESET_OVRD); in tegra_pcie_rp_irq_handler()
382 appl_writel(pcie, in tegra_pcie_rp_irq_handler()
388 appl_writel(pcie, in tegra_pcie_rp_irq_handler()
427 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L0); in pex_ep_event_hot_rst_done()
428 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_0_0); in pex_ep_event_hot_rst_done()
429 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_1); in pex_ep_event_hot_rst_done()
430 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_2); in pex_ep_event_hot_rst_done()
431 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_3); in pex_ep_event_hot_rst_done()
432 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_6); in pex_ep_event_hot_rst_done()
433 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_7); in pex_ep_event_hot_rst_done()
434 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_8_0); in pex_ep_event_hot_rst_done()
435 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_9); in pex_ep_event_hot_rst_done()
436 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_10); in pex_ep_event_hot_rst_done()
437 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_11); in pex_ep_event_hot_rst_done()
438 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_13); in pex_ep_event_hot_rst_done()
439 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_14); in pex_ep_event_hot_rst_done()
440 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_15); in pex_ep_event_hot_rst_done()
441 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_17); in pex_ep_event_hot_rst_done()
442 appl_writel(pcie, 0xFFFFFFFF, APPL_MSI_CTRL_2); in pex_ep_event_hot_rst_done()
446 appl_writel(pcie, val, APPL_CTRL); in pex_ep_event_hot_rst_done()
472 appl_writel(pcie, val, APPL_LTR_MSG_1); in tegra_pcie_ep_irq_thread()
477 appl_writel(pcie, val, APPL_LTR_MSG_2); in tegra_pcie_ep_irq_thread()
505 appl_writel(pcie, status_l1, APPL_INTR_STATUS_L1_0_0); in tegra_pcie_ep_hard_irq()
523 appl_writel(pcie, status_l1, APPL_INTR_STATUS_L1_15); in tegra_pcie_ep_hard_irq()
534 appl_writel(pcie, status_l0, APPL_INTR_STATUS_L0); in tegra_pcie_ep_hard_irq()
712 appl_writel(pcie, val, APPL_INTR_EN_L0_0); in tegra_pcie_enable_system_interrupts()
716 appl_writel(pcie, val, APPL_INTR_EN_L1_0_0); in tegra_pcie_enable_system_interrupts()
721 appl_writel(pcie, val, APPL_INTR_EN_L0_0); in tegra_pcie_enable_system_interrupts()
726 appl_writel(pcie, val, APPL_INTR_EN_L1_18); in tegra_pcie_enable_system_interrupts()
751 appl_writel(pcie, val, APPL_INTR_EN_L0_0); in tegra_pcie_enable_legacy_interrupts()
759 appl_writel(pcie, val, APPL_INTR_EN_L1_8_0); in tegra_pcie_enable_legacy_interrupts()
772 appl_writel(pcie, val, APPL_INTR_EN_L0_0); in tegra_pcie_enable_msi_interrupts()
781 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L0); in tegra_pcie_enable_interrupts()
782 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_0_0); in tegra_pcie_enable_interrupts()
783 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_1); in tegra_pcie_enable_interrupts()
784 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_2); in tegra_pcie_enable_interrupts()
785 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_3); in tegra_pcie_enable_interrupts()
786 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_6); in tegra_pcie_enable_interrupts()
787 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_7); in tegra_pcie_enable_interrupts()
788 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_8_0); in tegra_pcie_enable_interrupts()
789 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_9); in tegra_pcie_enable_interrupts()
790 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_10); in tegra_pcie_enable_interrupts()
791 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_11); in tegra_pcie_enable_interrupts()
792 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_13); in tegra_pcie_enable_interrupts()
793 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_14); in tegra_pcie_enable_interrupts()
794 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_15); in tegra_pcie_enable_interrupts()
795 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_17); in tegra_pcie_enable_interrupts()
933 appl_writel(pcie, val, APPL_PINMUX); in tegra_pcie_dw_start_link()
940 appl_writel(pcie, val, APPL_CTRL); in tegra_pcie_dw_start_link()
945 appl_writel(pcie, val, APPL_PINMUX); in tegra_pcie_dw_start_link()
975 appl_writel(pcie, val, APPL_CTRL); in tegra_pcie_dw_start_link()
1362 appl_writel(pcie, val, APPL_CTRL); in tegra_pcie_config_controller()
1372 appl_writel(pcie, pcie->dbi_res->start & APPL_CFG_BASE_ADDR_MASK, in tegra_pcie_config_controller()
1376 appl_writel(pcie, APPL_DM_TYPE_RP, APPL_DM_TYPE); in tegra_pcie_config_controller()
1378 appl_writel(pcie, 0x0, APPL_CFG_SLCG_OVERRIDE); in tegra_pcie_config_controller()
1381 appl_writel(pcie, val | APPL_CTRL_SYS_PRE_DET_STATE, APPL_CTRL); in tegra_pcie_config_controller()
1385 appl_writel(pcie, val, APPL_CFG_MISC); in tegra_pcie_config_controller()
1391 appl_writel(pcie, val, APPL_PINMUX); in tegra_pcie_config_controller()
1395 appl_writel(pcie, in tegra_pcie_config_controller()
1479 appl_writel(pcie, val, APPL_RADM_STATUS); in tegra_pcie_try_link_l2()
1504 appl_writel(pcie, 0x0, APPL_INTR_EN_L0_0); in tegra_pcie_dw_pme_turnoff()
1516 appl_writel(pcie, data, APPL_PINMUX); in tegra_pcie_dw_pme_turnoff()
1545 appl_writel(pcie, data, APPL_PINMUX); in tegra_pcie_dw_pme_turnoff()
1619 appl_writel(pcie, val, APPL_CTRL); in pex_ep_event_pex_rst_assert()
1690 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L0); in pex_ep_event_pex_rst_deassert()
1691 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_0_0); in pex_ep_event_pex_rst_deassert()
1692 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_1); in pex_ep_event_pex_rst_deassert()
1693 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_2); in pex_ep_event_pex_rst_deassert()
1694 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_3); in pex_ep_event_pex_rst_deassert()
1695 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_6); in pex_ep_event_pex_rst_deassert()
1696 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_7); in pex_ep_event_pex_rst_deassert()
1697 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_8_0); in pex_ep_event_pex_rst_deassert()
1698 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_9); in pex_ep_event_pex_rst_deassert()
1699 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_10); in pex_ep_event_pex_rst_deassert()
1700 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_11); in pex_ep_event_pex_rst_deassert()
1701 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_13); in pex_ep_event_pex_rst_deassert()
1702 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_14); in pex_ep_event_pex_rst_deassert()
1703 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_15); in pex_ep_event_pex_rst_deassert()
1704 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_17); in pex_ep_event_pex_rst_deassert()
1710 appl_writel(pcie, val, APPL_DM_TYPE); in pex_ep_event_pex_rst_deassert()
1712 appl_writel(pcie, 0x0, APPL_CFG_SLCG_OVERRIDE); in pex_ep_event_pex_rst_deassert()
1717 appl_writel(pcie, val, APPL_CTRL); in pex_ep_event_pex_rst_deassert()
1722 appl_writel(pcie, val, APPL_CFG_MISC); in pex_ep_event_pex_rst_deassert()
1727 appl_writel(pcie, val, APPL_PINMUX); in pex_ep_event_pex_rst_deassert()
1729 appl_writel(pcie, pcie->dbi_res->start & APPL_CFG_BASE_ADDR_MASK, in pex_ep_event_pex_rst_deassert()
1732 appl_writel(pcie, pcie->atu_dma_res->start & in pex_ep_event_pex_rst_deassert()
1740 appl_writel(pcie, val, APPL_INTR_EN_L0_0); in pex_ep_event_pex_rst_deassert()
1745 appl_writel(pcie, val, APPL_INTR_EN_L1_0_0); in pex_ep_event_pex_rst_deassert()
1790 appl_writel(pcie, val, APPL_CTRL); in pex_ep_event_pex_rst_deassert()
1828 appl_writel(pcie, 1, APPL_LEGACY_INTX); in tegra_pcie_ep_raise_legacy_irq()
1830 appl_writel(pcie, 0, APPL_LEGACY_INTX); in tegra_pcie_ep_raise_legacy_irq()
1839 appl_writel(pcie, BIT(irq), APPL_MSI_CTRL_1); in tegra_pcie_ep_raise_msi_irq()
2180 appl_writel(pcie, val, APPL_CTRL); in tegra_pcie_dw_suspend_late()
2257 appl_writel(pcie, val, APPL_CTRL); in tegra_pcie_dw_resume_early()