Lines Matching +full:termination +full:- +full:gpios

1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2019-2021 SiFive, Inc.
30 #include "pcie-designware.h"
32 #define to_fu740_pcie(x) dev_get_drvdata((x)->dev)
85 gpiod_set_value_cansleep(afp->reset, 0); in fu740_pcie_assert_reset()
87 writel_relaxed(0x0, afp->mgmt_base + PCIEX8MGMT_PERST_N); in fu740_pcie_assert_reset()
93 writel_relaxed(0x1, afp->mgmt_base + PCIEX8MGMT_PERST_N); in fu740_pcie_deassert_reset()
95 gpiod_set_value_cansleep(afp->reset, 1); in fu740_pcie_deassert_reset()
100 gpiod_set_value_cansleep(afp->pwren, 1); in fu740_pcie_power_on()
119 struct device *dev = afp->pci.dev; in fu740_phyregwrite()
128 phy_cr_para_addr = afp->mgmt_base + PCIEX8MGMT_PHY1_CR_PARA_ADDR; in fu740_phyregwrite()
129 phy_cr_para_wr_data = afp->mgmt_base + PCIEX8MGMT_PHY1_CR_PARA_WR_DATA; in fu740_phyregwrite()
130 phy_cr_para_wr_en = afp->mgmt_base + PCIEX8MGMT_PHY1_CR_PARA_WR_EN; in fu740_phyregwrite()
131 phy_cr_para_ack = afp->mgmt_base + PCIEX8MGMT_PHY1_CR_PARA_ACK; in fu740_phyregwrite()
133 phy_cr_para_addr = afp->mgmt_base + PCIEX8MGMT_PHY0_CR_PARA_ADDR; in fu740_phyregwrite()
134 phy_cr_para_wr_data = afp->mgmt_base + PCIEX8MGMT_PHY0_CR_PARA_WR_DATA; in fu740_phyregwrite()
135 phy_cr_para_wr_en = afp->mgmt_base + PCIEX8MGMT_PHY0_CR_PARA_WR_EN; in fu740_phyregwrite()
136 phy_cr_para_ack = afp->mgmt_base + PCIEX8MGMT_PHY0_CR_PARA_ACK; in fu740_phyregwrite()
160 writel_relaxed(0x1, afp->mgmt_base + PCIEX8MGMT_PHY0_CR_PARA_SEL); in fu740_pcie_init_phy()
161 writel_relaxed(0x1, afp->mgmt_base + PCIEX8MGMT_PHY1_CR_PARA_SEL); in fu740_pcie_init_phy()
169 /* Set PHY AC termination mode */ in fu740_pcie_init_phy()
182 struct device *dev = pci->dev; in fu740_pcie_start_link()
186 writel_relaxed(0x1, afp->mgmt_base + PCIEX8MGMT_APP_LTSSM_ENABLE); in fu740_pcie_start_link()
194 struct device *dev = pci->dev; in fu740_pcie_host_init()
201 ret = clk_prepare_enable(afp->pcie_aux); in fu740_pcie_host_init()
211 writel_relaxed(0x1, afp->mgmt_base + PCIEX8MGMT_APP_HOLD_PHY_RST); in fu740_pcie_host_init()
214 ret = reset_control_deassert(afp->rst); in fu740_pcie_host_init()
223 clk_disable_unprepare(afp->pcie_aux); in fu740_pcie_host_init()
225 writel_relaxed(0x0, afp->mgmt_base + PCIEX8MGMT_APP_HOLD_PHY_RST); in fu740_pcie_host_init()
227 ret = clk_prepare_enable(afp->pcie_aux); in fu740_pcie_host_init()
229 writel_relaxed(0x4, afp->mgmt_base + PCIEX8MGMT_DEVICE_TYPE); in fu740_pcie_host_init()
244 struct device *dev = &pdev->dev; in fu740_pcie_probe()
250 return -ENOMEM; in fu740_pcie_probe()
251 pci = &afp->pci; in fu740_pcie_probe()
252 pci->dev = dev; in fu740_pcie_probe()
253 pci->ops = &dw_pcie_ops; in fu740_pcie_probe()
254 pci->pp.ops = &fu740_pcie_host_ops; in fu740_pcie_probe()
257 afp->mgmt_base = devm_platform_ioremap_resource_byname(pdev, "mgmt"); in fu740_pcie_probe()
258 if (IS_ERR(afp->mgmt_base)) in fu740_pcie_probe()
259 return PTR_ERR(afp->mgmt_base); in fu740_pcie_probe()
261 /* Fetch GPIOs */ in fu740_pcie_probe()
262 afp->reset = devm_gpiod_get_optional(dev, "reset-gpios", GPIOD_OUT_LOW); in fu740_pcie_probe()
263 if (IS_ERR(afp->reset)) in fu740_pcie_probe()
264 return dev_err_probe(dev, PTR_ERR(afp->reset), "unable to get reset-gpios\n"); in fu740_pcie_probe()
266 afp->pwren = devm_gpiod_get_optional(dev, "pwren-gpios", GPIOD_OUT_LOW); in fu740_pcie_probe()
267 if (IS_ERR(afp->pwren)) in fu740_pcie_probe()
268 return dev_err_probe(dev, PTR_ERR(afp->pwren), "unable to get pwren-gpios\n"); in fu740_pcie_probe()
271 afp->pcie_aux = devm_clk_get(dev, "pcie_aux"); in fu740_pcie_probe()
272 if (IS_ERR(afp->pcie_aux)) in fu740_pcie_probe()
273 return dev_err_probe(dev, PTR_ERR(afp->pcie_aux), in fu740_pcie_probe()
277 afp->rst = devm_reset_control_get_exclusive(dev, NULL); in fu740_pcie_probe()
278 if (IS_ERR(afp->rst)) in fu740_pcie_probe()
279 return dev_err_probe(dev, PTR_ERR(afp->rst), "unable to get reset\n"); in fu740_pcie_probe()
283 return dw_pcie_host_init(&pci->pp); in fu740_pcie_probe()
295 { .compatible = "sifive,fu740-pcie", },
301 .name = "fu740-pcie",