Lines Matching +full:imx6q +full:- +full:iomuxc +full:- +full:gpr
1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
18 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
35 #include "pcie-designware.h"
44 #define to_imx6_pcie(x) dev_get_drvdata((x)->dev)
47 IMX6Q, enumerator
98 /* PCIe Port Logic registers (memory-mapped) */
111 /* PHY registers (not memory-mapped) */
148 struct dw_pcie *pci = imx6_pcie->pci; in pcie_phy_poll_ack()
164 return -ETIMEDOUT; in pcie_phy_poll_ack()
169 struct dw_pcie *pci = imx6_pcie->pci; in pcie_phy_wait_ack()
189 /* Read from the 16-bit PCIe PHY control registers (not memory-mapped) */
192 struct dw_pcie *pci = imx6_pcie->pci; in pcie_phy_read()
218 struct dw_pcie *pci = imx6_pcie->pci; in pcie_phy_write()
243 /* wait for ack de-assertion */ in pcie_phy_write()
261 /* wait for ack de-assertion */ in pcie_phy_write()
275 if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_IMX6_PHY)) in imx6_pcie_reset_phy()
302 * make it look like it read all-ones. in imx6q_pcie_abort_handler()
310 val = -1; in imx6q_pcie_abort_handler()
312 regs->uregs[reg] = val; in imx6q_pcie_abort_handler()
313 regs->ARM_pc += 4; in imx6q_pcie_abort_handler()
318 regs->uregs[reg] = -1; in imx6q_pcie_abort_handler()
319 regs->ARM_pc += 4; in imx6q_pcie_abort_handler()
333 if (dev->pm_domain) in imx6_pcie_attach_pd()
336 imx6_pcie->pd_pcie = dev_pm_domain_attach_by_name(dev, "pcie"); in imx6_pcie_attach_pd()
337 if (IS_ERR(imx6_pcie->pd_pcie)) in imx6_pcie_attach_pd()
338 return PTR_ERR(imx6_pcie->pd_pcie); in imx6_pcie_attach_pd()
340 if (!imx6_pcie->pd_pcie) in imx6_pcie_attach_pd()
342 link = device_link_add(dev, imx6_pcie->pd_pcie, in imx6_pcie_attach_pd()
348 return -EINVAL; in imx6_pcie_attach_pd()
351 imx6_pcie->pd_pcie_phy = dev_pm_domain_attach_by_name(dev, "pcie_phy"); in imx6_pcie_attach_pd()
352 if (IS_ERR(imx6_pcie->pd_pcie_phy)) in imx6_pcie_attach_pd()
353 return PTR_ERR(imx6_pcie->pd_pcie_phy); in imx6_pcie_attach_pd()
355 link = device_link_add(dev, imx6_pcie->pd_pcie_phy, in imx6_pcie_attach_pd()
361 return -EINVAL; in imx6_pcie_attach_pd()
369 struct device *dev = imx6_pcie->pci->dev; in imx6_pcie_assert_core_reset()
371 switch (imx6_pcie->drvdata->variant) { in imx6_pcie_assert_core_reset()
374 reset_control_assert(imx6_pcie->pciephy_reset); in imx6_pcie_assert_core_reset()
375 reset_control_assert(imx6_pcie->apps_reset); in imx6_pcie_assert_core_reset()
378 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_assert_core_reset()
382 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR5, in imx6_pcie_assert_core_reset()
387 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, in imx6_pcie_assert_core_reset()
391 case IMX6Q: in imx6_pcie_assert_core_reset()
392 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, in imx6_pcie_assert_core_reset()
394 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, in imx6_pcie_assert_core_reset()
399 if (imx6_pcie->vpcie && regulator_is_enabled(imx6_pcie->vpcie) > 0) { in imx6_pcie_assert_core_reset()
400 int ret = regulator_disable(imx6_pcie->vpcie); in imx6_pcie_assert_core_reset()
410 WARN_ON(imx6_pcie->drvdata->variant != IMX8MQ); in imx6_pcie_grp_offset()
411 return imx6_pcie->controller_id == 1 ? IOMUXC_GPR16 : IOMUXC_GPR14; in imx6_pcie_grp_offset()
416 struct dw_pcie *pci = imx6_pcie->pci; in imx6_pcie_enable_ref_clk()
417 struct device *dev = pci->dev; in imx6_pcie_enable_ref_clk()
421 switch (imx6_pcie->drvdata->variant) { in imx6_pcie_enable_ref_clk()
423 ret = clk_prepare_enable(imx6_pcie->pcie_inbound_axi); in imx6_pcie_enable_ref_clk()
429 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_enable_ref_clk()
433 case IMX6Q: in imx6_pcie_enable_ref_clk()
435 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, in imx6_pcie_enable_ref_clk()
444 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, in imx6_pcie_enable_ref_clk()
450 ret = clk_prepare_enable(imx6_pcie->pcie_aux); in imx6_pcie_enable_ref_clk()
461 regmap_update_bits(imx6_pcie->iomuxc_gpr, offset, in imx6_pcie_enable_ref_clk()
464 regmap_update_bits(imx6_pcie->iomuxc_gpr, offset, in imx6_pcie_enable_ref_clk()
476 struct device *dev = imx6_pcie->pci->dev; in imx7d_pcie_wait_for_phy_pll_lock()
478 if (regmap_read_poll_timeout(imx6_pcie->iomuxc_gpr, in imx7d_pcie_wait_for_phy_pll_lock()
488 struct dw_pcie *pci = imx6_pcie->pci; in imx6_pcie_deassert_core_reset()
489 struct device *dev = pci->dev; in imx6_pcie_deassert_core_reset()
492 if (imx6_pcie->vpcie && !regulator_is_enabled(imx6_pcie->vpcie)) { in imx6_pcie_deassert_core_reset()
493 ret = regulator_enable(imx6_pcie->vpcie); in imx6_pcie_deassert_core_reset()
501 ret = clk_prepare_enable(imx6_pcie->pcie_phy); in imx6_pcie_deassert_core_reset()
507 ret = clk_prepare_enable(imx6_pcie->pcie_bus); in imx6_pcie_deassert_core_reset()
513 ret = clk_prepare_enable(imx6_pcie->pcie); in imx6_pcie_deassert_core_reset()
529 if (gpio_is_valid(imx6_pcie->reset_gpio)) { in imx6_pcie_deassert_core_reset()
530 gpio_set_value_cansleep(imx6_pcie->reset_gpio, in imx6_pcie_deassert_core_reset()
531 imx6_pcie->gpio_active_high); in imx6_pcie_deassert_core_reset()
533 gpio_set_value_cansleep(imx6_pcie->reset_gpio, in imx6_pcie_deassert_core_reset()
534 !imx6_pcie->gpio_active_high); in imx6_pcie_deassert_core_reset()
537 switch (imx6_pcie->drvdata->variant) { in imx6_pcie_deassert_core_reset()
539 reset_control_deassert(imx6_pcie->pciephy_reset); in imx6_pcie_deassert_core_reset()
542 reset_control_deassert(imx6_pcie->pciephy_reset); in imx6_pcie_deassert_core_reset()
544 /* Workaround for ERR010728, failure of PCI-e PLL VCO to in imx6_pcie_deassert_core_reset()
545 * oscillate, especially when cold. This turns off "Duty-cycle in imx6_pcie_deassert_core_reset()
548 if (likely(imx6_pcie->phy_base)) { in imx6_pcie_deassert_core_reset()
549 /* De-assert DCC_FB_EN */ in imx6_pcie_deassert_core_reset()
551 imx6_pcie->phy_base + PCIE_PHY_CMN_REG4); in imx6_pcie_deassert_core_reset()
555 imx6_pcie->phy_base + PCIE_PHY_CMN_REG24); in imx6_pcie_deassert_core_reset()
558 imx6_pcie->phy_base + PCIE_PHY_CMN_REG26); in imx6_pcie_deassert_core_reset()
560 dev_warn(dev, "Unable to apply ERR010728 workaround. DT missing fsl,imx7d-pcie-phy phandle ?\n"); in imx6_pcie_deassert_core_reset()
566 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR5, in imx6_pcie_deassert_core_reset()
570 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, in imx6_pcie_deassert_core_reset()
575 case IMX6Q: /* Nothing to do */ in imx6_pcie_deassert_core_reset()
582 clk_disable_unprepare(imx6_pcie->pcie); in imx6_pcie_deassert_core_reset()
584 clk_disable_unprepare(imx6_pcie->pcie_bus); in imx6_pcie_deassert_core_reset()
586 clk_disable_unprepare(imx6_pcie->pcie_phy); in imx6_pcie_deassert_core_reset()
588 if (imx6_pcie->vpcie && regulator_is_enabled(imx6_pcie->vpcie) > 0) { in imx6_pcie_deassert_core_reset()
589 ret = regulator_disable(imx6_pcie->vpcie); in imx6_pcie_deassert_core_reset()
600 if (imx6_pcie->drvdata->variant == IMX8MQ && in imx6_pcie_configure_type()
601 imx6_pcie->controller_id == 1) { in imx6_pcie_configure_type()
611 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, mask, val); in imx6_pcie_configure_type()
616 switch (imx6_pcie->drvdata->variant) { in imx6_pcie_init_phy()
622 regmap_update_bits(imx6_pcie->iomuxc_gpr, in imx6_pcie_init_phy()
631 if (imx6_pcie->vph && in imx6_pcie_init_phy()
632 regulator_get_voltage(imx6_pcie->vph) > 3000000) in imx6_pcie_init_phy()
633 regmap_update_bits(imx6_pcie->iomuxc_gpr, in imx6_pcie_init_phy()
639 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_init_phy()
643 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_init_phy()
648 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_init_phy()
652 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_init_phy()
655 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, in imx6_pcie_init_phy()
657 imx6_pcie->tx_deemph_gen1 << 0); in imx6_pcie_init_phy()
658 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, in imx6_pcie_init_phy()
660 imx6_pcie->tx_deemph_gen2_3p5db << 6); in imx6_pcie_init_phy()
661 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, in imx6_pcie_init_phy()
663 imx6_pcie->tx_deemph_gen2_6db << 12); in imx6_pcie_init_phy()
664 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, in imx6_pcie_init_phy()
666 imx6_pcie->tx_swing_full << 18); in imx6_pcie_init_phy()
667 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, in imx6_pcie_init_phy()
669 imx6_pcie->tx_swing_low << 25); in imx6_pcie_init_phy()
678 unsigned long phy_rate = clk_get_rate(imx6_pcie->pcie_phy); in imx6_setup_phy_mpll()
682 if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_IMX6_PHY)) in imx6_setup_phy_mpll()
701 dev_err(imx6_pcie->pci->dev, in imx6_setup_phy_mpll()
703 return -EINVAL; in imx6_setup_phy_mpll()
725 struct dw_pcie *pci = imx6_pcie->pci; in imx6_pcie_wait_for_speed_change()
726 struct device *dev = pci->dev; in imx6_pcie_wait_for_speed_change()
739 return -ETIMEDOUT; in imx6_pcie_wait_for_speed_change()
746 switch (imx6_pcie->drvdata->variant) { in imx6_pcie_ltssm_enable()
747 case IMX6Q: in imx6_pcie_ltssm_enable()
750 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_ltssm_enable()
756 reset_control_deassert(imx6_pcie->apps_reset); in imx6_pcie_ltssm_enable()
764 struct device *dev = pci->dev; in imx6_pcie_start_link()
786 if (pci->link_gen == 2) { in imx6_pcie_start_link()
801 if (imx6_pcie->drvdata->flags & in imx6_pcie_start_link()
806 * occurs and we go Gen1 -> yep, Gen1. The difference in imx6_pcie_start_link()
867 switch (imx6_pcie->drvdata->variant) { in imx6_pcie_ltssm_disable()
870 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_ltssm_disable()
874 reset_control_assert(imx6_pcie->apps_reset); in imx6_pcie_ltssm_disable()
883 struct device *dev = imx6_pcie->pci->dev; in imx6_pcie_pm_turnoff()
886 if (imx6_pcie->turnoff_reset) { in imx6_pcie_pm_turnoff()
887 reset_control_assert(imx6_pcie->turnoff_reset); in imx6_pcie_pm_turnoff()
888 reset_control_deassert(imx6_pcie->turnoff_reset); in imx6_pcie_pm_turnoff()
892 /* Others poke directly at IOMUXC registers */ in imx6_pcie_pm_turnoff()
893 switch (imx6_pcie->drvdata->variant) { in imx6_pcie_pm_turnoff()
895 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_pm_turnoff()
898 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_pm_turnoff()
910 * The standard recommends a 1-10ms timeout after which to in imx6_pcie_pm_turnoff()
919 clk_disable_unprepare(imx6_pcie->pcie); in imx6_pcie_clk_disable()
920 clk_disable_unprepare(imx6_pcie->pcie_phy); in imx6_pcie_clk_disable()
921 clk_disable_unprepare(imx6_pcie->pcie_bus); in imx6_pcie_clk_disable()
923 switch (imx6_pcie->drvdata->variant) { in imx6_pcie_clk_disable()
925 clk_disable_unprepare(imx6_pcie->pcie_inbound_axi); in imx6_pcie_clk_disable()
928 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_clk_disable()
933 clk_disable_unprepare(imx6_pcie->pcie_aux); in imx6_pcie_clk_disable()
944 if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_SUPPORTS_SUSPEND)) in imx6_pcie_suspend_noirq()
958 struct pcie_port *pp = &imx6_pcie->pci->pp; in imx6_pcie_resume_noirq()
960 if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_SUPPORTS_SUSPEND)) in imx6_pcie_resume_noirq()
968 ret = imx6_pcie_start_link(imx6_pcie->pci); in imx6_pcie_resume_noirq()
983 struct device *dev = &pdev->dev; in imx6_pcie_probe()
988 struct device_node *node = dev->of_node; in imx6_pcie_probe()
994 return -ENOMEM; in imx6_pcie_probe()
998 return -ENOMEM; in imx6_pcie_probe()
1000 pci->dev = dev; in imx6_pcie_probe()
1001 pci->ops = &dw_pcie_ops; in imx6_pcie_probe()
1002 pci->pp.ops = &imx6_pcie_host_ops; in imx6_pcie_probe()
1004 imx6_pcie->pci = pci; in imx6_pcie_probe()
1005 imx6_pcie->drvdata = of_device_get_match_data(dev); in imx6_pcie_probe()
1008 np = of_parse_phandle(node, "fsl,imx7d-pcie-phy", 0); in imx6_pcie_probe()
1017 imx6_pcie->phy_base = devm_ioremap_resource(dev, &res); in imx6_pcie_probe()
1018 if (IS_ERR(imx6_pcie->phy_base)) in imx6_pcie_probe()
1019 return PTR_ERR(imx6_pcie->phy_base); in imx6_pcie_probe()
1023 pci->dbi_base = devm_ioremap_resource(dev, dbi_base); in imx6_pcie_probe()
1024 if (IS_ERR(pci->dbi_base)) in imx6_pcie_probe()
1025 return PTR_ERR(pci->dbi_base); in imx6_pcie_probe()
1028 imx6_pcie->reset_gpio = of_get_named_gpio(node, "reset-gpio", 0); in imx6_pcie_probe()
1029 imx6_pcie->gpio_active_high = of_property_read_bool(node, in imx6_pcie_probe()
1030 "reset-gpio-active-high"); in imx6_pcie_probe()
1031 if (gpio_is_valid(imx6_pcie->reset_gpio)) { in imx6_pcie_probe()
1032 ret = devm_gpio_request_one(dev, imx6_pcie->reset_gpio, in imx6_pcie_probe()
1033 imx6_pcie->gpio_active_high ? in imx6_pcie_probe()
1041 } else if (imx6_pcie->reset_gpio == -EPROBE_DEFER) { in imx6_pcie_probe()
1042 return imx6_pcie->reset_gpio; in imx6_pcie_probe()
1046 imx6_pcie->pcie_phy = devm_clk_get(dev, "pcie_phy"); in imx6_pcie_probe()
1047 if (IS_ERR(imx6_pcie->pcie_phy)) in imx6_pcie_probe()
1048 return dev_err_probe(dev, PTR_ERR(imx6_pcie->pcie_phy), in imx6_pcie_probe()
1051 imx6_pcie->pcie_bus = devm_clk_get(dev, "pcie_bus"); in imx6_pcie_probe()
1052 if (IS_ERR(imx6_pcie->pcie_bus)) in imx6_pcie_probe()
1053 return dev_err_probe(dev, PTR_ERR(imx6_pcie->pcie_bus), in imx6_pcie_probe()
1056 imx6_pcie->pcie = devm_clk_get(dev, "pcie"); in imx6_pcie_probe()
1057 if (IS_ERR(imx6_pcie->pcie)) in imx6_pcie_probe()
1058 return dev_err_probe(dev, PTR_ERR(imx6_pcie->pcie), in imx6_pcie_probe()
1061 switch (imx6_pcie->drvdata->variant) { in imx6_pcie_probe()
1063 imx6_pcie->pcie_inbound_axi = devm_clk_get(dev, in imx6_pcie_probe()
1065 if (IS_ERR(imx6_pcie->pcie_inbound_axi)) in imx6_pcie_probe()
1066 return dev_err_probe(dev, PTR_ERR(imx6_pcie->pcie_inbound_axi), in imx6_pcie_probe()
1070 imx6_pcie->pcie_aux = devm_clk_get(dev, "pcie_aux"); in imx6_pcie_probe()
1071 if (IS_ERR(imx6_pcie->pcie_aux)) in imx6_pcie_probe()
1072 return dev_err_probe(dev, PTR_ERR(imx6_pcie->pcie_aux), in imx6_pcie_probe()
1076 if (dbi_base->start == IMX8MQ_PCIE2_BASE_ADDR) in imx6_pcie_probe()
1077 imx6_pcie->controller_id = 1; in imx6_pcie_probe()
1079 imx6_pcie->pciephy_reset = devm_reset_control_get_exclusive(dev, in imx6_pcie_probe()
1081 if (IS_ERR(imx6_pcie->pciephy_reset)) { in imx6_pcie_probe()
1083 return PTR_ERR(imx6_pcie->pciephy_reset); in imx6_pcie_probe()
1086 imx6_pcie->apps_reset = devm_reset_control_get_exclusive(dev, in imx6_pcie_probe()
1088 if (IS_ERR(imx6_pcie->apps_reset)) { in imx6_pcie_probe()
1090 return PTR_ERR(imx6_pcie->apps_reset); in imx6_pcie_probe()
1098 imx6_pcie->turnoff_reset = devm_reset_control_get_optional_exclusive(dev, "turnoff"); in imx6_pcie_probe()
1099 if (IS_ERR(imx6_pcie->turnoff_reset)) { in imx6_pcie_probe()
1101 return PTR_ERR(imx6_pcie->turnoff_reset); in imx6_pcie_probe()
1104 /* Grab GPR config register range */ in imx6_pcie_probe()
1105 imx6_pcie->iomuxc_gpr = in imx6_pcie_probe()
1106 syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr"); in imx6_pcie_probe()
1107 if (IS_ERR(imx6_pcie->iomuxc_gpr)) { in imx6_pcie_probe()
1108 dev_err(dev, "unable to find iomuxc registers\n"); in imx6_pcie_probe()
1109 return PTR_ERR(imx6_pcie->iomuxc_gpr); in imx6_pcie_probe()
1113 if (of_property_read_u32(node, "fsl,tx-deemph-gen1", in imx6_pcie_probe()
1114 &imx6_pcie->tx_deemph_gen1)) in imx6_pcie_probe()
1115 imx6_pcie->tx_deemph_gen1 = 0; in imx6_pcie_probe()
1117 if (of_property_read_u32(node, "fsl,tx-deemph-gen2-3p5db", in imx6_pcie_probe()
1118 &imx6_pcie->tx_deemph_gen2_3p5db)) in imx6_pcie_probe()
1119 imx6_pcie->tx_deemph_gen2_3p5db = 0; in imx6_pcie_probe()
1121 if (of_property_read_u32(node, "fsl,tx-deemph-gen2-6db", in imx6_pcie_probe()
1122 &imx6_pcie->tx_deemph_gen2_6db)) in imx6_pcie_probe()
1123 imx6_pcie->tx_deemph_gen2_6db = 20; in imx6_pcie_probe()
1125 if (of_property_read_u32(node, "fsl,tx-swing-full", in imx6_pcie_probe()
1126 &imx6_pcie->tx_swing_full)) in imx6_pcie_probe()
1127 imx6_pcie->tx_swing_full = 127; in imx6_pcie_probe()
1129 if (of_property_read_u32(node, "fsl,tx-swing-low", in imx6_pcie_probe()
1130 &imx6_pcie->tx_swing_low)) in imx6_pcie_probe()
1131 imx6_pcie->tx_swing_low = 127; in imx6_pcie_probe()
1134 pci->link_gen = 1; in imx6_pcie_probe()
1135 ret = of_property_read_u32(node, "fsl,max-link-speed", &pci->link_gen); in imx6_pcie_probe()
1137 imx6_pcie->vpcie = devm_regulator_get_optional(&pdev->dev, "vpcie"); in imx6_pcie_probe()
1138 if (IS_ERR(imx6_pcie->vpcie)) { in imx6_pcie_probe()
1139 if (PTR_ERR(imx6_pcie->vpcie) != -ENODEV) in imx6_pcie_probe()
1140 return PTR_ERR(imx6_pcie->vpcie); in imx6_pcie_probe()
1141 imx6_pcie->vpcie = NULL; in imx6_pcie_probe()
1144 imx6_pcie->vph = devm_regulator_get_optional(&pdev->dev, "vph"); in imx6_pcie_probe()
1145 if (IS_ERR(imx6_pcie->vph)) { in imx6_pcie_probe()
1146 if (PTR_ERR(imx6_pcie->vph) != -ENODEV) in imx6_pcie_probe()
1147 return PTR_ERR(imx6_pcie->vph); in imx6_pcie_probe()
1148 imx6_pcie->vph = NULL; in imx6_pcie_probe()
1157 ret = dw_pcie_host_init(&pci->pp); in imx6_pcie_probe()
1180 [IMX6Q] = {
1181 .variant = IMX6Q,
1208 { .compatible = "fsl,imx6q-pcie", .data = &drvdata[IMX6Q], },
1209 { .compatible = "fsl,imx6sx-pcie", .data = &drvdata[IMX6SX], },
1210 { .compatible = "fsl,imx6qp-pcie", .data = &drvdata[IMX6QP], },
1211 { .compatible = "fsl,imx7d-pcie", .data = &drvdata[IMX7D], },
1212 { .compatible = "fsl,imx8mq-pcie", .data = &drvdata[IMX8MQ], } ,
1218 .name = "imx6q-pcie",
1230 struct pci_bus *bus = dev->bus; in imx6_pcie_quirk()
1231 struct pcie_port *pp = bus->sysdata; in imx6_pcie_quirk()
1234 if (!bus->dev.parent || !bus->dev.parent->parent) in imx6_pcie_quirk()
1238 if (bus->dev.parent->parent->driver != &imx6_pcie_driver.driver) in imx6_pcie_quirk()
1249 if (imx6_pcie->drvdata->dbi_length) { in imx6_pcie_quirk()
1250 dev->cfg_size = imx6_pcie->drvdata->dbi_length; in imx6_pcie_quirk()
1251 dev_info(&dev->dev, "Limiting cfg_size to %d\n", in imx6_pcie_quirk()
1252 dev->cfg_size); in imx6_pcie_quirk()
1265 * by kernel and since imx6q_pcie_abort_handler() is a no-op, in imx6_pcie_init()
1270 "external abort on non-linefetch"); in imx6_pcie_init()