Lines Matching refs:rtwdev
68 static void rtw8723d_lck(struct rtw_dev *rtwdev) in rtw8723d_lck() argument
74 val_ctx = rtw_read8(rtwdev, REG_CTX); in rtw8723d_lck()
76 rtw_write8(rtwdev, REG_CTX, val_ctx & ~BIT_MASK_CTX_TYPE); in rtw8723d_lck()
78 rtw_write8(rtwdev, REG_TXPAUSE, 0xFF); in rtw8723d_lck()
79 lc_cal = rtw_read_rf(rtwdev, RF_PATH_A, RF_CFGCH, RFREG_MASK); in rtw8723d_lck()
81 rtw_write_rf(rtwdev, RF_PATH_A, RF_CFGCH, RFREG_MASK, lc_cal | BIT_LCK); in rtw8723d_lck()
85 rtwdev, RF_PATH_A, RF_CFGCH, BIT_LCK); in rtw8723d_lck()
87 rtw_warn(rtwdev, "failed to poll LCK status bit\n"); in rtw8723d_lck()
89 rtw_write_rf(rtwdev, RF_PATH_A, RF_CFGCH, RFREG_MASK, lc_cal); in rtw8723d_lck()
91 rtw_write8(rtwdev, REG_CTX, val_ctx); in rtw8723d_lck()
93 rtw_write8(rtwdev, REG_TXPAUSE, 0x00); in rtw8723d_lck()
118 static void rtw8723d_pwrtrack_init(struct rtw_dev *rtwdev) in rtw8723d_pwrtrack_init() argument
120 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw8723d_pwrtrack_init()
125 for (path = RF_PATH_A; path < rtwdev->hal.rf_path_num; path++) { in rtw8723d_pwrtrack_init()
131 dm_info->thermal_meter_k = rtwdev->efuse.thermal_meter_k; in rtw8723d_pwrtrack_init()
136 static void rtw8723d_phy_set_param(struct rtw_dev *rtwdev) in rtw8723d_phy_set_param() argument
142 rtw_write16_set(rtwdev, REG_SYS_FUNC_EN, in rtw8723d_phy_set_param()
144 rtw_write8_set(rtwdev, REG_RF_CTRL, in rtw8723d_phy_set_param()
146 rtw_write8(rtwdev, REG_AFE_CTRL1 + 1, 0x80); in rtw8723d_phy_set_param()
148 rtw_phy_load_tables(rtwdev); in rtw8723d_phy_set_param()
151 rtw_write32_clr(rtwdev, REG_RCR, BIT_RCR_ADF); in rtw8723d_phy_set_param()
152 rtw_write8_set(rtwdev, REG_HIQ_NO_LMT_EN, BIT_HIQ_NO_LMT_EN_ROOT); in rtw8723d_phy_set_param()
153 rtw_write16_set(rtwdev, REG_AFE_CTRL_4, BIT_CK320M_AFE_EN | BIT_EN_SYN); in rtw8723d_phy_set_param()
155 xtal_cap = rtwdev->efuse.crystal_cap & 0x3F; in rtw8723d_phy_set_param()
156 rtw_write32_mask(rtwdev, REG_AFE_CTRL3, BIT_MASK_XTAL, in rtw8723d_phy_set_param()
158 rtw_write32_set(rtwdev, REG_FPGA0_RFMOD, BIT_CCKEN | BIT_OFDMEN); in rtw8723d_phy_set_param()
159 if ((rtwdev->efuse.afe >> 4) == 14) { in rtw8723d_phy_set_param()
160 rtw_write32_set(rtwdev, REG_AFE_CTRL3, BIT_XTAL_GMP_BIT4); in rtw8723d_phy_set_param()
161 rtw_write32_clr(rtwdev, REG_AFE_CTRL1, BITS_PLL); in rtw8723d_phy_set_param()
162 rtw_write32_set(rtwdev, REG_LDO_SWR_CTRL, BIT_XTA1); in rtw8723d_phy_set_param()
163 rtw_write32_clr(rtwdev, REG_LDO_SWR_CTRL, BIT_XTA0); in rtw8723d_phy_set_param()
166 rtw_write8(rtwdev, REG_SLOT, WLAN_SLOT_TIME); in rtw8723d_phy_set_param()
167 rtw_write8(rtwdev, REG_FWHW_TXQ_CTRL + 1, WLAN_TXQ_RPT_EN); in rtw8723d_phy_set_param()
168 rtw_write16(rtwdev, REG_RETRY_LIMIT, WLAN_RL_VAL); in rtw8723d_phy_set_param()
169 rtw_write32(rtwdev, REG_BAR_MODE_CTRL, WLAN_BAR_VAL); in rtw8723d_phy_set_param()
170 rtw_write8(rtwdev, REG_ATIMWND, 0x2); in rtw8723d_phy_set_param()
171 rtw_write8(rtwdev, REG_BCN_CTRL, in rtw8723d_phy_set_param()
173 val32 = rtw_read32(rtwdev, REG_TBTT_PROHIBIT); in rtw8723d_phy_set_param()
176 rtw_write8(rtwdev, REG_TBTT_PROHIBIT, val32); in rtw8723d_phy_set_param()
177 rtw_write8(rtwdev, REG_PIFS, WLAN_PIFS_VAL); in rtw8723d_phy_set_param()
178 rtw_write8(rtwdev, REG_AGGR_BREAK_TIME, WLAN_AGG_BRK_TIME); in rtw8723d_phy_set_param()
179 rtw_write16(rtwdev, REG_NAV_PROT_LEN, WLAN_NAV_PROT_LEN); in rtw8723d_phy_set_param()
180 rtw_write16(rtwdev, REG_MAC_SPEC_SIFS, WLAN_SPEC_SIFS); in rtw8723d_phy_set_param()
181 rtw_write16(rtwdev, REG_SIFS, WLAN_SPEC_SIFS); in rtw8723d_phy_set_param()
182 rtw_write16(rtwdev, REG_SIFS + 2, WLAN_SPEC_SIFS); in rtw8723d_phy_set_param()
183 rtw_write8(rtwdev, REG_SINGLE_AMPDU_CTRL, BIT_EN_SINGLE_APMDU); in rtw8723d_phy_set_param()
184 rtw_write8(rtwdev, REG_RX_PKT_LIMIT, WLAN_RX_PKT_LIMIT); in rtw8723d_phy_set_param()
185 rtw_write8(rtwdev, REG_MAX_AGGR_NUM, WLAN_MAX_AGG_NR); in rtw8723d_phy_set_param()
186 rtw_write8(rtwdev, REG_AMPDU_MAX_TIME, WLAN_AMPDU_MAX_TIME); in rtw8723d_phy_set_param()
187 rtw_write8(rtwdev, REG_LEDCFG2, WLAN_ANT_SEL); in rtw8723d_phy_set_param()
189 rtw_write32(rtwdev, REG_LTR_IDLE_LATENCY, WLAN_LTR_IDLE_LAT); in rtw8723d_phy_set_param()
190 rtw_write32(rtwdev, REG_LTR_ACTIVE_LATENCY, WLAN_LTR_ACT_LAT); in rtw8723d_phy_set_param()
191 rtw_write32(rtwdev, REG_LTR_CTRL_BASIC, WLAN_LTR_CTRL1); in rtw8723d_phy_set_param()
192 rtw_write32(rtwdev, REG_LTR_CTRL_BASIC + 4, WLAN_LTR_CTRL2); in rtw8723d_phy_set_param()
194 rtw_phy_init(rtwdev); in rtw8723d_phy_set_param()
195 rtwdev->dm_info.cck_pd_default = rtw_read8(rtwdev, REG_CSRATIO) & 0x1f; in rtw8723d_phy_set_param()
197 rtw_write16_set(rtwdev, REG_TXDMA_OFFSET_CHK, BIT_DROP_DATA_EN); in rtw8723d_phy_set_param()
199 rtw8723d_lck(rtwdev); in rtw8723d_phy_set_param()
201 rtw_write32_mask(rtwdev, REG_OFDM0_XAAGC1, MASKBYTE0, 0x50); in rtw8723d_phy_set_param()
202 rtw_write32_mask(rtwdev, REG_OFDM0_XAAGC1, MASKBYTE0, 0x20); in rtw8723d_phy_set_param()
204 rtw8723d_pwrtrack_init(rtwdev); in rtw8723d_phy_set_param()
213 static int rtw8723d_read_efuse(struct rtw_dev *rtwdev, u8 *log_map) in rtw8723d_read_efuse() argument
215 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8723d_read_efuse()
238 switch (rtw_hci_type(rtwdev)) { in rtw8723d_read_efuse()
250 static void query_phy_status_page0(struct rtw_dev *rtwdev, u8 *phy_status, in query_phy_status_page0() argument
253 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in query_phy_status_page0()
265 static void query_phy_status_page1(struct rtw_dev *rtwdev, u8 *phy_status, in query_phy_status_page1() argument
268 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in query_phy_status_page1()
304 static void query_phy_status(struct rtw_dev *rtwdev, u8 *phy_status, in query_phy_status() argument
313 query_phy_status_page0(rtwdev, phy_status, pkt_stat); in query_phy_status()
316 query_phy_status_page1(rtwdev, phy_status, pkt_stat); in query_phy_status()
319 rtw_warn(rtwdev, "unused phy status page (%d)\n", page); in query_phy_status()
324 static void rtw8723d_query_rx_desc(struct rtw_dev *rtwdev, u8 *rx_desc, in rtw8723d_query_rx_desc() argument
329 u32 desc_sz = rtwdev->chip->rx_pkt_desc_sz; in rtw8723d_query_rx_desc()
359 query_phy_status(rtwdev, phy_status, pkt_stat); in rtw8723d_query_rx_desc()
362 rtw_rx_fill_rx_status(rtwdev, pkt_stat, hdr, rx_status, phy_status); in rtw8723d_query_rx_desc()
365 static bool rtw8723d_check_spur_ov_thres(struct rtw_dev *rtwdev, in rtw8723d_check_spur_ov_thres() argument
378 rtw_write32(rtwdev, REG_ANALOG_P4, DIS_3WIRE); in rtw8723d_check_spur_ov_thres()
379 rtw_write32(rtwdev, REG_PSDFN, freq); in rtw8723d_check_spur_ov_thres()
380 rtw_write32(rtwdev, REG_PSDFN, START_PSD | freq); in rtw8723d_check_spur_ov_thres()
383 if (rtw_read32(rtwdev, REG_PSDRPT) >= thres) in rtw8723d_check_spur_ov_thres()
386 rtw_write32(rtwdev, REG_PSDFN, freq); in rtw8723d_check_spur_ov_thres()
387 rtw_write32(rtwdev, REG_ANALOG_P4, EN_3WIRE); in rtw8723d_check_spur_ov_thres()
392 static void rtw8723d_cfg_notch(struct rtw_dev *rtwdev, u8 channel, bool notch) in rtw8723d_cfg_notch() argument
395 rtw_write32_mask(rtwdev, REG_OFDM0_RXDSP, BIT_MASK_RXDSP, 0x1f); in rtw8723d_cfg_notch()
396 rtw_write32_mask(rtwdev, REG_OFDM0_RXDSP, BIT_EN_RXDSP, 0x0); in rtw8723d_cfg_notch()
397 rtw_write32(rtwdev, REG_OFDM1_CSI1, 0x00000000); in rtw8723d_cfg_notch()
398 rtw_write32(rtwdev, REG_OFDM1_CSI2, 0x00000000); in rtw8723d_cfg_notch()
399 rtw_write32(rtwdev, REG_OFDM1_CSI3, 0x00000000); in rtw8723d_cfg_notch()
400 rtw_write32(rtwdev, REG_OFDM1_CSI4, 0x00000000); in rtw8723d_cfg_notch()
401 rtw_write32_mask(rtwdev, REG_OFDM1_CFOTRK, BIT_EN_CFOTRK, 0x0); in rtw8723d_cfg_notch()
407 rtw_write32_mask(rtwdev, REG_OFDM0_RXDSP, BIT_MASK_RXDSP, 0xb); in rtw8723d_cfg_notch()
408 rtw_write32_mask(rtwdev, REG_OFDM0_RXDSP, BIT_EN_RXDSP, 0x1); in rtw8723d_cfg_notch()
409 rtw_write32(rtwdev, REG_OFDM1_CSI1, 0x04000000); in rtw8723d_cfg_notch()
410 rtw_write32(rtwdev, REG_OFDM1_CSI2, 0x00000000); in rtw8723d_cfg_notch()
411 rtw_write32(rtwdev, REG_OFDM1_CSI3, 0x00000000); in rtw8723d_cfg_notch()
412 rtw_write32(rtwdev, REG_OFDM1_CSI4, 0x00000000); in rtw8723d_cfg_notch()
413 rtw_write32_mask(rtwdev, REG_OFDM1_CFOTRK, BIT_EN_CFOTRK, 0x1); in rtw8723d_cfg_notch()
416 rtw_write32_mask(rtwdev, REG_OFDM0_RXDSP, BIT_MASK_RXDSP, 0x5); in rtw8723d_cfg_notch()
417 rtw_write32_mask(rtwdev, REG_OFDM0_RXDSP, BIT_EN_RXDSP, 0x1); in rtw8723d_cfg_notch()
418 rtw_write32(rtwdev, REG_OFDM1_CSI1, 0x00000000); in rtw8723d_cfg_notch()
419 rtw_write32(rtwdev, REG_OFDM1_CSI2, 0x00000000); in rtw8723d_cfg_notch()
420 rtw_write32(rtwdev, REG_OFDM1_CSI3, 0x00000000); in rtw8723d_cfg_notch()
421 rtw_write32(rtwdev, REG_OFDM1_CSI4, 0x00080000); in rtw8723d_cfg_notch()
422 rtw_write32_mask(rtwdev, REG_OFDM1_CFOTRK, BIT_EN_CFOTRK, 0x1); in rtw8723d_cfg_notch()
425 rtw_write32_mask(rtwdev, REG_OFDM0_RXDSP, BIT_EN_RXDSP, 0x0); in rtw8723d_cfg_notch()
426 rtw_write32_mask(rtwdev, REG_OFDM1_CFOTRK, BIT_EN_CFOTRK, 0x0); in rtw8723d_cfg_notch()
431 static void rtw8723d_spur_cal(struct rtw_dev *rtwdev, u8 channel) in rtw8723d_spur_cal() argument
436 rtw8723d_cfg_notch(rtwdev, channel, false); in rtw8723d_spur_cal()
440 notch = rtw8723d_check_spur_ov_thres(rtwdev, channel, SPUR_THRES); in rtw8723d_spur_cal()
441 rtw8723d_cfg_notch(rtwdev, channel, notch); in rtw8723d_spur_cal()
444 static void rtw8723d_set_channel_rf(struct rtw_dev *rtwdev, u8 channel, u8 bw) in rtw8723d_set_channel_rf() argument
448 rf_cfgch_a = rtw_read_rf(rtwdev, RF_PATH_A, RF_CFGCH, RFREG_MASK); in rtw8723d_set_channel_rf()
449 rf_cfgch_b = rtw_read_rf(rtwdev, RF_PATH_B, RF_CFGCH, RFREG_MASK); in rtw8723d_set_channel_rf()
468 rtw_write_rf(rtwdev, RF_PATH_A, RF_CFGCH, RFREG_MASK, rf_cfgch_a); in rtw8723d_set_channel_rf()
469 rtw_write_rf(rtwdev, RF_PATH_B, RF_CFGCH, RFREG_MASK, rf_cfgch_b); in rtw8723d_set_channel_rf()
471 rtw8723d_spur_cal(rtwdev, channel); in rtw8723d_set_channel_rf()
487 static void rtw8723d_set_channel_bb(struct rtw_dev *rtwdev, u8 channel, u8 bw, in rtw8723d_set_channel_bb() argument
496 rtw_write32(rtwdev, cck_dfir->reg, cck_dfir->val); in rtw8723d_set_channel_bb()
500 rtw_write32_mask(rtwdev, REG_FPGA0_RFMOD, BIT_MASK_RFMOD, 0x0); in rtw8723d_set_channel_bb()
501 rtw_write32_mask(rtwdev, REG_FPGA1_RFMOD, BIT_MASK_RFMOD, 0x0); in rtw8723d_set_channel_bb()
502 rtw_write32_mask(rtwdev, REG_BBRX_DFIR, BIT_RXBB_DFIR_EN, 1); in rtw8723d_set_channel_bb()
503 rtw_write32_mask(rtwdev, REG_BBRX_DFIR, BIT_MASK_RXBB_DFIR, 0xa); in rtw8723d_set_channel_bb()
506 rtw_write32_mask(rtwdev, REG_FPGA0_RFMOD, BIT_MASK_RFMOD, 0x1); in rtw8723d_set_channel_bb()
507 rtw_write32_mask(rtwdev, REG_FPGA1_RFMOD, BIT_MASK_RFMOD, 0x1); in rtw8723d_set_channel_bb()
508 rtw_write32_mask(rtwdev, REG_BBRX_DFIR, BIT_RXBB_DFIR_EN, 0); in rtw8723d_set_channel_bb()
509 rtw_write32_mask(rtwdev, REG_CCK0_SYS, BIT_CCK_SIDE_BAND, in rtw8723d_set_channel_bb()
517 static void rtw8723d_set_channel(struct rtw_dev *rtwdev, u8 channel, u8 bw, in rtw8723d_set_channel() argument
520 rtw8723d_set_channel_rf(rtwdev, channel, bw); in rtw8723d_set_channel()
521 rtw_set_channel_mac(rtwdev, channel, bw, primary_chan_idx); in rtw8723d_set_channel()
522 rtw8723d_set_channel_bb(rtwdev, channel, bw, primary_chan_idx); in rtw8723d_set_channel()
535 static int rtw8723d_mac_init(struct rtw_dev *rtwdev) in rtw8723d_mac_init() argument
537 rtw_write8(rtwdev, REG_FWHW_TXQ_CTRL + 1, WLAN_TXQ_RPT_EN); in rtw8723d_mac_init()
538 rtw_write32(rtwdev, REG_TCR, BIT_TCR_CFG); in rtw8723d_mac_init()
540 rtw_write16(rtwdev, REG_RXFLTMAP0, WLAN_RX_FILTER0); in rtw8723d_mac_init()
541 rtw_write16(rtwdev, REG_RXFLTMAP1, WLAN_RX_FILTER1); in rtw8723d_mac_init()
542 rtw_write16(rtwdev, REG_RXFLTMAP2, WLAN_RX_FILTER2); in rtw8723d_mac_init()
543 rtw_write32(rtwdev, REG_RCR, WLAN_RCR_CFG); in rtw8723d_mac_init()
545 rtw_write32(rtwdev, REG_INT_MIG, 0); in rtw8723d_mac_init()
546 rtw_write32(rtwdev, REG_MCUTST_1, 0x0); in rtw8723d_mac_init()
548 rtw_write8(rtwdev, REG_MISC_CTRL, BIT_DIS_SECOND_CCA); in rtw8723d_mac_init()
549 rtw_write8(rtwdev, REG_2ND_CCA_CTRL, 0); in rtw8723d_mac_init()
554 static void rtw8723d_shutdown(struct rtw_dev *rtwdev) in rtw8723d_shutdown() argument
556 rtw_write16_set(rtwdev, REG_HCI_OPT_CTRL, BIT_USB_SUS_DIS); in rtw8723d_shutdown()
559 static void rtw8723d_cfg_ldo25(struct rtw_dev *rtwdev, bool enable) in rtw8723d_cfg_ldo25() argument
563 ldo_pwr = rtw_read8(rtwdev, REG_LDO_EFUSE_CTRL + 3); in rtw8723d_cfg_ldo25()
570 rtw_write8(rtwdev, REG_LDO_EFUSE_CTRL + 3, ldo_pwr); in rtw8723d_cfg_ldo25()
574 rtw8723d_set_tx_power_index_by_rate(struct rtw_dev *rtwdev, u8 path, u8 rs) in rtw8723d_set_tx_power_index_by_rate() argument
576 struct rtw_hal *hal = &rtwdev->hal; in rtw8723d_set_tx_power_index_by_rate()
586 rtw_warn(rtwdev, "rate 0x%x isn't supported\n", rate); in rtw8723d_set_tx_power_index_by_rate()
591 rtw_warn(rtwdev, "rate 0x%x isn't defined\n", rate); in rtw8723d_set_tx_power_index_by_rate()
595 rtw_write32_mask(rtwdev, txagc->addr, txagc->mask, pwr_index); in rtw8723d_set_tx_power_index_by_rate()
599 static void rtw8723d_set_tx_power_index(struct rtw_dev *rtwdev) in rtw8723d_set_tx_power_index() argument
601 struct rtw_hal *hal = &rtwdev->hal; in rtw8723d_set_tx_power_index()
606 rtw8723d_set_tx_power_index_by_rate(rtwdev, path, rs); in rtw8723d_set_tx_power_index()
610 static void rtw8723d_efuse_grant(struct rtw_dev *rtwdev, bool on) in rtw8723d_efuse_grant() argument
613 rtw_write8(rtwdev, REG_EFUSE_ACCESS, EFUSE_ACCESS_ON); in rtw8723d_efuse_grant()
615 rtw_write16_set(rtwdev, REG_SYS_FUNC_EN, BIT_FEN_ELDR); in rtw8723d_efuse_grant()
616 rtw_write16_set(rtwdev, REG_SYS_CLKR, BIT_LOADER_CLK_EN | BIT_ANA8M); in rtw8723d_efuse_grant()
618 rtw_write8(rtwdev, REG_EFUSE_ACCESS, EFUSE_ACCESS_OFF); in rtw8723d_efuse_grant()
622 static void rtw8723d_false_alarm_statistics(struct rtw_dev *rtwdev) in rtw8723d_false_alarm_statistics() argument
624 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw8723d_false_alarm_statistics()
631 rtw_write32_mask(rtwdev, REG_OFDM_FA_HOLDC_11N, BIT_MASK_OFDM_FA_KEEP, 1); in rtw8723d_false_alarm_statistics()
632 rtw_write32_mask(rtwdev, REG_OFDM_FA_RSTD_11N, BIT_MASK_OFDM_FA_KEEP1, 1); in rtw8723d_false_alarm_statistics()
633 rtw_write32_mask(rtwdev, REG_CCK_FA_RST_11N, BIT_MASK_CCK_CNT_KEEP, 1); in rtw8723d_false_alarm_statistics()
634 rtw_write32_mask(rtwdev, REG_CCK_FA_RST_11N, BIT_MASK_CCK_FA_KEEP, 1); in rtw8723d_false_alarm_statistics()
636 cck_fa_cnt = rtw_read32_mask(rtwdev, REG_CCK_FA_LSB_11N, MASKBYTE0); in rtw8723d_false_alarm_statistics()
637 cck_fa_cnt += rtw_read32_mask(rtwdev, REG_CCK_FA_MSB_11N, MASKBYTE3) << 8; in rtw8723d_false_alarm_statistics()
639 val32 = rtw_read32(rtwdev, REG_OFDM_FA_TYPE1_11N); in rtw8723d_false_alarm_statistics()
642 val32 = rtw_read32(rtwdev, REG_OFDM_FA_TYPE2_11N); in rtw8723d_false_alarm_statistics()
645 val32 = rtw_read32(rtwdev, REG_OFDM_FA_TYPE3_11N); in rtw8723d_false_alarm_statistics()
648 val32 = rtw_read32(rtwdev, REG_OFDM_FA_TYPE4_11N); in rtw8723d_false_alarm_statistics()
655 dm_info->cck_err_cnt = rtw_read32(rtwdev, REG_IGI_C_11N); in rtw8723d_false_alarm_statistics()
656 dm_info->cck_ok_cnt = rtw_read32(rtwdev, REG_IGI_D_11N); in rtw8723d_false_alarm_statistics()
657 crc32_cnt = rtw_read32(rtwdev, REG_OFDM_CRC32_CNT_11N); in rtw8723d_false_alarm_statistics()
660 crc32_cnt = rtw_read32(rtwdev, REG_HT_CRC32_CNT_11N); in rtw8723d_false_alarm_statistics()
666 val32 = rtw_read32(rtwdev, REG_CCK_CCA_CNT_11N); in rtw8723d_false_alarm_statistics()
672 rtw_write32_mask(rtwdev, REG_OFDM_FA_RSTC_11N, BIT_MASK_OFDM_FA_RST, 1); in rtw8723d_false_alarm_statistics()
673 rtw_write32_mask(rtwdev, REG_OFDM_FA_RSTC_11N, BIT_MASK_OFDM_FA_RST, 0); in rtw8723d_false_alarm_statistics()
674 rtw_write32_mask(rtwdev, REG_OFDM_FA_RSTD_11N, BIT_MASK_OFDM_FA_RST1, 1); in rtw8723d_false_alarm_statistics()
675 rtw_write32_mask(rtwdev, REG_OFDM_FA_RSTD_11N, BIT_MASK_OFDM_FA_RST1, 0); in rtw8723d_false_alarm_statistics()
676 rtw_write32_mask(rtwdev, REG_OFDM_FA_HOLDC_11N, BIT_MASK_OFDM_FA_KEEP, 0); in rtw8723d_false_alarm_statistics()
677 rtw_write32_mask(rtwdev, REG_OFDM_FA_RSTD_11N, BIT_MASK_OFDM_FA_KEEP1, 0); in rtw8723d_false_alarm_statistics()
678 rtw_write32_mask(rtwdev, REG_CCK_FA_RST_11N, BIT_MASK_CCK_CNT_KPEN, 0); in rtw8723d_false_alarm_statistics()
679 rtw_write32_mask(rtwdev, REG_CCK_FA_RST_11N, BIT_MASK_CCK_CNT_KPEN, 2); in rtw8723d_false_alarm_statistics()
680 rtw_write32_mask(rtwdev, REG_CCK_FA_RST_11N, BIT_MASK_CCK_FA_KPEN, 0); in rtw8723d_false_alarm_statistics()
681 rtw_write32_mask(rtwdev, REG_CCK_FA_RST_11N, BIT_MASK_CCK_FA_KPEN, 2); in rtw8723d_false_alarm_statistics()
682 rtw_write32_mask(rtwdev, REG_PAGE_F_RST_11N, BIT_MASK_F_RST_ALL, 1); in rtw8723d_false_alarm_statistics()
683 rtw_write32_mask(rtwdev, REG_PAGE_F_RST_11N, BIT_MASK_F_RST_ALL, 0); in rtw8723d_false_alarm_statistics()
719 static void rtw8723d_iqk_backup_regs(struct rtw_dev *rtwdev, in rtw8723d_iqk_backup_regs() argument
725 backup->adda[i] = rtw_read32(rtwdev, iqk_adda_regs[i]); in rtw8723d_iqk_backup_regs()
728 backup->mac8[i] = rtw_read8(rtwdev, iqk_mac8_regs[i]); in rtw8723d_iqk_backup_regs()
730 backup->mac32[i] = rtw_read32(rtwdev, iqk_mac32_regs[i]); in rtw8723d_iqk_backup_regs()
733 backup->bb[i] = rtw_read32(rtwdev, iqk_bb_regs[i]); in rtw8723d_iqk_backup_regs()
735 backup->igia = rtw_read32_mask(rtwdev, REG_OFDM0_XAAGC1, MASKBYTE0); in rtw8723d_iqk_backup_regs()
736 backup->igib = rtw_read32_mask(rtwdev, REG_OFDM0_XBAGC1, MASKBYTE0); in rtw8723d_iqk_backup_regs()
738 backup->bb_sel_btg = rtw_read32(rtwdev, REG_BB_SEL_BTG); in rtw8723d_iqk_backup_regs()
741 static void rtw8723d_iqk_restore_regs(struct rtw_dev *rtwdev, in rtw8723d_iqk_restore_regs() argument
747 rtw_write32(rtwdev, iqk_adda_regs[i], backup->adda[i]); in rtw8723d_iqk_restore_regs()
750 rtw_write8(rtwdev, iqk_mac8_regs[i], backup->mac8[i]); in rtw8723d_iqk_restore_regs()
752 rtw_write32(rtwdev, iqk_mac32_regs[i], backup->mac32[i]); in rtw8723d_iqk_restore_regs()
755 rtw_write32(rtwdev, iqk_bb_regs[i], backup->bb[i]); in rtw8723d_iqk_restore_regs()
757 rtw_write32_mask(rtwdev, REG_OFDM0_XAAGC1, MASKBYTE0, 0x50); in rtw8723d_iqk_restore_regs()
758 rtw_write32_mask(rtwdev, REG_OFDM0_XAAGC1, MASKBYTE0, backup->igia); in rtw8723d_iqk_restore_regs()
760 rtw_write32_mask(rtwdev, REG_OFDM0_XBAGC1, MASKBYTE0, 0x50); in rtw8723d_iqk_restore_regs()
761 rtw_write32_mask(rtwdev, REG_OFDM0_XBAGC1, MASKBYTE0, backup->igib); in rtw8723d_iqk_restore_regs()
763 rtw_write32(rtwdev, REG_TXIQK_TONE_A_11N, 0x01008c00); in rtw8723d_iqk_restore_regs()
764 rtw_write32(rtwdev, REG_RXIQK_TONE_A_11N, 0x01008c00); in rtw8723d_iqk_restore_regs()
767 static void rtw8723d_iqk_backup_path_ctrl(struct rtw_dev *rtwdev, in rtw8723d_iqk_backup_path_ctrl() argument
770 backup->btg_sel = rtw_read8(rtwdev, REG_BTG_SEL); in rtw8723d_iqk_backup_path_ctrl()
771 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] original 0x67 = 0x%x\n", in rtw8723d_iqk_backup_path_ctrl()
775 static void rtw8723d_iqk_config_path_ctrl(struct rtw_dev *rtwdev) in rtw8723d_iqk_config_path_ctrl() argument
777 rtw_write32_mask(rtwdev, REG_PAD_CTRL1, BIT_BT_BTG_SEL, 0x1); in rtw8723d_iqk_config_path_ctrl()
778 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] set 0x67 = 0x%x\n", in rtw8723d_iqk_config_path_ctrl()
779 rtw_read32_mask(rtwdev, REG_PAD_CTRL1, MASKBYTE3)); in rtw8723d_iqk_config_path_ctrl()
782 static void rtw8723d_iqk_restore_path_ctrl(struct rtw_dev *rtwdev, in rtw8723d_iqk_restore_path_ctrl() argument
785 rtw_write8(rtwdev, REG_BTG_SEL, backup->btg_sel); in rtw8723d_iqk_restore_path_ctrl()
786 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] restore 0x67 = 0x%x\n", in rtw8723d_iqk_restore_path_ctrl()
787 rtw_read32_mask(rtwdev, REG_PAD_CTRL1, MASKBYTE3)); in rtw8723d_iqk_restore_path_ctrl()
790 static void rtw8723d_iqk_backup_lte_path_gnt(struct rtw_dev *rtwdev, in rtw8723d_iqk_backup_lte_path_gnt() argument
793 backup->lte_path = rtw_read32(rtwdev, REG_LTECOEX_PATH_CONTROL); in rtw8723d_iqk_backup_lte_path_gnt()
794 rtw_write32(rtwdev, REG_LTECOEX_CTRL, 0x800f0038); in rtw8723d_iqk_backup_lte_path_gnt()
796 backup->lte_gnt = rtw_read32(rtwdev, REG_LTECOEX_READ_DATA); in rtw8723d_iqk_backup_lte_path_gnt()
797 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] OriginalGNT = 0x%x\n", in rtw8723d_iqk_backup_lte_path_gnt()
801 static void rtw8723d_iqk_config_lte_path_gnt(struct rtw_dev *rtwdev) in rtw8723d_iqk_config_lte_path_gnt() argument
803 rtw_write32(rtwdev, REG_LTECOEX_WRITE_DATA, 0x0000ff00); in rtw8723d_iqk_config_lte_path_gnt()
804 rtw_write32(rtwdev, REG_LTECOEX_CTRL, 0xc0020038); in rtw8723d_iqk_config_lte_path_gnt()
805 rtw_write32_mask(rtwdev, REG_LTECOEX_PATH_CONTROL, BIT_LTE_MUX_CTRL_PATH, 0x1); in rtw8723d_iqk_config_lte_path_gnt()
808 static void rtw8723d_iqk_restore_lte_path_gnt(struct rtw_dev *rtwdev, in rtw8723d_iqk_restore_lte_path_gnt() argument
811 rtw_write32(rtwdev, REG_LTECOEX_WRITE_DATA, bak->lte_gnt); in rtw8723d_iqk_restore_lte_path_gnt()
812 rtw_write32(rtwdev, REG_LTECOEX_CTRL, 0xc00f0038); in rtw8723d_iqk_restore_lte_path_gnt()
813 rtw_write32(rtwdev, REG_LTECOEX_PATH_CONTROL, bak->lte_path); in rtw8723d_iqk_restore_lte_path_gnt()
856 static u8 rtw8723d_iqk_check_tx_failed(struct rtw_dev *rtwdev, in rtw8723d_iqk_check_tx_failed() argument
862 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] 0xeac = 0x%x\n", in rtw8723d_iqk_check_tx_failed()
863 rtw_read32(rtwdev, REG_IQK_RES_RY)); in rtw8723d_iqk_check_tx_failed()
864 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] 0xe94 = 0x%x, 0xe9c = 0x%x\n", in rtw8723d_iqk_check_tx_failed()
865 rtw_read32(rtwdev, REG_IQK_RES_TX), in rtw8723d_iqk_check_tx_failed()
866 rtw_read32(rtwdev, REG_IQK_RES_TY)); in rtw8723d_iqk_check_tx_failed()
867 rtw_dbg(rtwdev, RTW_DBG_RFK, in rtw8723d_iqk_check_tx_failed()
869 rtw_read32(rtwdev, 0xe90), in rtw8723d_iqk_check_tx_failed()
870 rtw_read32(rtwdev, 0xe98)); in rtw8723d_iqk_check_tx_failed()
872 tx_fail = rtw_read32_mask(rtwdev, REG_IQK_RES_RY, BIT_IQK_TX_FAIL); in rtw8723d_iqk_check_tx_failed()
873 tx_x = rtw_read32_mask(rtwdev, REG_IQK_RES_TX, BIT_MASK_RES_TX); in rtw8723d_iqk_check_tx_failed()
874 tx_y = rtw_read32_mask(rtwdev, REG_IQK_RES_TY, BIT_MASK_RES_TY); in rtw8723d_iqk_check_tx_failed()
879 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] %s TXIQK is failed\n", in rtw8723d_iqk_check_tx_failed()
885 static u8 rtw8723d_iqk_check_rx_failed(struct rtw_dev *rtwdev, in rtw8723d_iqk_check_rx_failed() argument
891 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] 0xea4 = 0x%x, 0xeac = 0x%x\n", in rtw8723d_iqk_check_rx_failed()
892 rtw_read32(rtwdev, REG_IQK_RES_RX), in rtw8723d_iqk_check_rx_failed()
893 rtw_read32(rtwdev, REG_IQK_RES_RY)); in rtw8723d_iqk_check_rx_failed()
895 rtw_dbg(rtwdev, RTW_DBG_RFK, in rtw8723d_iqk_check_rx_failed()
897 rtw_read32(rtwdev, 0xea0), in rtw8723d_iqk_check_rx_failed()
898 rtw_read32(rtwdev, 0xea8)); in rtw8723d_iqk_check_rx_failed()
900 rx_fail = rtw_read32_mask(rtwdev, REG_IQK_RES_RY, BIT_IQK_RX_FAIL); in rtw8723d_iqk_check_rx_failed()
901 rx_x = rtw_read32_mask(rtwdev, REG_IQK_RES_RX, BIT_MASK_RES_RX); in rtw8723d_iqk_check_rx_failed()
902 rx_y = rtw_read32_mask(rtwdev, REG_IQK_RES_RY, BIT_MASK_RES_RY); in rtw8723d_iqk_check_rx_failed()
909 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] %s RXIQK STEP2 is failed\n", in rtw8723d_iqk_check_rx_failed()
915 static void rtw8723d_iqk_one_shot(struct rtw_dev *rtwdev, bool tx, in rtw8723d_iqk_one_shot() argument
921 rtw_write32_mask(rtwdev, REG_FPGA0_IQK_11N, BIT_MASK_IQK_MOD, EN_IQK); in rtw8723d_iqk_one_shot()
922 rtw8723d_iqk_config_lte_path_gnt(rtwdev); in rtw8723d_iqk_one_shot()
924 rtw_write32(rtwdev, REG_LTECOEX_CTRL, 0x800f0054); in rtw8723d_iqk_one_shot()
926 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] GNT_BT @%s %sIQK1 = 0x%x\n", in rtw8723d_iqk_one_shot()
928 rtw_read32(rtwdev, REG_LTECOEX_READ_DATA)); in rtw8723d_iqk_one_shot()
929 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] 0x948 @%s %sIQK1 = 0x%x\n", in rtw8723d_iqk_one_shot()
931 rtw_read32(rtwdev, REG_BB_SEL_BTG)); in rtw8723d_iqk_one_shot()
934 rtw_write32(rtwdev, REG_IQK_AGC_PTS_11N, pts); in rtw8723d_iqk_one_shot()
935 rtw_write32(rtwdev, REG_IQK_AGC_PTS_11N, 0xf8000000); in rtw8723d_iqk_one_shot()
937 if (!check_hw_ready(rtwdev, REG_IQK_RES_RY, BIT_IQK_DONE, 1)) in rtw8723d_iqk_one_shot()
938 rtw_warn(rtwdev, "%s %s IQK isn't done\n", iqk_cfg->name, in rtw8723d_iqk_one_shot()
942 static void rtw8723d_iqk_txrx_path_post(struct rtw_dev *rtwdev, in rtw8723d_iqk_txrx_path_post() argument
946 rtw8723d_iqk_restore_lte_path_gnt(rtwdev, backup); in rtw8723d_iqk_txrx_path_post()
947 rtw_write32(rtwdev, REG_BB_SEL_BTG, backup->bb_sel_btg); in rtw8723d_iqk_txrx_path_post()
950 rtw_write32_mask(rtwdev, REG_FPGA0_IQK_11N, BIT_MASK_IQK_MOD, RST_IQK); in rtw8723d_iqk_txrx_path_post()
952 rtw_write_rf(rtwdev, RF_PATH_A, iqk_cfg->reg_padlut, 0x800, 0x0); in rtw8723d_iqk_txrx_path_post()
953 rtw_write_rf(rtwdev, RF_PATH_A, RF_WLINT, BIT(0), 0x0); in rtw8723d_iqk_txrx_path_post()
954 rtw_write_rf(rtwdev, RF_PATH_A, RF_WLSEL, BIT(0), 0x0); in rtw8723d_iqk_txrx_path_post()
957 static u8 rtw8723d_iqk_tx_path(struct rtw_dev *rtwdev, in rtw8723d_iqk_tx_path() argument
963 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] path %s TXIQK!!\n", iqk_cfg->name); in rtw8723d_iqk_tx_path()
964 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] 0x67 @%s TXIQK = 0x%x\n", in rtw8723d_iqk_tx_path()
966 rtw_read32_mask(rtwdev, REG_PAD_CTRL1, MASKBYTE3)); in rtw8723d_iqk_tx_path()
968 rtw_write32(rtwdev, REG_BB_SEL_BTG, iqk_cfg->val_bb_sel_btg); in rtw8723d_iqk_tx_path()
969 rtw_write32_mask(rtwdev, REG_FPGA0_IQK_11N, BIT_MASK_IQK_MOD, RST_IQK); in rtw8723d_iqk_tx_path()
971 rtw_write_rf(rtwdev, RF_PATH_A, iqk_cfg->reg_lutwe, RFREG_MASK, 0x80000); in rtw8723d_iqk_tx_path()
972 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTWA, RFREG_MASK, 0x00004); in rtw8723d_iqk_tx_path()
973 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTWD1, RFREG_MASK, 0x0005d); in rtw8723d_iqk_tx_path()
974 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTWD0, RFREG_MASK, 0xBFFE0); in rtw8723d_iqk_tx_path()
975 rtw_write_rf(rtwdev, RF_PATH_A, iqk_cfg->reg_lutwe, RFREG_MASK, 0x00000); in rtw8723d_iqk_tx_path()
978 rtw_write32(rtwdev, REG_TXIQK_TONE_A_11N, 0x08008c0c); in rtw8723d_iqk_tx_path()
979 rtw_write32(rtwdev, REG_RXIQK_TONE_A_11N, 0x38008c1c); in rtw8723d_iqk_tx_path()
980 rtw_write32(rtwdev, REG_TXIQK_PI_A_11N, iqk_cfg->val_txiqk_pi); in rtw8723d_iqk_tx_path()
981 rtw_write32(rtwdev, REG_RXIQK_PI_A_11N, 0x28160200); in rtw8723d_iqk_tx_path()
982 rtw_write32(rtwdev, REG_TXIQK_11N, 0x01007c00); in rtw8723d_iqk_tx_path()
983 rtw_write32(rtwdev, REG_RXIQK_11N, 0x01004800); in rtw8723d_iqk_tx_path()
986 rtw_write32(rtwdev, REG_IQK_AGC_RSP_11N, 0x00462911); in rtw8723d_iqk_tx_path()
989 rtw_write_rf(rtwdev, RF_PATH_A, iqk_cfg->reg_padlut, 0x800, 0x1); in rtw8723d_iqk_tx_path()
990 rtw_write_rf(rtwdev, RF_PATH_A, iqk_cfg->reg_gaintx, 0x600, 0x0); in rtw8723d_iqk_tx_path()
991 rtw_write_rf(rtwdev, RF_PATH_A, iqk_cfg->reg_gaintx, 0x1E0, 0x3); in rtw8723d_iqk_tx_path()
992 rtw_write_rf(rtwdev, RF_PATH_A, RF_RXIQGEN, 0x1F, 0xf); in rtw8723d_iqk_tx_path()
995 rtw_write_rf(rtwdev, RF_PATH_A, iqk_cfg->reg_lutwe, 0x10, 0x1); in rtw8723d_iqk_tx_path()
996 rtw_write_rf(rtwdev, RF_PATH_A, iqk_cfg->reg_bspad, 0x1, 0x1); in rtw8723d_iqk_tx_path()
998 rtw_write_rf(rtwdev, RF_PATH_A, RF_WLINT, RFREG_MASK, iqk_cfg->val_wlint); in rtw8723d_iqk_tx_path()
999 rtw_write_rf(rtwdev, RF_PATH_A, RF_WLSEL, RFREG_MASK, iqk_cfg->val_wlsel); in rtw8723d_iqk_tx_path()
1001 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] RF0x1 @%s TXIQK = 0x%x\n", in rtw8723d_iqk_tx_path()
1003 rtw_read_rf(rtwdev, RF_PATH_A, RF_WLINT, RFREG_MASK)); in rtw8723d_iqk_tx_path()
1004 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] RF0x2 @%s TXIQK = 0x%x\n", in rtw8723d_iqk_tx_path()
1006 rtw_read_rf(rtwdev, RF_PATH_A, RF_WLSEL, RFREG_MASK)); in rtw8723d_iqk_tx_path()
1008 rtw8723d_iqk_one_shot(rtwdev, true, iqk_cfg); in rtw8723d_iqk_tx_path()
1009 status = rtw8723d_iqk_check_tx_failed(rtwdev, iqk_cfg); in rtw8723d_iqk_tx_path()
1011 rtw8723d_iqk_txrx_path_post(rtwdev, iqk_cfg, backup); in rtw8723d_iqk_tx_path()
1016 static u8 rtw8723d_iqk_rx_path(struct rtw_dev *rtwdev, in rtw8723d_iqk_rx_path() argument
1023 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] path %s RXIQK Step1!!\n", in rtw8723d_iqk_rx_path()
1025 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] 0x67 @%s RXIQK1 = 0x%x\n", in rtw8723d_iqk_rx_path()
1027 rtw_read32_mask(rtwdev, REG_PAD_CTRL1, MASKBYTE3)); in rtw8723d_iqk_rx_path()
1028 rtw_write32(rtwdev, REG_BB_SEL_BTG, iqk_cfg->val_bb_sel_btg); in rtw8723d_iqk_rx_path()
1030 rtw_write32_mask(rtwdev, REG_FPGA0_IQK_11N, BIT_MASK_IQK_MOD, RST_IQK); in rtw8723d_iqk_rx_path()
1033 rtw_write32(rtwdev, REG_TXIQK_11N, 0x01007c00); in rtw8723d_iqk_rx_path()
1034 rtw_write32(rtwdev, REG_RXIQK_11N, 0x01004800); in rtw8723d_iqk_rx_path()
1037 rtw_write32(rtwdev, REG_TXIQK_TONE_A_11N, 0x18008c1c); in rtw8723d_iqk_rx_path()
1038 rtw_write32(rtwdev, REG_RXIQK_TONE_A_11N, 0x38008c1c); in rtw8723d_iqk_rx_path()
1039 rtw_write32(rtwdev, REG_TX_IQK_TONE_B, 0x38008c1c); in rtw8723d_iqk_rx_path()
1040 rtw_write32(rtwdev, REG_RX_IQK_TONE_B, 0x38008c1c); in rtw8723d_iqk_rx_path()
1041 rtw_write32(rtwdev, REG_TXIQK_PI_A_11N, 0x82160000); in rtw8723d_iqk_rx_path()
1042 rtw_write32(rtwdev, REG_RXIQK_PI_A_11N, 0x28160000); in rtw8723d_iqk_rx_path()
1045 rtw_write32(rtwdev, REG_IQK_AGC_RSP_11N, 0x0046a911); in rtw8723d_iqk_rx_path()
1048 rtw_write_rf(rtwdev, RF_PATH_A, iqk_cfg->reg_lutwe, RFREG_MASK, 0x80000); in rtw8723d_iqk_rx_path()
1049 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTWA, RFREG_MASK, 0x00006); in rtw8723d_iqk_rx_path()
1050 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTWD1, RFREG_MASK, 0x0005f); in rtw8723d_iqk_rx_path()
1051 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTWD0, RFREG_MASK, 0xa7ffb); in rtw8723d_iqk_rx_path()
1052 rtw_write_rf(rtwdev, RF_PATH_A, iqk_cfg->reg_lutwe, RFREG_MASK, 0x00000); in rtw8723d_iqk_rx_path()
1055 rtw_write_rf(rtwdev, RF_PATH_A, iqk_cfg->reg_padlut, 0x800, 0x1); in rtw8723d_iqk_rx_path()
1056 rtw_write_rf(rtwdev, RF_PATH_A, iqk_cfg->reg_gaintx, 0x600, 0x0); in rtw8723d_iqk_rx_path()
1057 rtw_write_rf(rtwdev, RF_PATH_A, RF_WLINT, RFREG_MASK, iqk_cfg->val_wlint); in rtw8723d_iqk_rx_path()
1058 rtw_write_rf(rtwdev, RF_PATH_A, RF_WLSEL, RFREG_MASK, iqk_cfg->val_wlsel); in rtw8723d_iqk_rx_path()
1060 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] RF0x1@ path %s RXIQK1 = 0x%x\n", in rtw8723d_iqk_rx_path()
1062 rtw_read_rf(rtwdev, RF_PATH_A, RF_WLINT, RFREG_MASK)); in rtw8723d_iqk_rx_path()
1063 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] RF0x2@ path %s RXIQK1 = 0x%x\n", in rtw8723d_iqk_rx_path()
1065 rtw_read_rf(rtwdev, RF_PATH_A, RF_WLSEL, RFREG_MASK)); in rtw8723d_iqk_rx_path()
1067 rtw8723d_iqk_one_shot(rtwdev, false, iqk_cfg); in rtw8723d_iqk_rx_path()
1068 status = rtw8723d_iqk_check_tx_failed(rtwdev, iqk_cfg); in rtw8723d_iqk_rx_path()
1074 tx_x = rtw_read32_mask(rtwdev, REG_IQK_RES_TX, BIT_MASK_RES_TX); in rtw8723d_iqk_rx_path()
1075 tx_y = rtw_read32_mask(rtwdev, REG_IQK_RES_TY, BIT_MASK_RES_TY); in rtw8723d_iqk_rx_path()
1077 rtw_write32(rtwdev, REG_TXIQK_11N, BIT_SET_TXIQK_11N(tx_x, tx_y)); in rtw8723d_iqk_rx_path()
1078 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] 0xe40 = 0x%x u4tmp = 0x%x\n", in rtw8723d_iqk_rx_path()
1079 rtw_read32(rtwdev, REG_TXIQK_11N), in rtw8723d_iqk_rx_path()
1082 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] path %s RXIQK STEP2!!\n", in rtw8723d_iqk_rx_path()
1084 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] 0x67 @%s RXIQK2 = 0x%x\n", in rtw8723d_iqk_rx_path()
1086 rtw_read32_mask(rtwdev, REG_PAD_CTRL1, MASKBYTE3)); in rtw8723d_iqk_rx_path()
1088 rtw_write32(rtwdev, REG_RXIQK_11N, 0x01004800); in rtw8723d_iqk_rx_path()
1089 rtw_write32(rtwdev, REG_TXIQK_TONE_A_11N, 0x38008c1c); in rtw8723d_iqk_rx_path()
1090 rtw_write32(rtwdev, REG_RXIQK_TONE_A_11N, 0x18008c1c); in rtw8723d_iqk_rx_path()
1091 rtw_write32(rtwdev, REG_TX_IQK_TONE_B, 0x38008c1c); in rtw8723d_iqk_rx_path()
1092 rtw_write32(rtwdev, REG_RX_IQK_TONE_B, 0x38008c1c); in rtw8723d_iqk_rx_path()
1093 rtw_write32(rtwdev, REG_TXIQK_PI_A_11N, 0x82170000); in rtw8723d_iqk_rx_path()
1094 rtw_write32(rtwdev, REG_RXIQK_PI_A_11N, 0x28171400); in rtw8723d_iqk_rx_path()
1097 rtw_write32(rtwdev, REG_IQK_AGC_RSP_11N, 0x0046a8d1); in rtw8723d_iqk_rx_path()
1100 rtw_write32_mask(rtwdev, REG_FPGA0_IQK_11N, BIT_MASK_IQK_MOD, RST_IQK); in rtw8723d_iqk_rx_path()
1102 rtw_write_rf(rtwdev, RF_PATH_A, iqk_cfg->reg_lutwe, 0x80000, 0x1); in rtw8723d_iqk_rx_path()
1103 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTWA, RFREG_MASK, 0x00007); in rtw8723d_iqk_rx_path()
1104 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTWD1, RFREG_MASK, 0x0005f); in rtw8723d_iqk_rx_path()
1105 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTWD0, RFREG_MASK, 0xb3fdb); in rtw8723d_iqk_rx_path()
1106 rtw_write_rf(rtwdev, RF_PATH_A, iqk_cfg->reg_lutwe, RFREG_MASK, 0x00000); in rtw8723d_iqk_rx_path()
1108 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] RF0x1 @%s RXIQK2 = 0x%x\n", in rtw8723d_iqk_rx_path()
1110 rtw_read_rf(rtwdev, RF_PATH_A, RF_WLINT, RFREG_MASK)); in rtw8723d_iqk_rx_path()
1111 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] RF0x2 @%s RXIQK2 = 0x%x\n", in rtw8723d_iqk_rx_path()
1113 rtw_read_rf(rtwdev, RF_PATH_A, RF_WLSEL, RFREG_MASK)); in rtw8723d_iqk_rx_path()
1115 rtw8723d_iqk_one_shot(rtwdev, false, iqk_cfg); in rtw8723d_iqk_rx_path()
1116 status |= rtw8723d_iqk_check_rx_failed(rtwdev, iqk_cfg); in rtw8723d_iqk_rx_path()
1119 rtw8723d_iqk_txrx_path_post(rtwdev, iqk_cfg, backup); in rtw8723d_iqk_rx_path()
1125 void rtw8723d_iqk_fill_s1_matrix(struct rtw_dev *rtwdev, const s32 result[]) in rtw8723d_iqk_fill_s1_matrix() argument
1135 oldval_1 = rtw_read32_mask(rtwdev, REG_OFDM_0_XA_TX_IQ_IMBALANCE, in rtw8723d_iqk_fill_s1_matrix()
1140 rtw_write32_mask(rtwdev, REG_OFDM_0_XA_TX_IQ_IMBALANCE, in rtw8723d_iqk_fill_s1_matrix()
1142 rtw_write32_mask(rtwdev, REG_OFDM_0_ECCA_THRESHOLD, in rtw8723d_iqk_fill_s1_matrix()
1147 rtw_write32_mask(rtwdev, REG_TXIQK_MATRIXA_LSB2_11N, MASKH4BITS, in rtw8723d_iqk_fill_s1_matrix()
1149 rtw_write32_mask(rtwdev, REG_OFDM_0_XA_TX_IQ_IMBALANCE, in rtw8723d_iqk_fill_s1_matrix()
1151 rtw_write32_mask(rtwdev, REG_OFDM_0_ECCA_THRESHOLD, in rtw8723d_iqk_fill_s1_matrix()
1154 rtw_dbg(rtwdev, RTW_DBG_RFK, in rtw8723d_iqk_fill_s1_matrix()
1157 rtw_dbg(rtwdev, RTW_DBG_RFK, in rtw8723d_iqk_fill_s1_matrix()
1163 rtw_write32_mask(rtwdev, REG_A_RXIQI, BIT_MASK_RXIQ_S1_X, in rtw8723d_iqk_fill_s1_matrix()
1165 rtw_write32_mask(rtwdev, REG_A_RXIQI, BIT_MASK_RXIQ_S1_Y1, in rtw8723d_iqk_fill_s1_matrix()
1167 rtw_write32_mask(rtwdev, REG_RXIQK_MATRIX_LSB_11N, BIT_MASK_RXIQ_S1_Y2, in rtw8723d_iqk_fill_s1_matrix()
1172 void rtw8723d_iqk_fill_s0_matrix(struct rtw_dev *rtwdev, const s32 result[]) in rtw8723d_iqk_fill_s0_matrix() argument
1182 oldval_0 = rtw_read32_mask(rtwdev, REG_TXIQ_CD_S0, BIT_MASK_TXIQ_D_S0); in rtw8723d_iqk_fill_s0_matrix()
1187 rtw_write32_mask(rtwdev, REG_TXIQ_AB_S0, BIT_MASK_TXIQ_A_S0, tx0_a); in rtw8723d_iqk_fill_s0_matrix()
1188 rtw_write32_mask(rtwdev, REG_TXIQ_AB_S0, BIT_MASK_TXIQ_A_EXT_S0, tx0_a_ext); in rtw8723d_iqk_fill_s0_matrix()
1193 rtw_write32_mask(rtwdev, REG_TXIQ_CD_S0, BIT_MASK_TXIQ_C_S0, tx0_c); in rtw8723d_iqk_fill_s0_matrix()
1194 rtw_write32_mask(rtwdev, REG_TXIQ_CD_S0, BIT_MASK_TXIQ_C_EXT_S0, tx0_c_ext); in rtw8723d_iqk_fill_s0_matrix()
1199 rtw_write32_mask(rtwdev, REG_RXIQ_AB_S0, BIT_MASK_RXIQ_X_S0, in rtw8723d_iqk_fill_s0_matrix()
1201 rtw_write32_mask(rtwdev, REG_RXIQ_AB_S0, BIT_MASK_RXIQ_Y_S0, in rtw8723d_iqk_fill_s0_matrix()
1205 static void rtw8723d_iqk_path_adda_on(struct rtw_dev *rtwdev) in rtw8723d_iqk_path_adda_on() argument
1210 rtw_write32(rtwdev, iqk_adda_regs[i], 0x03c00016); in rtw8723d_iqk_path_adda_on()
1213 static void rtw8723d_iqk_config_mac(struct rtw_dev *rtwdev) in rtw8723d_iqk_config_mac() argument
1215 rtw_write8(rtwdev, REG_TXPAUSE, 0xff); in rtw8723d_iqk_config_mac()
1219 void rtw8723d_iqk_rf_standby(struct rtw_dev *rtwdev, enum rtw_rf_path path) in rtw8723d_iqk_rf_standby() argument
1221 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] path-%s standby mode!\n", in rtw8723d_iqk_rf_standby()
1224 rtw_write32_mask(rtwdev, REG_FPGA0_IQK_11N, BIT_MASK_IQK_MOD, RST_IQK); in rtw8723d_iqk_rf_standby()
1226 rtw_write_rf(rtwdev, path, RF_MODE, RFREG_MASK, 0x10000); in rtw8723d_iqk_rf_standby()
1227 rtw_write32_mask(rtwdev, REG_FPGA0_IQK_11N, BIT_MASK_IQK_MOD, EN_IQK); in rtw8723d_iqk_rf_standby()
1231 bool rtw8723d_iqk_similarity_cmp(struct rtw_dev *rtwdev, s32 result[][IQK_NR], in rtw8723d_iqk_similarity_cmp() argument
1289 void rtw8723d_iqk_precfg_path(struct rtw_dev *rtwdev, enum rtw8723d_path path) in rtw8723d_iqk_precfg_path() argument
1292 rtw8723d_iqk_rf_standby(rtwdev, RF_PATH_A); in rtw8723d_iqk_precfg_path()
1293 rtw8723d_iqk_path_adda_on(rtwdev); in rtw8723d_iqk_precfg_path()
1296 rtw_write32_mask(rtwdev, REG_FPGA0_IQK_11N, BIT_MASK_IQK_MOD, EN_IQK); in rtw8723d_iqk_precfg_path()
1297 rtw_write32(rtwdev, REG_TXIQK_11N, 0x01007c00); in rtw8723d_iqk_precfg_path()
1298 rtw_write32(rtwdev, REG_RXIQK_11N, 0x01004800); in rtw8723d_iqk_precfg_path()
1301 rtw8723d_iqk_rf_standby(rtwdev, RF_PATH_B); in rtw8723d_iqk_precfg_path()
1302 rtw8723d_iqk_path_adda_on(rtwdev); in rtw8723d_iqk_precfg_path()
1307 void rtw8723d_iqk_one_round(struct rtw_dev *rtwdev, s32 result[][IQK_NR], u8 t, in rtw8723d_iqk_one_round() argument
1313 rtw_dbg(rtwdev, RTW_DBG_RFK, in rtw8723d_iqk_one_round()
1316 rtw8723d_iqk_path_adda_on(rtwdev); in rtw8723d_iqk_one_round()
1317 rtw8723d_iqk_config_mac(rtwdev); in rtw8723d_iqk_one_round()
1318 rtw_write32_mask(rtwdev, REG_CCK_ANT_SEL_11N, 0x0f000000, 0xf); in rtw8723d_iqk_one_round()
1319 rtw_write32(rtwdev, REG_BB_RX_PATH_11N, 0x03a05611); in rtw8723d_iqk_one_round()
1320 rtw_write32(rtwdev, REG_TRMUX_11N, 0x000800e4); in rtw8723d_iqk_one_round()
1321 rtw_write32(rtwdev, REG_BB_PWR_SAV1_11N, 0x25204200); in rtw8723d_iqk_one_round()
1322 rtw8723d_iqk_precfg_path(rtwdev, PATH_S1); in rtw8723d_iqk_one_round()
1325 s1_ok = rtw8723d_iqk_tx_path(rtwdev, &iqk_tx_cfg[PATH_S1], backup); in rtw8723d_iqk_one_round()
1327 rtw_dbg(rtwdev, RTW_DBG_RFK, in rtw8723d_iqk_one_round()
1330 rtw_read32_mask(rtwdev, REG_IQK_RES_TX, BIT_MASK_RES_TX); in rtw8723d_iqk_one_round()
1332 rtw_read32_mask(rtwdev, REG_IQK_RES_TY, BIT_MASK_RES_TY); in rtw8723d_iqk_one_round()
1336 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] path S1 Tx IQK Fail!!\n"); in rtw8723d_iqk_one_round()
1342 s1_ok = rtw8723d_iqk_rx_path(rtwdev, &iqk_tx_cfg[PATH_S1], backup); in rtw8723d_iqk_one_round()
1344 rtw_dbg(rtwdev, RTW_DBG_RFK, in rtw8723d_iqk_one_round()
1347 rtw_read32_mask(rtwdev, REG_IQK_RES_RX, BIT_MASK_RES_RX); in rtw8723d_iqk_one_round()
1349 rtw_read32_mask(rtwdev, REG_IQK_RES_RY, BIT_MASK_RES_RY); in rtw8723d_iqk_one_round()
1353 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] path S1 Rx IQK Fail!!\n"); in rtw8723d_iqk_one_round()
1359 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] path S1 IQK is failed!!\n"); in rtw8723d_iqk_one_round()
1361 rtw8723d_iqk_precfg_path(rtwdev, PATH_S0); in rtw8723d_iqk_one_round()
1364 s0_ok = rtw8723d_iqk_tx_path(rtwdev, &iqk_tx_cfg[PATH_S0], backup); in rtw8723d_iqk_one_round()
1366 rtw_dbg(rtwdev, RTW_DBG_RFK, in rtw8723d_iqk_one_round()
1369 rtw_read32_mask(rtwdev, REG_IQK_RES_TX, BIT_MASK_RES_TX); in rtw8723d_iqk_one_round()
1371 rtw_read32_mask(rtwdev, REG_IQK_RES_TY, BIT_MASK_RES_TY); in rtw8723d_iqk_one_round()
1375 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] path S0 Tx IQK Fail!!\n"); in rtw8723d_iqk_one_round()
1381 s0_ok = rtw8723d_iqk_rx_path(rtwdev, &iqk_tx_cfg[PATH_S0], backup); in rtw8723d_iqk_one_round()
1383 rtw_dbg(rtwdev, RTW_DBG_RFK, in rtw8723d_iqk_one_round()
1387 rtw_read32_mask(rtwdev, REG_IQK_RES_RX, BIT_MASK_RES_RX); in rtw8723d_iqk_one_round()
1389 rtw_read32_mask(rtwdev, REG_IQK_RES_RY, BIT_MASK_RES_RY); in rtw8723d_iqk_one_round()
1393 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] path S0 Rx IQK Fail!!\n"); in rtw8723d_iqk_one_round()
1399 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] path S0 IQK is failed!!\n"); in rtw8723d_iqk_one_round()
1401 rtw_write32_mask(rtwdev, REG_FPGA0_IQK_11N, BIT_MASK_IQK_MOD, RST_IQK); in rtw8723d_iqk_one_round()
1404 rtw_dbg(rtwdev, RTW_DBG_RFK, in rtw8723d_iqk_one_round()
1408 static void rtw8723d_phy_calibration(struct rtw_dev *rtwdev) in rtw8723d_phy_calibration() argument
1410 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw8723d_phy_calibration()
1417 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] Start!!!\n"); in rtw8723d_phy_calibration()
1421 rtw8723d_iqk_backup_path_ctrl(rtwdev, &backup); in rtw8723d_phy_calibration()
1422 rtw8723d_iqk_backup_lte_path_gnt(rtwdev, &backup); in rtw8723d_phy_calibration()
1423 rtw8723d_iqk_backup_regs(rtwdev, &backup); in rtw8723d_phy_calibration()
1426 rtw8723d_iqk_config_path_ctrl(rtwdev); in rtw8723d_phy_calibration()
1427 rtw8723d_iqk_config_lte_path_gnt(rtwdev); in rtw8723d_phy_calibration()
1429 rtw8723d_iqk_one_round(rtwdev, result, i, &backup); in rtw8723d_phy_calibration()
1432 rtw8723d_iqk_restore_regs(rtwdev, &backup); in rtw8723d_phy_calibration()
1433 rtw8723d_iqk_restore_lte_path_gnt(rtwdev, &backup); in rtw8723d_phy_calibration()
1434 rtw8723d_iqk_restore_path_ctrl(rtwdev, &backup); in rtw8723d_phy_calibration()
1437 good = rtw8723d_iqk_similarity_cmp(rtwdev, result, j, i); in rtw8723d_phy_calibration()
1441 rtw_dbg(rtwdev, RTW_DBG_RFK, in rtw8723d_phy_calibration()
1464 rtw8723d_iqk_fill_s1_matrix(rtwdev, result[final_candidate]); in rtw8723d_phy_calibration()
1465 rtw8723d_iqk_fill_s0_matrix(rtwdev, result[final_candidate]); in rtw8723d_phy_calibration()
1474 rtw_write32(rtwdev, REG_BB_SEL_BTG, backup.bb_sel_btg); in rtw8723d_phy_calibration()
1476 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] final_candidate is %x\n", in rtw8723d_phy_calibration()
1480 rtw_dbg(rtwdev, RTW_DBG_RFK, in rtw8723d_phy_calibration()
1487 rtw_dbg(rtwdev, RTW_DBG_RFK, in rtw8723d_phy_calibration()
1489 rtw_read32(rtwdev, REG_OFDM_0_XA_TX_IQ_IMBALANCE), in rtw8723d_phy_calibration()
1490 rtw_read32(rtwdev, REG_TXIQK_MATRIXA_LSB2_11N), in rtw8723d_phy_calibration()
1491 rtw_read32(rtwdev, REG_A_RXIQI), in rtw8723d_phy_calibration()
1492 rtw_read32(rtwdev, REG_RXIQK_MATRIX_LSB_11N)); in rtw8723d_phy_calibration()
1493 rtw_dbg(rtwdev, RTW_DBG_RFK, in rtw8723d_phy_calibration()
1495 rtw_read32(rtwdev, REG_TXIQ_AB_S0), in rtw8723d_phy_calibration()
1496 rtw_read32(rtwdev, REG_TXIQ_CD_S0), in rtw8723d_phy_calibration()
1497 rtw_read32(rtwdev, REG_RXIQ_AB_S0)); in rtw8723d_phy_calibration()
1499 rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] finished\n"); in rtw8723d_phy_calibration()
1502 static void rtw8723d_phy_cck_pd_set(struct rtw_dev *rtwdev, u8 new_lvl) in rtw8723d_phy_cck_pd_set() argument
1504 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw8723d_phy_cck_pd_set()
1508 rtw_dbg(rtwdev, RTW_DBG_PHY, "lv: (%d) -> (%d)\n", in rtw8723d_phy_cck_pd_set()
1514 cck_n_rx = (rtw_read8_mask(rtwdev, REG_CCK0_FAREPORT, BIT_CCK0_2RX) && in rtw8723d_phy_cck_pd_set()
1515 rtw_read8_mask(rtwdev, REG_CCK0_FAREPORT, BIT_CCK0_MRC)) ? 2 : 1; in rtw8723d_phy_cck_pd_set()
1516 rtw_dbg(rtwdev, RTW_DBG_PHY, in rtw8723d_phy_cck_pd_set()
1518 rtw_is_assoc(rtwdev), new_lvl, cck_n_rx, in rtw8723d_phy_cck_pd_set()
1525 rtw_write32_mask(rtwdev, REG_PWRTH, 0x3f0000, pd[new_lvl]); in rtw8723d_phy_cck_pd_set()
1526 rtw_write32_mask(rtwdev, REG_PWRTH2, 0x1f0000, in rtw8723d_phy_cck_pd_set()
1531 static void rtw8723d_coex_cfg_init(struct rtw_dev *rtwdev) in rtw8723d_coex_cfg_init() argument
1534 rtw_write8_set(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION); in rtw8723d_coex_cfg_init()
1538 rtw_write8_mask(rtwdev, REG_BT_TDMA_TIME, BIT_MASK_SAMPLE_RATE, 0x5); in rtw8723d_coex_cfg_init()
1541 rtw_write8(rtwdev, REG_BT_STAT_CTRL, 0x1); in rtw8723d_coex_cfg_init()
1544 rtw_write32_set(rtwdev, REG_GPIO_MUXCFG, BIT_BT_PTA_EN); in rtw8723d_coex_cfg_init()
1545 rtw_write32_set(rtwdev, REG_GPIO_MUXCFG, BIT_PO_BT_PTA_PINS); in rtw8723d_coex_cfg_init()
1548 rtw_write8_set(rtwdev, REG_QUEUE_CTRL, BIT_PTA_WL_TX_EN); in rtw8723d_coex_cfg_init()
1551 static void rtw8723d_coex_cfg_gnt_fix(struct rtw_dev *rtwdev) in rtw8723d_coex_cfg_gnt_fix() argument
1555 static void rtw8723d_coex_cfg_gnt_debug(struct rtw_dev *rtwdev) in rtw8723d_coex_cfg_gnt_debug() argument
1557 rtw_write8_mask(rtwdev, REG_LEDCFG2, BIT(6), 0); in rtw8723d_coex_cfg_gnt_debug()
1558 rtw_write8_mask(rtwdev, REG_PAD_CTRL1 + 3, BIT(0), 0); in rtw8723d_coex_cfg_gnt_debug()
1559 rtw_write8_mask(rtwdev, REG_GPIO_INTM + 2, BIT(4), 0); in rtw8723d_coex_cfg_gnt_debug()
1560 rtw_write8_mask(rtwdev, REG_GPIO_MUXCFG + 2, BIT(1), 0); in rtw8723d_coex_cfg_gnt_debug()
1561 rtw_write8_mask(rtwdev, REG_PAD_CTRL1 + 3, BIT(1), 0); in rtw8723d_coex_cfg_gnt_debug()
1562 rtw_write8_mask(rtwdev, REG_PAD_CTRL1 + 2, BIT(7), 0); in rtw8723d_coex_cfg_gnt_debug()
1563 rtw_write8_mask(rtwdev, REG_SYS_CLKR + 1, BIT(1), 0); in rtw8723d_coex_cfg_gnt_debug()
1564 rtw_write8_mask(rtwdev, REG_SYS_SDIO_CTRL + 3, BIT(3), 0); in rtw8723d_coex_cfg_gnt_debug()
1567 static void rtw8723d_coex_cfg_rfe_type(struct rtw_dev *rtwdev) in rtw8723d_coex_cfg_rfe_type() argument
1569 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8723d_coex_cfg_rfe_type()
1570 struct rtw_coex *coex = &rtwdev->coex; in rtw8723d_coex_cfg_rfe_type()
1574 coex_rfe->rfe_module_type = rtwdev->efuse.rfe_option; in rtw8723d_coex_cfg_rfe_type()
1584 rtw_write16(rtwdev, REG_BB_SEL_BTG, 0x80); in rtw8723d_coex_cfg_rfe_type()
1586 rtw_write16(rtwdev, REG_BB_SEL_BTG, 0x200); in rtw8723d_coex_cfg_rfe_type()
1589 rtw_write16(rtwdev, REG_BB_SEL_BTG, 0x280); in rtw8723d_coex_cfg_rfe_type()
1591 rtw_write16(rtwdev, REG_BB_SEL_BTG, 0x0); in rtw8723d_coex_cfg_rfe_type()
1595 rtw_coex_write_indirect_reg(rtwdev, LTE_COEX_CTRL, BIT_LTE_COEX_EN, 0x0); in rtw8723d_coex_cfg_rfe_type()
1596 rtw_coex_write_indirect_reg(rtwdev, LTE_WL_TRX_CTRL, MASKLWORD, 0xffff); in rtw8723d_coex_cfg_rfe_type()
1597 rtw_coex_write_indirect_reg(rtwdev, LTE_BT_TRX_CTRL, MASKLWORD, 0xffff); in rtw8723d_coex_cfg_rfe_type()
1600 static void rtw8723d_coex_cfg_wl_tx_power(struct rtw_dev *rtwdev, u8 wl_pwr) in rtw8723d_coex_cfg_wl_tx_power() argument
1602 struct rtw_coex *coex = &rtwdev->coex; in rtw8723d_coex_cfg_wl_tx_power()
1617 rtw_write8(rtwdev, REG_ANA_PARAM1 + 3, pwr); in rtw8723d_coex_cfg_wl_tx_power()
1620 static void rtw8723d_coex_cfg_wl_rx_gain(struct rtw_dev *rtwdev, bool low_gain) in rtw8723d_coex_cfg_wl_rx_gain() argument
1622 struct rtw_coex *coex = &rtwdev->coex; in rtw8723d_coex_cfg_wl_rx_gain()
1649 rtw_write32(rtwdev, REG_AGCRSSI, wl_rx_low_gain_on[i]); in rtw8723d_coex_cfg_wl_rx_gain()
1652 rtw_write32(rtwdev, REG_AGCRSSI, wl_rx_low_gain_off[i]); in rtw8723d_coex_cfg_wl_rx_gain()
1656 static u8 rtw8723d_pwrtrack_get_limit_ofdm(struct rtw_dev *rtwdev) in rtw8723d_pwrtrack_get_limit_ofdm() argument
1658 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw8723d_pwrtrack_get_limit_ofdm()
1682 rtw_warn(rtwdev, "pwrtrack unhandled tx_rate 0x%x\n", tx_rate); in rtw8723d_pwrtrack_get_limit_ofdm()
1689 static void rtw8723d_set_iqk_matrix_by_result(struct rtw_dev *rtwdev, in rtw8723d_set_iqk_matrix_by_result() argument
1692 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw8723d_set_iqk_matrix_by_result()
1726 rtw_write32(rtwdev, REG_OFDM_0_XA_TX_IQ_IMBALANCE, value32); in rtw8723d_set_iqk_matrix_by_result()
1728 rtw_write32_mask(rtwdev, REG_TXIQK_MATRIXA_LSB2_11N, MASKH4BITS, in rtw8723d_set_iqk_matrix_by_result()
1730 value32 = rtw_read32(rtwdev, REG_OFDM_0_ECCA_THRESHOLD); in rtw8723d_set_iqk_matrix_by_result()
1733 rtw_write32(rtwdev, REG_OFDM_0_ECCA_THRESHOLD, value32); in rtw8723d_set_iqk_matrix_by_result()
1738 rtw_write32_mask(rtwdev, REG_TXIQ_CD_S0, BIT_MASK_TXIQ_D_S0, ele_D); in rtw8723d_set_iqk_matrix_by_result()
1739 rtw_write32_mask(rtwdev, REG_TXIQ_CD_S0, BIT_MASK_TXIQ_C_S0, ele_C); in rtw8723d_set_iqk_matrix_by_result()
1740 rtw_write32_mask(rtwdev, REG_TXIQ_AB_S0, BIT_MASK_TXIQ_A_S0, ele_A); in rtw8723d_set_iqk_matrix_by_result()
1742 rtw_write32_mask(rtwdev, REG_TXIQ_CD_S0, BIT_MASK_TXIQ_D_EXT_S0, in rtw8723d_set_iqk_matrix_by_result()
1744 rtw_write32_mask(rtwdev, REG_TXIQ_AB_S0, BIT_MASK_TXIQ_A_EXT_S0, in rtw8723d_set_iqk_matrix_by_result()
1746 rtw_write32_mask(rtwdev, REG_TXIQ_CD_S0, BIT_MASK_TXIQ_C_EXT_S0, in rtw8723d_set_iqk_matrix_by_result()
1752 static void rtw8723d_set_iqk_matrix(struct rtw_dev *rtwdev, s8 ofdm_index, in rtw8723d_set_iqk_matrix() argument
1755 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw8723d_set_iqk_matrix()
1767 rtw8723d_set_iqk_matrix_by_result(rtwdev, ofdm_swing, rf_path); in rtw8723d_set_iqk_matrix()
1774 rtw_write32(rtwdev, REG_OFDM_0_XA_TX_IQ_IMBALANCE, ofdm_swing); in rtw8723d_set_iqk_matrix()
1775 rtw_write32_mask(rtwdev, REG_TXIQK_MATRIXA_LSB2_11N, MASKH4BITS, in rtw8723d_set_iqk_matrix()
1777 value32 = rtw_read32(rtwdev, REG_OFDM_0_ECCA_THRESHOLD); in rtw8723d_set_iqk_matrix()
1779 rtw_write32(rtwdev, REG_OFDM_0_ECCA_THRESHOLD, value32); in rtw8723d_set_iqk_matrix()
1784 rtw_write32_mask(rtwdev, REG_TXIQ_AB_S0, BIT_MASK_TXIQ_A_S0, in rtw8723d_set_iqk_matrix()
1786 rtw_write32_mask(rtwdev, REG_TXIQ_AB_S0, BIT_MASK_TXIQ_B_S0, in rtw8723d_set_iqk_matrix()
1788 rtw_write32_mask(rtwdev, REG_TXIQ_CD_S0, BIT_MASK_TXIQ_C_S0, in rtw8723d_set_iqk_matrix()
1790 rtw_write32_mask(rtwdev, REG_TXIQ_CD_S0, BIT_MASK_TXIQ_D_S0, in rtw8723d_set_iqk_matrix()
1792 rtw_write32_mask(rtwdev, REG_TXIQ_CD_S0, BIT_MASK_TXIQ_D_EXT_S0, 0x0); in rtw8723d_set_iqk_matrix()
1793 rtw_write32_mask(rtwdev, REG_TXIQ_CD_S0, BIT_MASK_TXIQ_C_EXT_S0, 0x0); in rtw8723d_set_iqk_matrix()
1794 rtw_write32_mask(rtwdev, REG_TXIQ_AB_S0, BIT_MASK_TXIQ_A_EXT_S0, 0x0); in rtw8723d_set_iqk_matrix()
1799 static void rtw8723d_pwrtrack_set_ofdm_pwr(struct rtw_dev *rtwdev, s8 swing_idx, in rtw8723d_pwrtrack_set_ofdm_pwr() argument
1802 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw8723d_pwrtrack_set_ofdm_pwr()
1806 rtw8723d_set_iqk_matrix(rtwdev, swing_idx, RF_PATH_A); in rtw8723d_pwrtrack_set_ofdm_pwr()
1807 rtw8723d_set_iqk_matrix(rtwdev, swing_idx, RF_PATH_B); in rtw8723d_pwrtrack_set_ofdm_pwr()
1810 static void rtw8723d_pwrtrack_set_cck_pwr(struct rtw_dev *rtwdev, s8 swing_idx, in rtw8723d_pwrtrack_set_cck_pwr() argument
1813 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw8723d_pwrtrack_set_cck_pwr()
1817 rtw_write32_mask(rtwdev, 0xab4, 0x000007FF, in rtw8723d_pwrtrack_set_cck_pwr()
1821 static void rtw8723d_pwrtrack_set(struct rtw_dev *rtwdev, u8 path) in rtw8723d_pwrtrack_set() argument
1823 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw8723d_pwrtrack_set()
1824 struct rtw_hal *hal = &rtwdev->hal; in rtw8723d_pwrtrack_set()
1830 limit_ofdm = rtw8723d_pwrtrack_get_limit_ofdm(rtwdev); in rtw8723d_pwrtrack_set()
1838 rtw8723d_pwrtrack_set_ofdm_pwr(rtwdev, limit_ofdm, in rtw8723d_pwrtrack_set()
1841 rtw8723d_pwrtrack_set_ofdm_pwr(rtwdev, 0, in rtw8723d_pwrtrack_set()
1844 rtw8723d_pwrtrack_set_ofdm_pwr(rtwdev, final_ofdm_swing_index, 0); in rtw8723d_pwrtrack_set()
1847 rtw8723d_pwrtrack_set_cck_pwr(rtwdev, limit_cck, in rtw8723d_pwrtrack_set()
1850 rtw8723d_pwrtrack_set_cck_pwr(rtwdev, 0, in rtw8723d_pwrtrack_set()
1853 rtw8723d_pwrtrack_set_cck_pwr(rtwdev, final_cck_swing_index, 0); in rtw8723d_pwrtrack_set()
1855 rtw_phy_set_tx_power_level(rtwdev, hal->current_channel); in rtw8723d_pwrtrack_set()
1858 static void rtw8723d_pwrtrack_set_xtal(struct rtw_dev *rtwdev, u8 therm_path, in rtw8723d_pwrtrack_set_xtal() argument
1861 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw8723d_pwrtrack_set_xtal()
1862 const struct rtw_pwr_track_tbl *tbl = rtwdev->chip->pwr_track_tbl; in rtw8723d_pwrtrack_set_xtal()
1867 rtwdev->efuse.thermal_meter[therm_path]) in rtw8723d_pwrtrack_set_xtal()
1872 xtal_cap = rtwdev->efuse.crystal_cap & 0x3F; in rtw8723d_pwrtrack_set_xtal()
1874 rtw_write32_mask(rtwdev, REG_AFE_CTRL3, BIT_MASK_XTAL, in rtw8723d_pwrtrack_set_xtal()
1878 static void rtw8723d_phy_pwrtrack(struct rtw_dev *rtwdev) in rtw8723d_phy_pwrtrack() argument
1880 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw8723d_phy_pwrtrack()
1885 rtw_phy_config_swing_table(rtwdev, &swing_table); in rtw8723d_phy_pwrtrack()
1887 if (rtwdev->efuse.thermal_meter[0] == 0xff) in rtw8723d_phy_pwrtrack()
1890 thermal_value = rtw_read_rf(rtwdev, RF_PATH_A, RF_T_METER, 0xfc00); in rtw8723d_phy_pwrtrack()
1892 rtw_phy_pwrtrack_avg(rtwdev, thermal_value, RF_PATH_A); in rtw8723d_phy_pwrtrack()
1894 do_iqk = rtw_phy_pwrtrack_need_iqk(rtwdev); in rtw8723d_phy_pwrtrack()
1897 rtw8723d_lck(rtwdev); in rtw8723d_phy_pwrtrack()
1901 else if (!rtw_phy_pwrtrack_thermal_changed(rtwdev, thermal_value, in rtw8723d_phy_pwrtrack()
1905 delta = rtw_phy_pwrtrack_get_delta(rtwdev, RF_PATH_A); in rtw8723d_phy_pwrtrack()
1909 for (path = 0; path < rtwdev->hal.rf_path_num; path++) { in rtw8723d_phy_pwrtrack()
1913 delta_cur = rtw_phy_pwrtrack_get_pwridx(rtwdev, &swing_table, in rtw8723d_phy_pwrtrack()
1919 rtw8723d_pwrtrack_set(rtwdev, path); in rtw8723d_phy_pwrtrack()
1922 rtw8723d_pwrtrack_set_xtal(rtwdev, RF_PATH_A, delta); in rtw8723d_phy_pwrtrack()
1926 rtw8723d_phy_calibration(rtwdev); in rtw8723d_phy_pwrtrack()
1929 static void rtw8723d_pwr_track(struct rtw_dev *rtwdev) in rtw8723d_pwr_track() argument
1931 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8723d_pwr_track()
1932 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw8723d_pwr_track()
1938 rtw_write_rf(rtwdev, RF_PATH_A, RF_T_METER, in rtw8723d_pwr_track()
1944 rtw8723d_phy_pwrtrack(rtwdev); in rtw8723d_pwr_track()